JPH04277635A - Connection structure of pad - Google Patents

Connection structure of pad

Info

Publication number
JPH04277635A
JPH04277635A JP3039730A JP3973091A JPH04277635A JP H04277635 A JPH04277635 A JP H04277635A JP 3039730 A JP3039730 A JP 3039730A JP 3973091 A JP3973091 A JP 3973091A JP H04277635 A JPH04277635 A JP H04277635A
Authority
JP
Japan
Prior art keywords
pad
pattern
lead wire
lead
connection structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3039730A
Other languages
Japanese (ja)
Inventor
Hiroshi Abe
阿部 裕志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP3039730A priority Critical patent/JPH04277635A/en
Publication of JPH04277635A publication Critical patent/JPH04277635A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/0711Apparatus therefor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/0711Apparatus therefor
    • H10W72/07141Means for applying energy, e.g. ovens or lasers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • H10W72/07521Aligning
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • H10W72/932Plan-view shape, i.e. in top view
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To provide a connecting configuration for a pad which is capable of preventing a short circuit when pattern pads are formed closely adjacent to one another, and which is capable of increasing the integration of an IC and a printed board. CONSTITUTION:Pattern pads 6 are formed on a substrate, and they are connected to an IC pad 2 (not illustrated in the figure) of an IC chip 3 via lead wires 10. A rounded periphery P6 of the pattern pad 6 prevents the lead wire 10 from being curved when it is caught by an angled pad. Thus, this configuration hinders a contact between the lead wires, which are adjacent to one another, and permits the formation of the pattern pads 6 proximately to one another.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明はパッドのリード線接続に
ついての構造に関し、特にその集積度を高めることがで
きる接続構造に関する発明である。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure for connecting pads to lead wires, and more particularly to a connection structure that can increase the degree of integration.

【0002】0002

【従来の技術】集積回路(IC)に位置するボンディン
グパッドを図2に示す。ICのベース基板7にはICチ
ップ3が固定されており、このICチップ3は複数のI
Cパッド2を備えている。一方、ベース基板7には各I
Cパッド2に対応するパターンパッド4も形成されてお
り、これらのパターンパッド4とICパッド2とはリー
ド線(図示せず)で接続される。すなわち、ICチップ
3はパターンパッド4からリード線を通じて電流の供給
を受け又は電流が取り出されて、プリント基板(図示せ
ず)上に搭載され所定の電気的動作を行なう。
2. Description of the Related Art A bonding pad located on an integrated circuit (IC) is shown in FIG. An IC chip 3 is fixed to the base substrate 7 of the IC, and this IC chip 3 is connected to a plurality of I
It is equipped with a C pad 2. On the other hand, each I
Pattern pads 4 corresponding to the C pads 2 are also formed, and these pattern pads 4 and the IC pads 2 are connected by lead wires (not shown). That is, the IC chip 3 receives current from or is supplied with current from the pattern pad 4 through the lead wire, is mounted on a printed circuit board (not shown), and performs a predetermined electrical operation.

【0003】ICパッド2とパターンパッド4とのリー
ド線による接続には、キャピラリー等が用いられる。こ
のキャピラリー5は、図3Aに示すように先端の導出孔
5Tからリード線10を導出しつつ移動することにより
所定の配線を行なうものである。接続の際には、まず、
リード線10の一端部P2をキャピラリー5による熱圧
着でICパッド2に接続し固定する。そして、キャピラ
リー5はリード線10を導出しつつ矢印90方向へ移動
し、パターンパッド4に向けて配線を行なう。尚、リー
ド線10をベース基板7に近接してに配線する為に、キ
ャピラリー5は移動途中で一旦下降し近接配線部P3が
形成される。
A capillary or the like is used to connect the IC pad 2 and the pattern pad 4 using lead wires. This capillary 5 performs predetermined wiring by moving while leading out the lead wire 10 from the lead-out hole 5T at the tip, as shown in FIG. 3A. When connecting, first,
One end P2 of the lead wire 10 is connected and fixed to the IC pad 2 by thermocompression bonding using the capillary 5. Then, the capillary 5 moves in the direction of arrow 90 while leading out the lead wire 10, and performs wiring toward the pattern pad 4. In order to wire the lead wire 10 close to the base substrate 7, the capillary 5 is once lowered during movement to form a proximal wiring portion P3.

【0004】そして、キャピラリー5はパターンパッド
4上に位置し、リード線10をパターンパッド4に熱圧
着して固定する。その後、リード線10はキャピラリー
5によって切断される。リード線10が切断され、他端
部P4が固定された状態を示すものが図3Bである。こ
うして、ICパッド2とパターンパッド4とはリード線
10によって電気的に接続される。尚、ICチップ3は
プリント基板上に直接固定されることもあるが(図示せ
ず)、この場合も同様にしてプリント基板上のパターン
パッドとリード線10による接続が行なわれる。
The capillary 5 is positioned on the pattern pad 4, and the lead wire 10 is fixed to the pattern pad 4 by thermocompression bonding. Thereafter, the lead wire 10 is cut by the capillary 5. FIG. 3B shows a state in which the lead wire 10 is cut and the other end P4 is fixed. In this way, the IC pad 2 and the pattern pad 4 are electrically connected by the lead wire 10. Incidentally, the IC chip 3 may be directly fixed on the printed circuit board (not shown), but in this case as well, the connection to the pattern pads on the printed circuit board and the lead wires 10 is made in the same manner.

【0005】[0005]

【発明が解決しようとする課題】上記従来のパッドの接
続構造には、次のような問題があった。ICのベース基
板7上に位置するパターンパッド4は、図3Bに示すよ
うに角L4を有している。この為、リード線10がこの
角L4に引っ掛かり当接部P8が形成され、大きな湾曲
を描いて配線されてしまうことがある。
SUMMARY OF THE INVENTION The conventional pad connection structure described above has the following problems. The pattern pad 4 located on the base substrate 7 of the IC has a corner L4 as shown in FIG. 3B. For this reason, the lead wire 10 may be caught on this corner L4, forming an abutting portion P8, and may be wired in a large curve.

【0006】リード線10が角L4に引っ掛かる原因と
しては、キャピラリー5から導出されるリード線10自
体の捩れや、ICパッド2又はパターンパッド4の固定
位置の位置ずれ等が考えられる。ICパッド2とパター
ンパッド4との配置関係により、リード線10がパター
ンパッド4に対して斜に導かれるような場合には特に当
接部P8が形成され易い。
Possible causes of the lead wire 10 getting caught in the corner L4 include twisting of the lead wire 10 itself led out from the capillary 5, misalignment of the fixed position of the IC pad 2 or the pattern pad 4, and the like. Due to the arrangement relationship between the IC pad 2 and the pattern pad 4, when the lead wire 10 is led obliquely to the pattern pad 4, the contact portion P8 is particularly likely to be formed.

【0007】このようにリード線10が大きな湾曲を描
いて配線されてしまうと、互いに隣接するリード線10
が接触し短絡を生じる虞がある。従って、このような短
絡を回避する為、一般に各パターンパッド4の間隔S4
は比較的大きく形成され、リード線10に当接部P8が
生じても互いに隣接するリード線10が接触しないよう
な構造になっている。各パターンパッド4の間隔S4を
広く形成すると、IC全体における集積度が低下すると
いう問題がある。ICチップ3がプリント基板上に直接
固定される場合にも同様の問題を生じ、プリント基板の
集積度の低下を招く。
If the lead wires 10 are wired in a large curve as described above, the adjacent lead wires 10
There is a risk that they may come into contact and cause a short circuit. Therefore, in order to avoid such a short circuit, the spacing S4 between each pattern pad 4 is generally
is formed relatively large, and has a structure such that even if a contact portion P8 occurs in the lead wire 10, adjacent lead wires 10 do not come into contact with each other. If the spacing S4 between the pattern pads 4 is made wide, there is a problem that the degree of integration in the entire IC decreases. A similar problem occurs when the IC chip 3 is directly fixed onto the printed circuit board, resulting in a decrease in the degree of integration of the printed circuit board.

【0008】そこで本発明は、各パターンパッドを近接
して配置しつつ短絡を防止し、ICやプリント基板の集
積度を高めることができるパッドの接続構造を提供する
ことを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a pad connection structure that can prevent short circuits while arranging pattern pads close to each other and increase the degree of integration of ICs and printed circuit boards.

【0009】[0009]

【課題を解決するための手段】本発明に係るパッドの接
続構造は、基板上に保持される集積回路チップに位置し
、接続リードの第一端部が固定される第一パッド、基板
上に位置し、接続リードの他方の端部である第二端部が
導かれ接続される第二パッド、を備えたパッドの接続構
造において、接続リードの第二端部が導かれる第二パッ
ドの外周が曲線状に形成されている、ことを特徴とする
している。
[Means for Solving the Problems] A pad connection structure according to the present invention includes a first pad located on an integrated circuit chip held on a substrate and to which a first end of a connection lead is fixed; In a pad connection structure, the pad connection structure includes a second pad that is located at the second end of the connection lead and is connected to the second end, which is the other end of the connection lead. It is characterized by being formed in a curved shape.

【0010】0010

【作用】本発明に係るパッドの接続構造においては、接
続リードの第二端部が導かれる第二パッドの外周が曲線
状に形成されている。従って、第二パッドの外周には角
部が形成されておらず、角部に接続リードが引っ掛かり
湾曲状に配線されることはない。すなわち、隣接する接
続リードに接触し、短絡することはない。
[Operation] In the pad connection structure according to the present invention, the outer periphery of the second pad to which the second end of the connection lead is guided is formed in a curved shape. Therefore, no corner is formed on the outer periphery of the second pad, and the connection lead will not be caught in the corner and wired in a curved shape. That is, it will not come into contact with adjacent connection leads and cause a short circuit.

【0011】[0011]

【実施例】本発明に係るパッドの接続構造の一実施例を
説明する。図1に本発明における第二パッドとしてのパ
ターンパッド6を示す。このパターンパッド6には、キ
ャピラリー5等によって接続リードであるリード線10
が導かれて接続される。キャピラリー5は、図3Aに示
すように先端の導出孔5Tからリード線10を導出しつ
つ移動することにより所定の配線を行なうものである。 尚、リード線10は、一般に太さ18μmから127μ
mのものが使用される。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a pad connection structure according to the present invention will be described. FIG. 1 shows a patterned pad 6 as a second pad in the present invention. This pattern pad 6 is connected to a lead wire 10 which is a connection lead by a capillary 5 or the like.
are guided and connected. As shown in FIG. 3A, the capillary 5 performs predetermined wiring by moving while leading out the lead wire 10 from the lead-out hole 5T at the tip. The lead wire 10 generally has a thickness of 18 μm to 127 μm.
m is used.

【0012】接続は、まずリード線10の第一端部であ
る一端部P2をキャピラリー5で熱圧着し、ICチップ
3のICパッド2に接続して固定する(図3A参照)。 そして、キャピラリー5はリード線10を導出しつつ矢
印90方向へ移動し、パターンパッド4にリード線10
を導く。
For connection, first, one end P2, which is the first end of the lead wire 10, is thermocompressed with the capillary 5, and connected and fixed to the IC pad 2 of the IC chip 3 (see FIG. 3A). Then, the capillary 5 moves in the direction of arrow 90 while leading out the lead wire 10, and connects the lead wire 10 to the pattern pad 4.
guide.

【0013】ICチップ3は基板上に保持されるが、I
Cのベース基板7に保持される場合の他、プリント基板
(図示せず)上に直接搭載されるものであってもよい。 この場合、パターンパッド6はプリント基板上に形成さ
れることになる。プリント基板としてはガラスエポキシ
基板、フェノール基板、フレキシブルパターン基板又は
リードフレーム等が用いられる。
The IC chip 3 is held on the substrate, but the I
In addition to being held on the base board 7 of C, it may also be mounted directly on a printed circuit board (not shown). In this case, the pattern pad 6 will be formed on the printed circuit board. As the printed circuit board, a glass epoxy board, a phenol board, a flexible pattern board, a lead frame, or the like is used.

【0014】図1に示すようにリード線10が導かれる
パターンパッド4の外周部R6は、半円状に形成されて
いる。そして、リード線10はパターンパッド4の外周
部R6を通過しパターンパッド4上に位置し、キャピラ
リー5の熱圧着により固定される。リード線10の第二
端部である他端部P6が固定された後、キャピラリー5
はリード線10を切断する。パターンパッド4の外周部
R6は半円状であり、角部が形成されていない為、リー
ド線10が角部に引っ掛かり湾曲状に配線されることは
ない。すなわち、互いに隣接するリード線10が接触し
て短絡が生じる虞はない。
As shown in FIG. 1, the outer peripheral portion R6 of the pattern pad 4, through which the lead wire 10 is guided, is formed in a semicircular shape. Then, the lead wire 10 passes through the outer peripheral portion R6 of the pattern pad 4, is located on the pattern pad 4, and is fixed by thermocompression bonding of the capillary 5. After the other end P6, which is the second end of the lead wire 10, is fixed, the capillary 5
cuts the lead wire 10. The outer periphery R6 of the pattern pad 4 is semicircular and has no corners, so the lead wires 10 will not be caught in the corners and wired in a curved shape. That is, there is no possibility that the lead wires 10 adjacent to each other will come into contact with each other and cause a short circuit.

【0015】このように、本発明においてはリード線1
0の接触による短絡の危険がない為、各パターンパッド
4の間隔S6を小さく設けることができ、ICやプリン
ト基板の集積度を高めることが可能となる。集積度の向
上により電子機器の小型化を図ることができる。尚、上
記実施例においてはパターンパッド4の外周部R6は図
1に示す半円状に形成されているが、外周部R6は角部
が形成されない曲線状であればどのような形状であって
もよい。
In this way, in the present invention, the lead wire 1
Since there is no risk of short circuit due to contact between pads 4 and 4, the spacing S6 between each pattern pad 4 can be made small, making it possible to increase the degree of integration of ICs and printed circuit boards. By increasing the degree of integration, electronic devices can be made smaller. In the above embodiment, the outer circumferential portion R6 of the pattern pad 4 is formed in the semicircular shape shown in FIG. Good too.

【0016】[0016]

【発明の効果】本発明に係るパッドの接続構造において
は、第二パッドの外周に角部が形成されておらず、角部
に接続リードが引っ掛かり湾曲状に配線されることはな
い。すなわち、隣接する接続リードに接触し、短絡する
ことはない。従って、接続リードが接続される各第二パ
ッドを近接して配置することができ、集積回路の集積度
を高めることができる。
In the pad connection structure according to the present invention, no corner is formed on the outer periphery of the second pad, and the connection lead is not caught in the corner and wired in a curved shape. That is, it will not come into contact with adjacent connection leads and cause a short circuit. Therefore, the second pads to which the connection leads are connected can be disposed close to each other, and the degree of integration of the integrated circuit can be increased.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明に係るパッドの接続構造におけるパター
ンパッドを示す平面図である。
FIG. 1 is a plan view showing a patterned pad in a pad connection structure according to the present invention.

【図2】ICに位置するICチップ及びパターンパッド
を示す平面図である。
FIG. 2 is a plan view showing an IC chip and pattern pads located on the IC.

【図3】ICのパッド接続構造の概要を説明する為の側
面図及び平面図である。
FIG. 3 is a side view and a plan view for explaining the outline of an IC pad connection structure.

【符号の説明】 2・・・・・ICパッド 3・・・・・ICチップ 4、6・・・パターンパッド 7・・・・・ベース基板 10・・・・・リード線 P2・・・・・一端部 P4、P6・・・他端部 R6・・・・・外周部[Explanation of symbols] 2...IC pad 3...IC chip 4, 6...Pattern pad 7...Base board 10...Lead wire P2...One end P4, P6...other end R6...Outer periphery

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】基板上に保持される集積回路チップに位置
し、接続リードの第一端部が固定される第一パッド、基
板上に位置し、接続リードの他方の端部である第二端部
が導かれ接続される第二パッド、を備えたパッドの接続
構造において、接続リードの第二端部が導かれる第二パ
ッドの外周が曲線状に形成されている、ことを特徴とす
るパッドの接続構造。
1. A first pad located on an integrated circuit chip held on a substrate and to which a first end of a connection lead is fixed; a second pad located on the substrate and to which the other end of the connection lead is fixed; A pad connection structure including a second pad whose end is guided and connected, characterized in that the outer periphery of the second pad, through which the second end of the connection lead is guided, is formed in a curved shape. Pad connection structure.
JP3039730A 1991-03-06 1991-03-06 Connection structure of pad Pending JPH04277635A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3039730A JPH04277635A (en) 1991-03-06 1991-03-06 Connection structure of pad

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3039730A JPH04277635A (en) 1991-03-06 1991-03-06 Connection structure of pad

Publications (1)

Publication Number Publication Date
JPH04277635A true JPH04277635A (en) 1992-10-02

Family

ID=12561093

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3039730A Pending JPH04277635A (en) 1991-03-06 1991-03-06 Connection structure of pad

Country Status (1)

Country Link
JP (1) JPH04277635A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50102249A (en) * 1974-01-09 1975-08-13
JPS6121361A (en) * 1983-11-11 1986-01-30 富士包装紙器株式会社 Method of housing free set commodity
JPH0259735A (en) * 1988-08-25 1990-02-28 Canon Inc Optical system of single-lens reflex camera

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50102249A (en) * 1974-01-09 1975-08-13
JPS6121361A (en) * 1983-11-11 1986-01-30 富士包装紙器株式会社 Method of housing free set commodity
JPH0259735A (en) * 1988-08-25 1990-02-28 Canon Inc Optical system of single-lens reflex camera

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