JPH04277652A - Integrated circuit - Google Patents

Abstract

PURPOSE:To arrange large functional blocks in optimal positions while maintaining predetermined functions and characteristics of the individual blocks so as to reduce the chip area, shorten interconnections between functional blocks, decrease signal delay time, and increase the degree of freedom in circuit design. CONSTITUTION:A semiconductor chip 20 includes large functional blocks composed of standard cells. At least one large functional block is composed of one functional block 11 having a counter 16 and another functional block 12 having a register 17. The two blocks 11 and 12, having individual functions, are connected through terminals 13-15 for transferring signals.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to semiconductor integrated circuits.
In particular, the present invention relates to a semiconductor integrated circuit having a large-scale functional block constructed by combining a large number of basic cells.

0002

[Background Art] In recent years, semiconductor integrated circuits have tended to become larger in scale, and along with this, the functional blocks that make up semiconductor integrated circuits have also become larger in scale, and a large number of these large-scale functional blocks are used. As a result, semiconductor integrated circuits are increasingly being constructed. Here, the large-scale functional block means a block including a CPU, CPU peripheral circuits, etc., and is composed of functional blocks such as counters, registers, and arithmetic units.

In conventional semiconductor integrated circuits, a system made up of a plurality of semiconductor integrated circuits is constructed as a single semiconductor integrated circuit using large-scale functional blocks, thereby reducing the size of the entire system. In addition, reliability is thereby improved. As for the functional blocks constituting this type of semiconductor integrated circuit, wiring within the large-scale functional blocks must be fixed in order to maintain constant electrical characteristics such as signal delay time. For this reason,
Generally, the shape of a large-scale functional block remains unchanged.

FIG. 3 is a layout diagram of a semiconductor chip in an example of a conventional semiconductor integrated circuit. As shown in FIG. 3, large-scale functional blocks 30 and 31 are arranged on the semiconductor chip 36 so as not to overlap each other, and the large-scale functional block 30 includes a counter 32 and a register 33. Blocks and related wiring 101 and 102 are arranged, and the large-scale functional block 31 includes an arithmetic unit 34 and a register 3.
5 and related wiring 103 and 1
04 is placed.

[0005]

In the conventional semiconductor integrated circuit described above, in order to maintain the electrical characteristics of the large-scale functional block constant, it is necessary to fix the wiring within the large-scale functional block. For this reason, it is difficult to change the shape of large-scale functional blocks, and therefore, when configuring a semiconductor integrated circuit using multiple large-scale functional blocks, it is necessary to avoid overlapping the large-scale functional blocks with each other. This creates wasted area on the semiconductor chip, which increases the area of the semiconductor chip.As semiconductor chips become larger, the wiring length between large blocks also increases. , the disadvantage is that the signal delay time increases.

[0006] Furthermore, when attempting to change the shape of a large-scale functional block, the wiring within the large-scale functional block also changes, causing electrical characteristics such as signal delay time to change depending on the layout. Therefore, there is a drawback that an extra margin must be provided in the circuit design stage, which is a pre-layout process, to account for variations in the electrical characteristics of large-scale functional blocks.

[0007]

Means for Solving the Problems The semiconductor integrated circuit of the present invention has a large-scale functional block constructed by combining a plurality of basic cells, in which at least one of the large-scale functional blocks is As a component of a large-scale functional block, it has independent functions that are related to each other,
It is configured with a plurality of functional blocks connected in parallel via a group of connection terminals for mutual signal exchange.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings.

FIG. 1(a) is a wiring diagram of a large-scale functional block in a first embodiment of the present invention, and FIG. 1(b) is a layout diagram of a large-scale functional block in this embodiment. As shown in FIG. 1(a), the large-scale functional block in this embodiment includes a functional block 11 including a counter 16 as a functional block, a functional block 12 including a register 17 as a functional block, and a parallel connection. The functional blocks 11 and 12 are arranged vertically, and the connecting terminal groups 13 to 15 are arranged vertically.
3 are interconnected to form a large-scale functional blog.

FIG. 1(b) is a layout diagram showing an example in which the large-scale functional blocks shown in FIG. 1(a) are arranged on a semiconductor chip. In FIG. 1(b), large-scale functional blocks 18 and 19 are arranged on the semiconductor chip 20, and the remaining space is provided with a functional block 11.
and 12 are effectively arranged.

FIG. 2(a) is a wiring diagram of a large-scale functional block in a second embodiment of the present invention.
b) is a layout diagram of a large-scale functional block in this embodiment. As shown in FIG. 2(a), the large-scale functional block in this embodiment includes a functional block 21 including a counter 26 as a functional block, a functional block 22 including a register 27 as a functional block, and a parallel connection. The functional blocks 21 and 22 are arranged horizontally and connected to each other at the connecting terminal group 23 to form a large-scale functional block. As described above, this embodiment is a wiring diagram corresponding to a configuration example in which the functional blocks 21 and 22 are arranged horizontally, and is a wiring diagram corresponding to a configuration example in which the functional blocks 21 and 22 are arranged horizontally. The electrical characteristics are the same, only the shape is different. Figure 2 (
As is clear from the layout diagram in b), a large-scale functional block 28 is arranged on the semiconductor chip 29, and furthermore,
Functional blocks 21 and 22 are effectively arranged in the remaining space.

As described above, by appropriately changing the shape of the large-scale functional block, it is possible to eliminate unnecessary areas on the semiconductor chip and further reduce the area of the semiconductor chip.

[0013] In the above explanation, the large-scale functional block is composed of two functional blocks, and
Although the number of connection terminal groups is also explained with reference to a specific example, the present invention is not limited to these conditions, and can be effectively applied regardless of the number of functional blocks and the number of connection terminal groups. Needless to say, this applies.

[0014]

[Effects of the Invention] As explained above, the present invention provides a large-scale functional block by configuring a plurality of sets of functional blocks connected in parallel by changing the positions of connection terminal groups.
It is now possible to arrange large-scale functional blocks on a semiconductor chip in an optimal positional relationship while maintaining predetermined functions and electrical characteristics, making it possible to reduce the area of the semiconductor chip and downsize it. Accordingly,
This has the effect of shortening the length of wiring between large functional blocks and further shortening signal delay time.

[0015] Furthermore, since it is possible to accurately grasp the electrical characteristics of large-scale functional blocks when designing circuits for semiconductor chips, there is no need to allow for extra margins, which has the effect of increasing the degree of freedom in circuit design. be.

[Brief explanation of the drawing]

FIG. 1 is a wiring diagram and a layout diagram of a large-scale functional block in a first embodiment of the present invention.

FIG. 2 is a wiring diagram and a layout diagram of a large-scale functional block in a second embodiment of the present invention.

FIG. 3 is a layout diagram of a large-scale functional block in a conventional example.

[Explanation of symbols]

11, 12, 21, 22 Functional blocks 13-1
5, 23-25 Connection terminal group 16, 26, 32
Counter 17, 27, 33, 35 Register 18, 19,
28, 30, 31 Large-scale functional block 20, 2
9,36 Semiconductor chip 34 Arithmetic unit

Claims (1)

[Claims] Claim 1: In a semiconductor integrated circuit having a large-scale functional block constructed by combining a plurality of basic cells, at least one of the large-scale functional blocks has a plurality of mutually connected components. A semiconductor integrated circuit comprising a plurality of functional blocks having related independent functions and connected in parallel via a group of connection terminals for mutual signal exchange.