JPH04283935A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To furnish a manufacturing method which makes it possible to form with excellent reproducibility a mixed crystal layer of Si and Ge having a prescribed gradient composition and a prescribed impurity distribution, and a manufacturing method of a bipolar transistor wherein the mixed crystal layer is used for a base layer. CONSTITUTION:A P-type Si epitaxial layer 4 is formed by executing an epitaxial growth on an N-type Si substrate 2 with an impurity doped, a non-doped Ge layer 6 is made to grow on the P-type Si epitaxial layer 4, Ge of the Ge layer 6 is diffused in the P-type Si epitaxial layer 4 by heat treatment, and thereby a P-type SiGe mixed crystal layer 8 having a gradient composition wherein the composition of Si and Ge changes continuously is formed.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a mixed crystal layer of Si (silicon) and Ge (germanium) having a predetermined impurity concentration and a predetermined gradient composition, and this mixed crystal layer. The present invention relates to a method of manufacturing a bipolar transistor using the layer as a base layer. In recent years, with the increase in speed of semiconductor devices, bipolar transistors using Si are using a mixed crystal layer of Si and Ge with a gradient composition in the base layer, and using the internal electric field due to the gradient of the energy band to increase the speed. A Peter junction bipolar transistor has been proposed. Therefore, it is desired to form a mixed crystal layer of Si and Ge with a desired composition gradient and a desired impurity distribution with good reproducibility.

0002

2. Description of the Related Art Conventionally, when forming a mixed crystal layer of Si and Ge having a gradient composition, MBE method or CVD method is used.
The growth rate of each of the raw materials Si and Ge is controlled. Furthermore, when introducing impurities into this SiGe mixed crystal layer, the addition of impurities must be controlled at the same time. That is, when doping with impurities, changing the growth rate of Si or Ge changes the growth rate of the mixed crystal layer, so the amount of impurity introduced must be changed in accordance with this change.

0003

As described above, in the conventional method for forming a SiGe mixed crystal layer, it is necessary to control the growth rates of Si and Ge, and also to control the doping of impurities to be added. There are an extremely large number of parameters to be controlled simultaneously. Therefore, there is a problem in that the reproducibility of the gradient composition and impurity distribution in forming the mixed crystal layer is poor.

Therefore, the present invention provides a manufacturing method that can form a mixed crystal layer of Si and Ge having a predetermined composition gradient and a predetermined impurity distribution with good reproducibility, and a bipolar transistor using the mixed crystal layer as a base layer. The purpose is to provide a manufacturing method.

[0005]

[Means for Solving the Problems] The above-mentioned problems include a step of forming a silicon layer doped with a predetermined impurity on a semiconductor substrate, a step of forming a germanium layer on the silicon layer, and a step of forming a germanium layer on the silicon layer by heat treatment. This is achieved by a method for manufacturing a semiconductor device, which comprises a step of diffusing into a silicon layer, and forming a mixed crystal layer of silicon and germanium containing the impurity and having a predetermined composition gradient.

[0006] The above problem also includes a step of forming a silicon layer on a semiconductor substrate, a step of forming a germanium layer doped with a predetermined impurity on the silicon layer,
Diffusing the germanium into the silicon layer by heat treatment, and forming a mixed crystal layer of silicon and germanium containing the impurity and having a predetermined composition gradient. be done.

The above-mentioned problem also includes a step of forming an insulating layer on an emitter layer made of a silicon layer of a first conductivity type, and then selectively etching the insulating layer to form an opening; A silicon layer doped with a second conductivity type impurity is formed on the emitter layer of the second conductivity type, and then a germanium layer is formed on the silicon layer, and then the germanium is diffused into the silicon layer by heat treatment. forming a base region made of a mixed crystal layer of silicon and germanium containing impurities of a conductivity type and having a predetermined composition gradient; and forming a collector layer made of a silicon layer of a first conductivity type on the base layer. This is achieved by a method of manufacturing a semiconductor device characterized by comprising the steps of:

The above-mentioned problem also includes a step of forming an insulating layer on an emitter layer made of a silicon layer of a first conductivity type, and then selectively etching the insulating layer to form an opening; A silicon layer is formed on the emitter layer of the silicon layer, and then a germanium layer doped with a second conductivity type impurity is formed on the silicon layer, and then the germanium is diffused into the silicon layer by heat treatment. forming a base region made of a mixed crystal layer of silicon and germanium containing impurities of a conductivity type and having a predetermined composition gradient; and forming a collector layer made of a silicon layer of a first conductivity type on the base layer. This is achieved by a method of manufacturing a semiconductor device characterized by comprising the steps of:

[0009]

[Operation] The present invention uses Si doped with predetermined impurities.
By growing layers or Ge layers in sequence,
Since the parameters to be controlled during each growth can be reduced, the Si layer and the Ge layer can be stably formed under desired conditions. Furthermore, since Ge is subsequently diffused into the Si layer by heat treatment under separately set conditions, a mixed crystal layer of Si and Ge having a predetermined composition gradient and impurity concentration can be stably formed with good reproducibility.

By applying this method of forming a mixed crystal layer of Si and Ge to the formation of a base layer of a bipolar transistor, it is possible to realize an increase in the speed of the bipolar transistor and contribute to an improvement in productivity.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be explained below based on illustrated embodiments. FIG. 1 is a process diagram showing a method for forming a SiGe mixed crystal layer having a graded composition according to a first embodiment of the present invention. n
After wet-cleaning the type Si substrate 2, it is introduced into an ultra-high vacuum and subjected to heat treatment at a temperature of 800°C for 30 minutes to remove the natural oxide film formed on the surface of the n-type Si substrate 2 (see Figure 1 (a).
)reference).

Next, while keeping the n-type Si substrate 2 at a temperature of 750° C., epitaxial growth is performed while doping with boron (B), for example, to form a p-type Si epitaxial layer 4 with a thickness of 50 nm (see FIG. 1(b)). ). Then,
A non-doped Ge layer 6 with a thickness of 2 nm is grown on the p-type Si epitaxial layer 4 at a temperature of 550° C. (see FIG. 1(c)).

Next, heat treatment is performed at a temperature of 850° C. for 60 minutes. By this heat treatment, the Ge of the Ge layer 6 is converted into p-type S
It diffuses into the i-epitaxial layer 4 to form a p-type SiGe mixed crystal layer 8 with a thickness of about 50 nm in which the composition of Si and Ge changes continuously. At this time, the Ge composition ratio is 20 from the surface of the SiGe mixed crystal layer 8 toward the interface with the n-type Si substrate 2.
It slopes from % to 0%. In this way, a p-type SiGe mixed crystal layer 8 having a graded composition is formed.

As described above, according to the first embodiment, the p-type S
Since the i-epitaxial layer 4 and the non-doped Ge layer 6 are grown in order, there are few parameters to be controlled during the growth of each, and therefore each can be formed with good reproducibility. Since the p-type SiGe mixed crystal layer 8 is formed by diffusing Ge into the Si layer by heat treatment, a desired composition gradient and impurity concentration can be formed stably and with good reproducibility.

Next, a method for forming a SiGe mixed crystal layer having a graded composition according to a second embodiment of the present invention will be described with reference to FIG. The formation method according to the second embodiment is based on the p-type Si epitaxial layer 4 and the non-doped Ge layer shown in FIG.
Instead of growing layer 6 and performing heat treatment, the layer for doping the impurity region is changed from a Si layer to a Ge layer, and a non-doped Si epitaxial layer and a p-type Ge layer are grown and heat treated.

That is, after removing the natural oxide film formed on the surface of the n-type Si substrate 12 (see FIG. 2(a)), the thickness of 50
A non-doped Si epitaxial layer 14 with a thickness of 10 nm is formed (see FIG. 2(b)). Subsequently, a p-type Ge layer 16 with a thickness of 2 nm is grown on this Si epitaxial layer 14 while doping boron at a predetermined concentration (see FIG. 2(c)).
)reference).

Next, heat treatment is performed at a temperature of 850° C. for 60 minutes to diffuse Ge in the p-type Ge layer 16 into the Si epitaxial layer 14 to form a SiGe mixed crystal layer having a graded composition. The boron in layer 16 is also Si
It diffuses into the epitaxial layer 14 to form a uniform concentration distribution throughout the SiGe mixed crystal layer. In this way, as in the case of the first embodiment, the p-type SiGe mixed crystal layer 18 whose Ge composition ratio slopes from 20% to 0% from the surface toward the interface with the n-type Si substrate 2 is formed. Form.

In the first and second embodiments described above, either the Si epitaxial layer or the Ge layer is doped with an impurity, but both the Si epitaxial layer and the Ge layer are doped with a predetermined concentration. It may be doped with an impurity. Next, a method for manufacturing a bipolar transistor in which the method for forming the SiGe mixed crystal layer according to the first embodiment is applied to forming the base layer will be described with reference to FIG.

FIG. 3 is a process cross-sectional view showing a method for manufacturing a bipolar transistor. For example, impurity concentration 1E21/
After forming a silicon oxide film 24 on the n-type Si emitter layer 22 of cm3, the silicon oxide film 24 is selectively etched to form an opening. Subsequently, a p-type SiGe base layer 26 having a graded composition is formed using the method for forming a p-type SiGe mixed crystal layer shown in FIG.

That is, on the n-type Si emitter layer 22 exposed in the opening, a 50 nm thick p-type Si epitaxial layer doped with boron, for example, at a concentration of about 1E19/cm3, and a 2 nm thick non-doped Ge layer were grown in this order. After that, heat treatment is performed at a temperature of 850° C. for 60 minutes to form a p-type SiGe base layer 26 whose Ge composition ratio slopes from 20% to 0% from the surface toward the interface with the n-type Si emitter layer 22. do. Next, p-type SiGe base layer 26
An n-type Si collector layer 28 having an impurity concentration of about 5E16/cm3 is formed thereon.

As described above, by applying the method for forming the SiGe mixed crystal layer shown in FIG. 1, a bipolar transistor having the p-type SiGe base layer 26 can be manufactured. At this time, the graded composition and impurity concentration of the p-type SiGe base layer 26 can be formed stably and with good reproducibility, so the advantages of using a mixed crystal layer with a graded composition as the base layer are fully exhibited, and the bipolar transistor is It is possible to achieve high speed.

It goes without saying that in forming the p-type SiGe base layer 26, the method according to the second embodiment may be used instead of the method for forming the SiGe mixed crystal layer according to the first embodiment. stomach.

[0023]

As described above, according to the present invention, there are a step of forming a silicon layer doped with a predetermined impurity on a semiconductor substrate, a step of forming a germanium layer on the silicon layer, and a step of forming a germanium layer on the silicon layer by heat treatment. By including the step of diffusing germanium into the silicon layer, it is possible to reduce the number of parameters that need to be controlled during the growth of the silicon layer and germanium layer, and because the heat treatment conditions for diffusing germanium into the silicon layer are separately set, the predetermined A mixed crystal layer of Si and Ge having a gradient composition and impurity concentration can be formed stably and with good reproducibility.

Furthermore, by forming the base layer of a semiconductor device using this method, the speed of the semiconductor device can be increased, contributing to improved productivity.

[Brief explanation of the drawing]

FIG. 1 is a process diagram showing a method for forming a SiGe mixed crystal layer having a graded composition according to a first embodiment of the present invention.

FIG. 2 is a process diagram showing a method of forming a SiGe mixed crystal layer having a graded composition according to a second embodiment of the present invention.

3 is a process cross-sectional view for explaining a method for manufacturing a bipolar transistor in which the method for forming a SiGe mixed crystal layer shown in FIG. 1 is applied to forming a base layer; FIG.

[Explanation of symbols]

2...n-type Si substrate 4...p-type Si epitaxial layer 6...Ge layer 8...p-type SiGe mixed crystal layer 12...n-type Si substrate 14...Si epitaxial layer 16...p-type Ge layer 18...p-type SiGe mixed crystal layer 22...n-type Si emitter layer 24...Silicon oxide film 26...p-type SiGe base layer 28...n-type Si collector layer

Claims (4)

[Claims] 1. A step of forming a silicon layer doped with a predetermined impurity on a semiconductor substrate, a step of forming a germanium layer on the silicon layer, and a step of diffusing the germanium into the silicon layer by heat treatment. A method for manufacturing a semiconductor device, comprising: forming a mixed crystal layer of silicon and germanium containing the impurity and having a predetermined composition gradient. 2. Forming a silicon layer on a semiconductor substrate, forming a germanium layer doped with a predetermined impurity on the silicon layer, and diffusing the germanium into the silicon layer by heat treatment. A method for manufacturing a semiconductor device, comprising: forming a mixed crystal layer of silicon and germanium containing the impurity and having a predetermined composition gradient. 3. A step of forming an insulating layer on an emitter layer made of a silicon layer of a first conductivity type, and then selectively etching the insulating layer to form an opening in the emitter layer of the opening. After forming a silicon layer doped with a second conductivity type impurity thereon, and subsequently forming a germanium layer on the silicon layer, the germanium is diffused into the silicon layer by heat treatment, and the second conductivity type impurity is doped. forming a base region made of a mixed crystal layer of silicon and germanium having a predetermined gradient composition; and forming a collector layer made of a silicon layer of a first conductivity type on the base layer. A method for manufacturing a semiconductor device, characterized in that: 4. A step of forming an insulating layer on an emitter layer made of a silicon layer of a first conductivity type, and then selectively etching the insulating layer to form an opening in the emitter layer of the opening. After forming a silicon layer thereon, and subsequently forming a germanium layer doped with a second conductivity type impurity on the silicon layer, the germanium is diffused into the silicon layer by heat treatment, and the second conductivity type impurity is doped. forming a base region made of a mixed crystal layer of silicon and germanium having a predetermined gradient composition; and forming a collector layer made of a silicon layer of a first conductivity type on the base layer. A method for manufacturing a semiconductor device, characterized in that: