JPH04286362A - Ohmic electrode structure of compound semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to an ohmic electrode structure for a compound semiconductor device.

0002

[Prior Art] As a compound semiconductor element, for example, FIG.
As shown in FIG. 1, a HEMT (high electron mobility transistor) having an n-type GaAs/AlGaAs heterojunction is known. This HEMT is made of undoped GaAs on a GaAs substrate 11 by molecular beam epitaxial growth.
layer 12, n-type AlGaAs layer 13, n-type GaAs layer 14
, n+ type GaAs layers 15 are laminated, and this n+ type GaAs layer 15 is stacked.
A source electrode 18a and a drain electrode 18b are formed on the layer 15 by a photo-etching method and a lift-off method. The source electrode 8a, the drain electrode 8
b is an AuGe layer 17a with a thickness of 1000 Å as an electrode layer.
After sequentially laminating a Ni layer 17b with a thickness of 200 Å and an Au layer 17e with a thickness of 1000 Å, heat treatment at about 400° C. (hereinafter referred to as "alloying heat treatment") is performed. Through this alloying heat treatment, the n+ type GaAs layer 15 and the electrode layer are alloyed, and an ohmic contact is obtained.

0003

However, when the electrode layer is composed of three layers, the AuGe layer 17a, the Ni layer 17b, and the Au layer 17e, as described above, the alloying reaction does not occur when the alloying heat treatment is performed. This may occur non-uniformly and the materials 17a, 17b, and 17e of the electrode layer may aggregate. For this reason, there is a drawback that the original electrode shape cannot be maintained and the flatness of the electrode surface becomes poor. In addition, due to non-uniform alloying, there is a drawback that the ohmic contact resistance cannot be sufficiently reduced (contact resistance per unit area is 5 × 10-7 to 3 × 10-6 (Ω・
cm-2) with large variations. ).

[0004] In order to compensate for this drawback, the applicant has developed Ni
We proposed an electrode structure in which a Mo layer is inserted between the Au layer and the Au layer as a barrier to limit the alloying reaction. In other words, the electrode layers include an AuGe layer with a thickness of 2000 Å, a Ni layer with a thickness of 800 Å, a Mo layer with a thickness of 2500 Å, and a layer with a thickness of 4000 Å.
The alloying reaction occurs below the Mo layer. However, this electrode structure has a problem in that pattern formation by the lift-off method is difficult because the total thickness of the electrode layer is as thick as 9300 Å. Here, the AuGe layer is simply 1000 Å and the Ni layer is 200 Å.
However, simply reducing the thickness of each layer such as 1000 Å for the Mo layer and 500 Å for the Au layer cannot suppress the diffusion of Ga from the substrate because the Mo layer is thin, and condensation of the Au layer (metal regression) occurs after alloying heat treatment. ) or the formation of holes on the surface.

Therefore, an object of the present invention is to prevent agglomeration from occurring when alloying heat treatment is performed, thereby improving the edge shape and surface flatness of the electrode, reducing contact resistance, and making it possible to form a pattern using the lift-off method. An object of the present invention is to provide an ohmic electrode structure for a compound semiconductor device that can be easily formed.

In order to achieve the above object, the ohmic electrode structure of the compound semiconductor device of the present invention includes an AuGe layer, a Ni layer, a Mo layer, a Ti layer, and an Au layer as electrode layers on the compound semiconductor. It is characterized in that these are stacked in order.

[0007]

[Operation] When alloying heat treatment is performed, semiconductor elements such as Ga that diffuse from the compound semiconductor side to the electrode layer side are
It reacts with Ti in the layer to form a stable alloy layer. That is, the Ti layer (and Mo layer) having a high melting point acts as an effective barrier. Therefore, when alloying heat treatment is performed,
No agglomeration of electrodes occurs. Therefore, the surface flatness and edge shape of the electrode are improved compared to the conventional electrode, and the contact resistance is also reduced, resulting in a good ohmic contact. Furthermore, since the Ti layer acts as an effective barrier, the thickness of the electrode layer can be set thin. Therefore, pattern formation by the lift-off method can be easily performed.

[0008]

EXAMPLES Hereinafter, the ohmic electrode structure of the compound semiconductor device of the present invention will be explained in detail by way of examples. Note that here, a case where the present invention is applied to HEMT will be described.

First, as shown in FIG. 1(a), GaAs
On a substrate 1, an undoped GaAs layer 2, an n-type AlGaAs layer 3, an n-type Ga layer are formed by molecular beam epitaxial growth.
An As layer 4 and an n+ type GaAs layer 5 are laminated. A resist 6 is applied onto this n+ type GaAs layer 5, and a source electrode hole 6a and a drain electrode hole 6b are formed in the resist 6 by photoetching, spaced apart by a distance of 2 μm. Buffered hydrochloric acid is then used to clean the substrate surface (i.e. n
After cleaning the surface of the + type GaAs layer 5, Au is deposited as an electrode layer by resistance heating evaporation or electron beam evaporation.
Ge layer 7a, Ni layer 7b, Mo layer 7c, and Ti layer 7
d and the Au layer 7e are sequentially laminated. Here, the thickness of the AuGe layer 7a is 1000 Å, and the thickness of the Ni layer 7b is 200 Å.
, the thickness of the Mo layer 7c is 500 Å, and the thickness of the Ti layer 7d is 500 Å.
00 Å, and the thickness of the Au layer 7e is set to 1000 Å (total thickness 3200 Å). Next, as shown in FIG. 1(c), the resist 6 is removed using an organic solvent.
A source electrode 8a and a drain electrode 8b made of the electrode layer 7 and having a predetermined shape are formed by a lift-off method. Thereafter, alloying heat treatment is performed at 410° C. for 1 minute in a N2 atmosphere to obtain an ohmic contact.

According to this electrode structure (electrode layer 7), during alloying heat treatment, Ga diffused from the n+ type GaAs layer 5 side to the electrode layer 7 side reacts with Ti in the Ti layer 7d and becomes stable. Form an alloy layer. That is, the Ti layer 7d having a high melting point
(and Mo layer 7c) acts as an effective barrier. Therefore, when the alloying heat treatment is performed, agglomeration of the electrodes 8a and 8b does not occur. Therefore, the surface flatness and edge shape of the electrodes 8a, 8b can be improved compared to the conventional ones. Furthermore, contact resistance can be reduced, and good ohmic contact can be obtained. Furthermore, since the Ti layer 7d acts as an effective barrier, the thickness of the electrode layer 7 can be set thin. Therefore, pattern formation by the lift-off method can be easily performed.

Actually, the n+ type GaAs layer 5 and the electrodes 8a, 8
When we measured the relationship between the contact resistance ρc per unit area of the ohmic junction between b and the heat treatment temperature, we found that Figure 2
The results shown are obtained. In other words, in the conventional electrode structure, when alloying heat treatment is performed at 400°C or higher, the contact resistance ρc is 5 x 10-7 to 3 x 10-6 (Ωcm).
-2), but with this electrode structure, 4
The contact resistance ρc at 10°C (as seen in Figure 2, 410°C is the optimal value for the heat treatment temperature) is 1×
It is stable at around 10-6 (Ω·cm-2). Also,
Even when the heat treatment temperature is raised to 430°C, the electrodes 8a, 8
The surface condition and edge shape of sample b were good. In this way, a good ohmic junction could be formed and the characteristics could be improved.

[0012] In this embodiment, the HEMT electrodes 8a,
8b has been described, but of course it is not limited to this. The present invention can be widely applied to compound semiconductor devices in general such as FETs, Hall elements, and laser diodes.

[0013]

As is clear from the above, the ohmic electrode structure of the compound semiconductor device of the present invention includes an AuGe layer, a Ni layer, a Mo layer, a Ti layer, and an Au layer as electrode layers on a compound semiconductor. Since the layers are laminated in order, the Ti layer and Mo layer act as barrier layers when alloying heat treatment is performed, and in particular, the Ti layer acts as a barrier layer when the alloying heat treatment is performed.
For example, by reacting with Ga) to form a stable alloy layer, it is possible to prevent the electrode layer from agglomerating. Therefore, the edge shape and surface flatness of the electrode can be improved, contact resistance can be reduced, and pattern formation can be performed by the lift-off method.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a process of forming an electrode structure of a HEMT according to an embodiment of the present invention.

FIG. 2 is a diagram showing the relationship between the contact resistance of the HEMT electrode and the heat treatment temperature.

FIG. 3 is a diagram showing the electrode structure of a conventional HEMT.

[Explanation of symbols]

1 GaAs substrate 2 Undoped GaAs layer 3 N-type AlGaAs layer 4 N-type GaAs layer 5 n+ type GaAs layer 6 Resist 6a Source electrode hole 6b Drain electrode hole 7 Electrode layer 7a　AuGe layer 7b Ni layer 7c Mo layer 7d Ti layer 7e Au layer 8a Source electrode 8b Drain electrode

Claims (1)

[Claims] Claim 1: A compound semiconductor having an electrode layer formed on the compound semiconductor.
An ohmic electrode structure for a compound semiconductor device, characterized in that a uGe layer, a Ni layer, a Mo layer, a Ti layer, and an Au layer are laminated in this order.