JPH04287353A - Outer lead for integrated circuit and its manufacture - Google Patents

Abstract

PURPOSE:To reduce the interval of outer leads for an IC, and realize high density packaging. CONSTITUTION:A plurality of outer leads 31, 32 for an IC are turned into pairs of every two leads, which are stacked via insulator 40. The leads of each pair are vertically bent. End portions of the vertical parts 31b, 32b are bent so as to open to each other, thereby forming a soldering part. As compared with an IC package having the same external size as conventional one, the twofold number of leads can be arranged, and the packaging density can be increased by that amount. The area on the printed wiring board surface occupied by the outer leads can also reduced. Productivity also is excellent.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to an integrated circuit (hereinafter referred to as "IC") packaged in a plastic mold, for example.
The present invention relates to the structure of an external lead for a device (denoted as ”) and a method of manufacturing the external lead.

0002

[Prior Art] In IC packages currently in practical use, a plurality of external leads extending laterally from the package body have equal horizontal lengths, and these external leads are bent to connect the ends to a printed wiring board. The IC package is mounted on a printed wiring board by soldering to the pads on the surface. However, the pitch limit between each lead is
It depends on the pitch between each pad on the printed wiring board side to be soldered. Its limits are limited by the ability of the solder supply device, solder reflow technology, and the like. The current pitch between external leads is about 0.5 mm, and due to the demand for high-density packaging and multi-lead design, miniaturization has been attempted by narrowing the pitch of the multiple external leads. Due to the limitations of mounting technology, it is not possible to meet these demands simply by increasing the density of mounting and increasing the number of leads. For this reason, various technological developments are being carried out, one example of which is the proposal for a structure of external leads for ICs that supports fine pitch and multi-pins in the Utility Model Application Publication No. 2-45650 "Flat Lead Package". has been done. Its structure is as shown in FIG.
In a flat lead package including a plurality of external leads 1 and 2 extending laterally (in the direction of arrow X) from the package body 5, a horizontal portion 1a extends laterally from the package body 5
, 2a with different lengths are arranged alternately in a staggered manner, and the soldered portions 1b, 2b of these external leads are arranged in a staggered manner.
The directions of bending are alternately opposite.

0003

[Problems to be Solved by the Invention] However, in such an external lead configuration, a large number of leads must be arranged in the length direction of the IC package body (in the direction of arrow Y). This naturally limits miniaturization and fine pitch, and since the length of the external leads in the horizontal direction is different, conventional technology cannot be used to bend the external leads. There are production technology difficulties. Furthermore, in microelectronic devices such as 8mm video cameras, the printed wiring board must be made smaller and a large number of components must be mounted. If there is no space available on the printed wiring board surface, it is necessary to minimize the area occupied by the external leads on the printed wiring board surface. This invention attempts to eliminate these drawbacks, and aims to achieve finer pitch without increasing the size of the IC package body even when it is necessary to derive a large number of leads, and to increase productivity. It is also intended to reduce the area occupied by the external leads when mounted on the surface of a printed wiring board.

0004

[Means for solving the problem] Therefore, in this invention,
The above problem was solved by configuring a plurality of external leads for an IC in pairs, stacking them in pairs with an insulator in between, and bending the soldered portions of the leads of each pair in the direction in which they open from each other.

[0005]

[Operation] Therefore, if the structure of the external lead for IC of the present invention is adopted, even if the external shape of the IC package body is the same as that of the conventional one, twice the number of leads can be arranged, resulting in high density. implementation becomes possible.

[0006]

Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a diagram showing a first embodiment of the structure of an external lead for an IC according to the present invention, in which FIG. 1A is a partial perspective view, FIG. 1B is a partial side view of a vertical portion of the external lead, is the I of this invention
A partial perspective view showing a second embodiment of the structure of an external lead for C, and FIGS. 3 and 4 are process diagrams showing a method of manufacturing an external lead for IC according to the present invention.

First, a first embodiment of the structure of an external lead for an IC according to the present invention will be described with reference to FIG. The code 10 is I
This is the main body of the C package and is indicated by a dashed line. Reference numeral 20 denotes an IC chip, on which a required number of bond pads 21, 22, . In this embodiment, only two bond pads 21 and 22 are shown for convenience. Corresponding to these bond pads 21 and 22, external leads 31 and 32 are laminated and arranged in the vicinity thereof with an insulator 40, for example, a polyimide film having a thickness of 0.1 mm interposed therebetween. The external leads 31 and 32 are connected to the IC chip 2, respectively.
horizontal portions 31a and 32a that extend in the transverse direction with respect to 0, that is, in the direction of arrow The length of the horizontal part 32a on the bond pad 22 side is made short, and the end of the external lead 31 is exposed from the end thereof. With this configuration, the bond pad 21 can be bonded to the surface of the exposed end of the horizontal portion 31a using the gold wire 51, and the bond pad 22 can be bonded to the surface of the exposed end of the horizontal portion 31a using the gold wire 52.
It can be bonded onto the end surface of 2a. Vertical parts 31b, 32
The ends of the external leads 31 and 32 of b are bent in the direction of opening each other so as to form an arc shape. The lengths of the external leads 31 and 32 of the vertical portions 31b and 32b are adjusted so that the vertices of both arcs formed by this bending are on the same plane, and when mounted on the printed wiring board surface, either one Configure so that external leads do not float. In addition,
These ends do not have to be bent in an arc shape, and may be bent at right angles to open each other as shown in Figure B. This shape is preferable because it easily sinks into the solder on the pad.

Next, a second embodiment of the structure of an external lead for an IC according to the present invention will be described with reference to FIG. Note that the same parts as in the configuration of the embodiment shown in FIG. 1 are given the same reference numerals. If the gap between the bond pads 21 and 22 can be relatively wide,
The horizontal portions 31a and 32a of both external leads 31 and 32 are arranged close to the bond pad 21 with the end of the horizontal portion 31a in a straight line, and the end of the horizontal portion 32a is placed right at a right angle with respect to the horizontal portion 32a. (or to the left), then bend it to the left at a right angle with a predetermined interval, that is, parallel to the end of the horizontal part 31a, and with dimensions that are the same height as the end of the horizontal part 31a. It is configured to be bent downward and placed close to the bond pad 22 . With this configuration, the bond pad 21 can be bonded with the gold wire 51 onto the surface of the linearly extending end of the horizontal portion 31a, and the bond pad 22 can be bonded with the gold wire 52 on the horizontal end surface formed in a crank shape. Part 32
It can be bonded onto the end surface of a.

Next, a method of manufacturing the external leads 31 and 32 of the first embodiment shown in FIG. 1 will be explained using FIG. 3. Figure A shows a first lead frame 60 made of iron alloy, copper alloy, etc., including a die pad 61 and tie bars 6.
A plurality of external leads 31 are punched out at predetermined intervals (equal intervals in this embodiment). Therefore, the portion 63 is a space. This is the first unit lead frame. Although only one unit lead frame is shown in the figure, usually several or more than ten such unit lead frames are formed to form the lead frame 60.
It consists of

FIG. B shows a second lead frame 70 also made of iron alloy, copper alloy, etc., in which only the same number of external leads 32 as the external leads 31 in FIG. A are punched out. . The length of these external leads 32 is
As explained in the explanation of FIG. 1, the length is shorter than the length of the external lead 31. However, the spacing between the external leads 32 is the same as the spacing between the external leads 31 in Figure A. code 7
Part 1 is space. This is a second unit lead frame, and like the first lead frame 60, several or more than ten unit lead frames are formed to constitute the lead frame 70.

Next, as shown in Figure C, a polyimide tape 40 with a thickness of about 0.1 mm is coated with adhesive on both sides.
is bonded as an insulator so as to span over the plurality of external leads 31 of the first unit lead frame, and then the second unit lead frame is placed on top of the plurality of external leads 32 of the first unit lead frame.
are stacked so as to overlap the external leads 31 and bonded.

The IC chip 20 is placed on the die pad 61 of such a laminated lead frame 80, and the IC chip 20
bond pads 21, 22... and the horizontal portion 3 of each lead.
1a, 32a... with gold wires 51, 52..., and then cover the IC chip 20 and these connection parts until the parts indicated by the dashed-dotted lines L1-L1 and L2-L2. , molded with plastic, IC package body 1
form 0. Next, the individual IC packages mounted in this way are cut from the laminated lead frame 80, and all the external leads 31, 3 of the unit lead frame are cut.
2 is bent vertically to form vertical parts 31b and 32b. Figure D is an enlarged view of the leads of these vertical parts 31b and 32b.Finally, as shown in Figure E, by bending the vertical parts 31b and 32b in the direction of opening each other, the external IC for the present invention is formed. A lead can be formed.

Next, a method of manufacturing the external leads 31 and 32 of the second embodiment shown in FIG. 2 will be explained using FIG. 4. In order to avoid duplicate explanation, the same components as in Fig. 3,
Omit or simplify process explanations, etc. The configuration of the first lead frame 60 in FIG. A is the same as that in FIG. 3A. The second lead frame 70 shown in FIG. Arranged and configured. FIG. C shows the first and second lead frames 60 and 70 laminated and bonded via the insulator of polyimide tape 40, as explained in FIG. 3C. The subsequent steps are the same as those described in conjunction with FIG. 3, and therefore will be omitted.

[0014]

As described above, the external leads for an IC according to the present invention are constructed by stacking two leads in pairs with an insulator interposed therebetween, and bending the soldered portions of each pair of leads in the direction in which they open from each other. Therefore, if the external dimensions of the IC package are the same, twice the number of leads can be arranged compared to the conventional one, so ICs can be mounted at a higher density. The area occupied on the surface can be reduced. Furthermore, compared to the staggered external leads described in the above-mentioned publication, the external leads of the present invention are arranged in a straight line, so the vertical parts can be bent just like conventional external leads. It has excellent effects such as being easy to manufacture and increasing productivity accordingly.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a first embodiment of the structure of an external lead for an IC according to the present invention; FIG. 1A is a partial perspective view thereof, and FIG. 1B is a partial side view of a vertical portion of the external lead. .

FIG. 2 is a partial perspective view showing a second embodiment of the structure of an external lead for an IC according to the present invention.

FIG. 3 is a partial process diagram showing a method for manufacturing an external lead for an IC according to a first embodiment of the present invention.

FIG. 4 is a partial process diagram showing a method of manufacturing an external lead for an IC according to a second embodiment of the present invention.

FIG. 5 is a perspective view showing the configuration of a conventional IC external lead.

[Explanation of symbols]

10 IC package body 20 IC chip 21 Bond pad 22 Bond pad 31 External lead 31a Horizontal part 31b Vertical part 32 External lead 32a Horizontal part 32b Vertical part 40 Insulator 51 Gold wire 52 Gold wire 60 First lead frame 61 Die pad 62 Tie bar 63 Space 70 Second lead frame 71 Space 80 Laminated lead frame

Claims (2)

[Claims] 1. An integrated circuit characterized in that a plurality of external leads for an integrated circuit are stacked in pairs with an insulator interposed therebetween, and the soldered portions of each pair of leads are bent in a direction in which they open from each other. External lead for circuit. 2. A first lead frame in which a plurality of unit lead frames each having a plurality of leads formed thereon are arranged, and a unit lead frame in which the same number of leads are formed at the same intervals, although the shape is partially different from these leads. manufacture of an external lead for an integrated circuit, characterized in that the first plurality of unit lead frames and a plurality of second lead frames arranged at the same intervals are laminated and fixed at the lead portion via an insulator. Method.