JPH04292020A - Squelch circuit for fm receiver - Google Patents

Squelch circuit for fm receiver

Info

Publication number
JPH04292020A
JPH04292020A JP8185191A JP8185191A JPH04292020A JP H04292020 A JPH04292020 A JP H04292020A JP 8185191 A JP8185191 A JP 8185191A JP 8185191 A JP8185191 A JP 8185191A JP H04292020 A JPH04292020 A JP H04292020A
Authority
JP
Japan
Prior art keywords
circuit
signal
receiver
operational amplifier
squelch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8185191A
Other languages
Japanese (ja)
Other versions
JPH07105735B2 (en
Inventor
Yoshihiko Tezuka
手塚 吉彦
Shinji Sakai
伸司 酒井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japan Radio Co Ltd
Nagano Japan Radio Co Ltd
Original Assignee
Japan Radio Co Ltd
Nagano Japan Radio Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Japan Radio Co Ltd, Nagano Japan Radio Co Ltd filed Critical Japan Radio Co Ltd
Priority to JP8185191A priority Critical patent/JPH07105735B2/en
Publication of JPH04292020A publication Critical patent/JPH04292020A/en
Publication of JPH07105735B2 publication Critical patent/JPH07105735B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Noise Elimination (AREA)

Abstract

PURPOSE:To drastically improve response speed related to the detection of a squelch control point. CONSTITUTION:A detection circuit 4 to detects a noise component Sn obtained from a demodulation circuit 2 or a carrier component Sc obtained from an intermediate frequency amplification circuit 3 and a rectification circuit 5 to convert the output signal So of the detection circuit 4 into a DC signal Sd are provided. Especially, the output signal So is imparted to the input part 6a of one side of an operational amplifier 6, and simultaneously, the output signal So is imparted to the input part 6c of the other side of the operational amplifier 6 after removing the DC component of the output signal So by interposing a coupling capacitor Cc to the input part 6b of the other side of the operational amplifier 6, and the DC signal Sd is obtained from the output part 6c of the operational amplifier 6.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は受信機入力が一定レベル
以下になったときに、受信機出力を断つようにしたFM
受信機のスケルチ回路に関する。
[Industrial Application Field] The present invention is an FM system that cuts off the receiver output when the receiver input falls below a certain level.
Regarding the squelch circuit of the receiver.

【0002】0002

【従来の技術】一般に、FM受信機は受信機入力(電界
強度)が大きいときは、振幅制限作用によりノイズは極
めて小さい。ところが、受信機入力が所定レベル以下に
なった場合には、ノイズが非常に増加する。このため、
FM受信機では、ノイズ成分の大きさを検出し、この検
出結果によりスケルチ制御部を作動させるとともに、例
えば、低周波増幅回路のバイアスを変化させ、その動作
を停止させることにより、受信機出力を断つようにした
スケルチ回路を設けている。
2. Description of the Related Art Generally, in an FM receiver, when the receiver input (field strength) is large, the noise is extremely small due to the amplitude limiting effect. However, when the receiver input falls below a predetermined level, noise increases significantly. For this reason,
In an FM receiver, the magnitude of the noise component is detected, and the squelch control section is activated based on the detection result, and the receiver output is controlled by, for example, changing the bias of the low frequency amplifier circuit and stopping its operation. A squelch circuit is provided to disconnect the signal.

【0003】図4は従来のスケルチ回路の概略構成を示
す。同図中、符号30で示すFM受信機は、アンテナ3
1、高周波増幅回路32、中間周波増幅回路33、復調
回路34、低周波増幅回路35、スピーカ36を備え、
公知のFM受信機本体を構成している。また、37はス
ケルチ回路、特に、スケルチ制御信号Ssを得るスケル
チ制御部である。同制御部37は復調回路34からノイ
ズフィルタ38によりノイズ成分Snを取り出すととも
に、ノイズ成分Snを検波ダイオードD10、D11に
より検波し、さらに、コンデンサC10及び抵抗R10
からなる時定数回路39を介して直流信号Edに変換す
る。そして、コンパレータ40の一方の入力部に当該直
流信号Edを付与するとともに、他方の入力部に基準レ
ベル回路41からの基準電圧Esを付与する。これによ
り、ノイズ成分Snが増加し、直流信号Edが基準電圧
Esよりも大きくなったなら、コンパレータ40からス
ケルチ制御信号Ssを出力し、例えば、低周波増幅回路
35のバイアスを変化させることにより、その動作を停
止させるスケルチ制御を行う。
FIG. 4 shows a schematic configuration of a conventional squelch circuit. In the same figure, the FM receiver indicated by the reference numeral 30 has an antenna 3.
1, comprising a high frequency amplification circuit 32, an intermediate frequency amplification circuit 33, a demodulation circuit 34, a low frequency amplification circuit 35, and a speaker 36,
It constitutes a known FM receiver main body. Further, 37 is a squelch circuit, particularly a squelch control section that obtains a squelch control signal Ss. The control section 37 extracts the noise component Sn from the demodulation circuit 34 using the noise filter 38, detects the noise component Sn using the detection diodes D10 and D11, and also detects the noise component Sn using the detection diodes D10 and D11.
It is converted into a DC signal Ed via a time constant circuit 39 consisting of. Then, the DC signal Ed is applied to one input part of the comparator 40, and the reference voltage Es from the reference level circuit 41 is applied to the other input part. As a result, if the noise component Sn increases and the DC signal Ed becomes larger than the reference voltage Es, the squelch control signal Ss is output from the comparator 40 and, for example, by changing the bias of the low frequency amplifier circuit 35, Squelch control is performed to stop the operation.

【0004】0004

【発明が解決しようとする課題】しかし、上述した従来
のスケルチ回路37は、検波ダイオードD10、D11
によりノイズ成分Snを検波するとともに、コンデンサ
C10及び抵抗R10からなる時定数回路(平滑回路)
39を介して直流信号Edに変換しているため、時定数
回路39における時定数がかなり大きくなり、スケルチ
制御点の検出にかかる応答遅れによって、例えば、FM
トランシーバでは呼出時間に大きな遅れを生ずる等の問
題があった。
[Problems to be Solved by the Invention] However, the conventional squelch circuit 37 described above has
The noise component Sn is detected by the time constant circuit (smoothing circuit) consisting of the capacitor C10 and the resistor R10.
39, the time constant in the time constant circuit 39 becomes considerably large, and due to the response delay required to detect the squelch control point, e.g.
Transceivers have had problems such as large delays in ringing time.

【0005】本発明はこのような従来の技術に存在する
課題を解決したものであり、スケルチ制御点の検出にか
かる応答速度を飛躍的に高めることができるFM受信機
のスケルチ回路の提供を目的とする。
The present invention solves the problems existing in the conventional technology, and aims to provide a squelch circuit for an FM receiver that can dramatically increase the response speed for squelch control point detection. shall be.

【0006】[0006]

【課題を解決するための手段】本発明は復調回路2から
得るノイズ成分Sn又は中間周波増幅回路3から得るキ
ャリア成分Scを検波する検波回路4と、検波回路4の
出力信号Soを直流信号Sdに変換する直流化回路5を
備え、直流信号Sdの大きさにより、受信機入力が一定
レベル以下になったことを検出して、受信機出力を断つ
ようにしたFM受信機のスケルチ回路1を構成するに際
して、特に、出力信号Soをオペアンプ6の一方の入力
部6bに付与するとともに、オペアンプ6の他方の入力
部6aに、例えば、カップリングコンデンサCcを介す
ることにより、出力信号Soの直流成分を除去して付与
し、これにより、オペアンプ6の出力部6cから直流信
号Sdを得るようにした直流化回路5を備えることを特
徴とする。
[Means for Solving the Problems] The present invention includes a detection circuit 4 that detects a noise component Sn obtained from a demodulation circuit 2 or a carrier component Sc obtained from an intermediate frequency amplification circuit 3, and a detection circuit 4 that detects a noise component Sn obtained from a demodulation circuit 2 or a carrier component Sc obtained from an intermediate frequency amplification circuit 3; The squelch circuit 1 of the FM receiver is equipped with a DC converting circuit 5 for converting the DC signal Sd into a DC signal Sd, and detects that the receiver input has fallen below a certain level based on the magnitude of the DC signal Sd, and cuts off the receiver output. When configuring, in particular, the output signal So is applied to one input section 6b of the operational amplifier 6, and the DC component of the output signal So is connected to the other input section 6a of the operational amplifier 6 through, for example, a coupling capacitor Cc. The present invention is characterized in that it includes a direct current converting circuit 5 configured to remove and apply a direct current signal Sd, thereby obtaining a direct current signal Sd from the output section 6c of the operational amplifier 6.

【0007】[0007]

【作用】本発明に係るFM受信機のスケルチ回路1によ
れば、例えば、復調回路2から得る周波数70kHz前
後のノイズ成分Snは検波回路4により検波されるとと
もに、検波回路4の出力信号Soは直流化回路5により
直流信号Sdに変換される。これにより、スケルチ回路
1は直流信号Sdの大きさを監視し、受信機入力が一定
レベル以下、即ち、直流信号Sdの大きさが一定レベル
以上になったなら、受信機出力を断つようにスケルチ制
御を行う。
[Operation] According to the squelch circuit 1 of the FM receiver according to the present invention, for example, the noise component Sn with a frequency of around 70 kHz obtained from the demodulation circuit 2 is detected by the detection circuit 4, and the output signal So of the detection circuit 4 is detected by the detection circuit 4. The DC signal Sd is converted into a DC signal Sd by the DC conversion circuit 5. As a result, the squelch circuit 1 monitors the magnitude of the DC signal Sd, and when the receiver input becomes less than a certain level, that is, the magnitude of the DC signal Sd becomes more than a certain level, the squelch circuit 1 performs a squelch operation to cut off the receiver output. Take control.

【0008】この際、直流化回路5におけるオペアンプ
6の入力部6aには、カップリングコンデンサCcを経
て出力信号Soが付与されるため、入力部6aに入力す
る入力信号Siは図2(B)に示す交流成分Saのみと
なる。一方、オペアンプ6の入力部6bには、カップリ
ングコンデンサを経ることなく出力信号Soが付与され
るため、入力部6bに入力する入力信号Sjは図2(A
)に示す交流成分Saと直流成分Sfを含む信号となる
At this time, since the output signal So is applied to the input section 6a of the operational amplifier 6 in the DC conversion circuit 5 via the coupling capacitor Cc, the input signal Si input to the input section 6a is as shown in FIG. 2(B). There is only the AC component Sa shown in FIG. On the other hand, since the output signal So is applied to the input section 6b of the operational amplifier 6 without passing through the coupling capacitor, the input signal Sj input to the input section 6b is as shown in FIG.
) is a signal containing an AC component Sa and a DC component Sf.

【0009】よって、オペアンプ6を完全な差動増幅器
として作動させることにより、入力信号Siと入力信号
Sjの差分を増幅すれば、交流成分は打ち消されるため
、オペアンプ6の出力部6cには図2(C)に示す直流
信号Sdのみが得られる。この際、直流化回路5には時
定数の大きい時定数回路やヒステリシス幅の大きいヒス
テリシス回路を含まないため、回路上の応答遅れは無く
なる。
Therefore, if the difference between the input signal Si and the input signal Sj is amplified by operating the operational amplifier 6 as a complete differential amplifier, the alternating current component is canceled out, so that the output section 6c of the operational amplifier 6 has the voltage shown in FIG. Only the DC signal Sd shown in (C) is obtained. At this time, since the DC conversion circuit 5 does not include a time constant circuit with a large time constant or a hysteresis circuit with a large hysteresis width, there is no response delay in the circuit.

【0010】0010

【実施例】次に、本発明に係る好適実施例を挙げ、図面
に基づき詳細に説明する。
Embodiments Next, preferred embodiments of the present invention will be described in detail with reference to the drawings.

【0011】まず、本発明に係るFM受信機及びスケル
チ回路1の構成について、図1を参照して説明する。
First, the configuration of the FM receiver and squelch circuit 1 according to the present invention will be explained with reference to FIG.

【0012】同図中、PはFM受信機を示し、アンテナ
11、高周波増幅回路12、中間周波増幅回路3、マル
チプライヤ2a及び位相シフタ2bを含む復調回路2、
低周波増幅回路13、スピーカ14を備え、公知のFM
受信機本体を構成する。
In the figure, P indicates an FM receiver, which includes an antenna 11, a high frequency amplification circuit 12, an intermediate frequency amplification circuit 3, a demodulation circuit 2 including a multiplier 2a and a phase shifter 2b;
It is equipped with a low frequency amplification circuit 13 and a speaker 14, and is a known FM
Configure the receiver body.

【0013】また、1はスケルチ回路であり、特に、ス
ケルチ制御部1sを示す。スケルチ制御部1sは検波回
路4、直流化回路5、コンパレータ15を備え、検波回
路4の入力側はノイズフィルタ16及びコンデンサ17
を介して復調回路2に接続する。なお、検波回路4は検
波ダイオードD1、D2を備える。一方、直流化回路5
はオペアンプ6を備え、一つの入力部(反転入力部)6
aはカップリングコンデンサCc及び抵抗R1の直列回
路を介して検波回路4の出力側に接続するとともに、他
の入力部(非反転入力部)6bは抵抗R2を介して検波
回路4の出力側に接続する。さらにまた、オペアンプ6
の出力部6cはコンパレータ15の一方の入力部15a
に接続し、コンパレータ15の他方の入力部15bは基
準レベル設定部(可変抵抗)18に接続する。基準レベ
ル設定部18からは基準信号(基準電圧)Seが付与さ
れる。なお、R3、R4、R5、R6は抵抗を示す。
[0013] Reference numeral 1 denotes a squelch circuit, particularly a squelch control section 1s. The squelch control section 1s includes a detection circuit 4, a direct current conversion circuit 5, and a comparator 15, and the input side of the detection circuit 4 is a noise filter 16 and a capacitor 17.
It is connected to the demodulation circuit 2 via. Note that the detection circuit 4 includes detection diodes D1 and D2. On the other hand, the DC conversion circuit 5
is equipped with an operational amplifier 6, and one input section (inverting input section) 6
a is connected to the output side of the detection circuit 4 via a series circuit of a coupling capacitor Cc and a resistor R1, and the other input section (non-inverting input section) 6b is connected to the output side of the detection circuit 4 via a resistor R2. Connecting. Furthermore, operational amplifier 6
The output section 6c is one input section 15a of the comparator 15.
The other input section 15b of the comparator 15 is connected to a reference level setting section (variable resistor) 18. A reference signal (reference voltage) Se is provided from the reference level setting section 18. Note that R3, R4, R5, and R6 represent resistance.

【0014】次に、本発明に係るスケルチ回路1の全体
動作について、図1を参照して説明する。
Next, the overall operation of the squelch circuit 1 according to the present invention will be explained with reference to FIG.

【0015】まず、復調回路2から得る復調信号はコン
デンサ17及びノイズフィルタ16を介してノイズ成分
Snとして取り出されるとともに、検波回路4により検
波される。検波回路4の出力信号Soは直流化回路5に
より直流化処理され、その出力側、即ち、オペアンプ6
の出力部6cには直流信号Sdを得る。なお、この場合
、オペアンプ6はノイズ成分Snに対して完全に差動増
幅させることが望ましい。
First, a demodulated signal obtained from the demodulation circuit 2 is extracted as a noise component Sn via a capacitor 17 and a noise filter 16, and is detected by a detection circuit 4. The output signal So of the detection circuit 4 is converted into a DC signal by a DC converting circuit 5, and the output signal So is converted into a DC signal by a DC converting circuit 5.
A DC signal Sd is obtained at the output section 6c. In this case, it is desirable that the operational amplifier 6 performs completely differential amplification with respect to the noise component Sn.

【0016】よって、この直流信号Sdの大きさは電界
強度が大きくなれば小さくなり、電界強度が小さくなれ
ば大きくなるため、コンパレータ15は直流信号Sdの
大きさを監視し、直流信号Sdの大きさが予め設定した
基準電圧Seよりも小さいときは、スケルチ制御信号S
sは出力せず、スケルチが解除された状態でFM受信機
は作動する。しかし、直流信号Sdの大きさが基準電圧
Seよりも大きくなったときは、コンパレータ15の出
力部15cからスケルチ制御信号Ssを出力し、例えば
、低周波増幅回路13のバイアスを変化させ、その動作
を停止させることにより、受信機出力を断つスケルチ制
御を行う。
Therefore, the magnitude of this DC signal Sd decreases as the electric field strength increases, and increases as the electric field strength decreases. Therefore, the comparator 15 monitors the magnitude of the DC signal Sd, and When the voltage is smaller than the preset reference voltage Se, the squelch control signal S
s is not output, and the FM receiver operates with the squelch canceled. However, when the magnitude of the DC signal Sd becomes larger than the reference voltage Se, the squelch control signal Ss is output from the output section 15c of the comparator 15, and, for example, the bias of the low frequency amplifier circuit 13 is changed, and its operation is By stopping the signal, squelch control is performed to cut off the receiver output.

【0017】一方、図3には変更実施例を示す、図1で
示した前記実施例は復調回路2から得るノイズ成分Sn
を利用したが、変更実施例は中間周波増幅回路3から得
るキャリア成分Scを利用する。なお、図3において、
図1と同一部分には同一符号を付し、その詳細な説明は
省略する。
On the other hand, FIG. 3 shows a modified embodiment. In the embodiment shown in FIG.
However, in the modified embodiment, the carrier component Sc obtained from the intermediate frequency amplification circuit 3 is used. In addition, in FIG. 3,
Components that are the same as those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

【0018】変更実施例において、中間周波増幅回路3
は第一中間周波増幅部3a、第二中間周波増幅部3b、
第三中間周波増幅部3cを備えるため、検波回路4を構
成する各検波ダイオードD3、D4、D5はそれぞれの
中間周波増幅部3a…に接続する。よって、キャリア成
分Sc…は検波回路4により検波され、その出力は対数
増幅部20を介し、出力信号Soとして直流化回路5の
入力側に付与され、以下、図1で示した前記実施例と同
様に処理される。ただし、キャリア成分Scの大きさは
電界強度が大きくなれば、それに比例して大きくなるた
め、コンパレータ15は直流化回路5から得る直流信号
Sdの大きさを監視し、予め設定した基準電圧Se以下
になったときに、スケルチ制御信号Ssを出力する。こ
のように、変更実施例における直流化回路5も、図1で
示した実施例と同様に構成され、かつ機能する。
In a modified embodiment, the intermediate frequency amplification circuit 3
are a first intermediate frequency amplification section 3a, a second intermediate frequency amplification section 3b,
Since the third intermediate frequency amplification section 3c is provided, each of the detection diodes D3, D4, D5 constituting the detection circuit 4 is connected to the respective intermediate frequency amplification section 3a. Therefore, the carrier component Sc... is detected by the detection circuit 4, and its output is applied to the input side of the DC conversion circuit 5 as the output signal So via the logarithmic amplification section 20. Processed similarly. However, since the magnitude of the carrier component Sc increases in proportion to the electric field strength, the comparator 15 monitors the magnitude of the DC signal Sd obtained from the DC conversion circuit 5, and monitors the magnitude of the DC signal Sd obtained from the DC converting circuit 5 to ensure that the magnitude of the carrier component Sc is lower than or equal to a preset reference voltage Se. When the squelch control signal Ss is reached, the squelch control signal Ss is output. In this way, the DC conversion circuit 5 in the modified embodiment is also configured and functions in the same manner as the embodiment shown in FIG.

【0019】以上、実施例について詳細に説明したが本
発明はこのような実施例に限定されるものではない。例
えば、オペアンプはトランジスタ等の半導体素子により
構成する差動増幅器であってもよい。その他、細部の回
路構成等において、本発明の要旨を逸脱しない範囲で任
意に変更できる。
Although the embodiments have been described in detail above, the present invention is not limited to these embodiments. For example, the operational amplifier may be a differential amplifier configured with semiconductor elements such as transistors. Other details such as the circuit configuration can be arbitrarily changed without departing from the gist of the present invention.

【0020】[0020]

【発明の効果】このように、本発明に係るFM受信機の
スケルチ回路は、オペアンプの一方の入力部にノイズ成
分等を検波して得る出力信号を付与するとともに、オペ
アンプの他方の入力部に、例えば、カップリングコンデ
ンサを介することにより、出力信号の直流成分を除去し
て付与し、オペアンプの出力部から直流信号を得るよう
にした直流化回路を備えるため、直流化回路における時
定数回路が不要となり、スケルチ制御点の検出にかかる
応答速度を飛躍的に高めることができ、例えば、FMト
ランシーバ等における呼出時間を大幅に短縮できるとい
う顕著な効果を奏する。
As described above, the squelch circuit of the FM receiver according to the present invention provides an output signal obtained by detecting noise components etc. to one input section of the operational amplifier, and also provides an output signal obtained by detecting noise components etc. to the other input section of the operational amplifier. For example, since it includes a DC converting circuit that removes and applies the DC component of the output signal through a coupling capacitor and obtains a DC signal from the output section of the operational amplifier, the time constant circuit in the DC converting circuit is This makes it possible to dramatically increase the response speed for squelch control point detection, and has the remarkable effect that, for example, the calling time in an FM transceiver or the like can be significantly shortened.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明に係るFM受信機のスケルチ回路のブロ
ック構成図、
FIG. 1 is a block diagram of a squelch circuit of an FM receiver according to the present invention;

【図2】同スケルチ回路における各部の信号の波形図、
[Figure 2] Waveform diagram of signals at various parts in the same squelch circuit,

【図3】本発明の変更実施例に係るFM受信機のスケル
チ回路のブロック構成図、
FIG. 3 is a block configuration diagram of a squelch circuit of an FM receiver according to a modified embodiment of the present invention;

【図4】従来の技術に係るFM受信機のスケルチ回路の
ブロック構成図、
FIG. 4 is a block diagram of a squelch circuit of an FM receiver according to the conventional technology;

【符号の説明】[Explanation of symbols]

1    スケルチ回路 2    復調回路 3    中間周波増幅回路 4    検波回路 5    直流化回路 6    オペアンプ 6a  入力部 6b  入力部 6c  出力部 Sn  ノイズ成分 Sc  キャリア成分 So  出力信号 Sd  直流信号 1 Squelch circuit 2 Demodulation circuit 3 Intermediate frequency amplification circuit 4 Detection circuit 5 DC converter circuit 6 Operational amplifier 6a Input section 6b Input section 6c Output section Sn Noise component Sc carrier component So Output signal Sd DC signal

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】  復調回路から得るノイズ成分又は中間
周波増幅回路から得るキャリア成分を検波する検波回路
と、検波回路の出力信号を直流信号に変換する直流化回
路を備え、直流信号の大きさにより、受信機入力が一定
レベル以下になったことを検出して、受信機出力を断つ
ようにしたFM受信機のスケルチ回路において、オペア
ンプの一方の入力部に前記出力信号を付与するとともに
、オペアンプの他方の入力部に前記出力信号の直流成分
を除去して付与し、オペアンプの出力部から直流信号を
得るようにした直流化回路を備えてなることを特徴とす
るFM受信機のスケルチ回路。
Claim 1: A detection circuit that detects a noise component obtained from a demodulation circuit or a carrier component obtained from an intermediate frequency amplification circuit, and a DC conversion circuit that converts an output signal of the detection circuit into a DC signal. In the squelch circuit of the FM receiver, which detects that the receiver input has become below a certain level and cuts off the receiver output, the output signal is applied to one input section of the operational amplifier, and the output signal is applied to one input section of the operational amplifier. 1. A squelch circuit for an FM receiver, comprising a direct current converting circuit that removes and applies a direct current component of the output signal to the other input section to obtain a direct current signal from the output section of the operational amplifier.
【請求項2】  オペアンプの他方の入力部にカップリ
ングコンデンサを介して前記出力信号を付与することを
特徴とする請求項1記載のFM受信機のスケルチ回路。
2. The squelch circuit for an FM receiver according to claim 1, wherein the output signal is applied to the other input section of the operational amplifier via a coupling capacitor.
JP8185191A 1991-03-20 1991-03-20 FM receiver squelch circuit Expired - Lifetime JPH07105735B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8185191A JPH07105735B2 (en) 1991-03-20 1991-03-20 FM receiver squelch circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8185191A JPH07105735B2 (en) 1991-03-20 1991-03-20 FM receiver squelch circuit

Publications (2)

Publication Number Publication Date
JPH04292020A true JPH04292020A (en) 1992-10-16
JPH07105735B2 JPH07105735B2 (en) 1995-11-13

Family

ID=13757989

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8185191A Expired - Lifetime JPH07105735B2 (en) 1991-03-20 1991-03-20 FM receiver squelch circuit

Country Status (1)

Country Link
JP (1) JPH07105735B2 (en)

Also Published As

Publication number Publication date
JPH07105735B2 (en) 1995-11-13

Similar Documents

Publication Publication Date Title
JPS6221453B2 (en)
KR950701468A (en) Parallel non-tuned intermediate frequency amplifiers supply signals from each of the television's first detectors through their respective input filters
US4076963A (en) Pilot signal cancelling circuit for FM multiplex demodulator
JPH04292020A (en) Squelch circuit for fm receiver
JPH0422584Y2 (en)
JPH0424648Y2 (en)
JPS628568Y2 (en)
JPS5824528Y2 (en) Pilot signal extraction circuit
JPS631477Y2 (en)
JP2617616B2 (en) Pilot signal removal circuit
JPH04292019A (en) Squelch circuit for fm receiver
JPS6016732A (en) Receiving machine
JPS6349416B2 (en)
JP3172377B2 (en) AM radio receiver
JP2574356Y2 (en) FM demodulator for FM receiver
JP3159728B2 (en) AM / FM noise removal circuit
JP2545060Y2 (en) Demodulation circuit
JPH073707Y2 (en) External trigger detection circuit
KR960016171A (en) Squelch Signal Detection Method and Circuit
JPH01231440A (en) Fm stereo receiver
JP2001057514A (en) AGC circuit
JPH0427230Y2 (en)
KR980012871A (en) Tuner for receiving satellite broadcasting
JPS6382031A (en) Mulltipath interference detecting circuit
JPH03214932A (en) receiving device

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20071113

Year of fee payment: 12

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20081113

Year of fee payment: 13

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20091113

Year of fee payment: 14

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101113

Year of fee payment: 15

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111113

Year of fee payment: 16

EXPY Cancellation because of completion of term
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111113

Year of fee payment: 16