JPH0429419Y2 - - Google Patents
Info
- Publication number
- JPH0429419Y2 JPH0429419Y2 JP10445084U JP10445084U JPH0429419Y2 JP H0429419 Y2 JPH0429419 Y2 JP H0429419Y2 JP 10445084 U JP10445084 U JP 10445084U JP 10445084 U JP10445084 U JP 10445084U JP H0429419 Y2 JPH0429419 Y2 JP H0429419Y2
- Authority
- JP
- Japan
- Prior art keywords
- signal line
- output
- disconnection
- signal
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000001514 detection method Methods 0.000 claims description 18
- 238000010586 diagram Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 1
- 244000145845 chattering Species 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Landscapes
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
Description
【考案の詳細な説明】
〔考案の分野〕
本考案は、断線検出回路に関し、例えばパチン
コ台等の遊技台に設けられた玉センサ等の信号を
計数する遊技台管理装置の入力線の断線を検出す
るために用いられる断線検出回路に関する。[Detailed Description of the Invention] [Field of the Invention] The present invention relates to a disconnection detection circuit, and detects a disconnection in the input line of a game machine management device that counts signals from a ball sensor, etc. installed in a game machine such as a pachinko machine. The present invention relates to a disconnection detection circuit used for detecting a disconnection.
最近、パチンコ店等においては、パチンコ等の
遊技台のアウト玉やセーフ玉の数、景品交換機の
取扱玉数あるいは玉貸機の売上げデータ等の店内
の各種データをコンピユータで管理することが一
般化しつつある。
Recently, it has become common for pachinko parlors to use computers to manage various in-store data, such as the number of out and safe balls on pachinko machines, the number of balls handled on prize exchange machines, and sales data on ball lending machines. It's coming.
この場合、遊技台、景品交換機および玉貸機等
にアウト玉、セーフ玉、交換玉および貸玉の通過
を検出するスイツチ等の玉センサを設け、遊技台
管理装置では信号線すなわち計数入力線を介して
入力される各玉センサの出力を計数することによ
り各玉あるいは金額データを算出することができ
る。 In this case, a ball sensor such as a switch is installed in the game machine, the prize exchange machine, the ball rental machine, etc. to detect the passing of out balls, safe balls, replacement balls, and rental balls, and the game machine management device is equipped with a signal line, that is, a counting input line. By counting the output of each ball sensor that is input through the ball sensor, each ball or amount data can be calculated.
ところで、このような計数入力線が事故のため
断線したり、不正行為により故意に切断される
と、正しいデータが収集できないばかりでなく、
この間は現金を盗まれても探知できず、発見が遅
れて被害を被るという不都合がある。そこで、入
力線の断線を検出する必要性が生じてきた。ここ
で、断線を検出したときは警報を発生したり、印
字・表示する他、メモリに登録してデータの信頼
性低下を示したり、通信により経営者宅へ情報を
送る等、色々の処理が行なわれる。しかし、この
ような遊技台管路装置でデータ集収すべき入力点
数は非常に多いため、このような断線検出回路は
安価に実現する必要性が高い。 By the way, if such a count input line is disconnected due to an accident or intentionally disconnected due to fraudulent activity, not only will correct data not be collected;
During this period, even if cash is stolen, it cannot be detected, causing a delay in detection and causing damage. Therefore, a need has arisen to detect disconnection of the input line. When a disconnection is detected, various processes are performed, such as generating an alarm, printing/displaying it, registering it in memory to indicate a decrease in data reliability, and sending information to the manager's house via communication. It is done. However, since the number of input points from which data must be collected in such a gaming machine conduit device is extremely large, there is a strong need to realize such a disconnection detection circuit at low cost.
本考案は、上述の従来形における問題点に鑑
み、遊技台管理装置等、信号線を介して2値信号
を受信する電子装置の側から信号線断線を検出す
る安価な断線検出回路を提供することを目的とす
る。
In view of the problems with the conventional type described above, the present invention provides an inexpensive wire breakage detection circuit that detects signal line breakage from the side of an electronic device that receives binary signals via a signal line, such as a gaming machine management device. The purpose is to
本考案は、低インピーダンスの“1”レベル信
号と高インピーダンスの“0”レベル信号を発生
するスイツチ手段と、該スイツチ手段の出力信号
を伝達する信号線とを含む信号回路の断線を検出
する回路であつて、上記信号線の出力端に汎用論
理ゲート素子の入力端を接続し、上記スイツチ手
段の出力端と直流電源の高電圧側端子との間に第
1の抵抗を接続し、上記信号線の出力端と上記直
流電源の低電圧側端子との間に第2の抵抗を接続
するとともに、上記第1および第2の抵抗の分圧
比を上記スイツチ手段の出力が低レベルのときの
上記信号線の電位が上記汎用論理ゲート素子の入
力閾値電圧より高レベルであるように設定し、該
信号線の電位が該入力閾値電圧より低レベルにな
つたときの該汎用論理ゲート素子の出力レベルに
より該信号線の断線を検出することを特徴とす
る。
The present invention provides a circuit for detecting disconnection in a signal circuit including a switch means for generating a low impedance "1" level signal and a high impedance "0" level signal, and a signal line transmitting an output signal of the switch means. An input end of a general-purpose logic gate element is connected to the output end of the signal line, a first resistor is connected between the output end of the switch means and the high voltage side terminal of the DC power supply, and the signal line is connected to the input end of the general-purpose logic gate element. A second resistor is connected between the output end of the line and the low voltage side terminal of the DC power supply, and the voltage dividing ratio of the first and second resistors is set to the above value when the output of the switch means is at a low level. The potential of the signal line is set to be higher than the input threshold voltage of the general-purpose logic gate element, and the output level of the general-purpose logic gate element when the potential of the signal line becomes lower than the input threshold voltage. The present invention is characterized in that a disconnection of the signal line is detected.
ここで、「低インピーダンスの“1”レベル信
号」とは、スイツチ手段が開閉器などを含む場合
において開閉器が閉状態となりスイツチ手段が低
インピーダンスとなつたときに出力する比較的高
レベルの信号をいう。また、「高インピーダンス
の“0”レベル信号」とは、開閉器等が開状態と
なりスイツチ手段が低インピーダンスとなつたと
きに出力する比較的低レベルの信号をいう。 Here, "low impedance "1" level signal" is a relatively high level signal that is output when the switch means is in a closed state and the switch means becomes low impedance when the switch means includes a switch etc. means. Furthermore, "high impedance "0" level signal" refers to a relatively low level signal that is output when a switch or the like is in an open state and the switch means is in a low impedance state.
上記構成に係る本考案によれば、抵抗分割によ
り信号線にバイアス電圧を与え、信号線の電圧が
このバイアス電圧より低レベル側へ変化したとき
を安価な汎用論理ゲート素子(例えばCMOS)
のスレツシヨルドレベル(入力閾値電圧)で検出
するようにしたため、一般のコンパレータを用い
た場合に比べ非常に安価な断線検出を実現するこ
とができる。 According to the present invention having the above configuration, a bias voltage is applied to the signal line by resistor division, and when the voltage of the signal line changes to a level lower than this bias voltage, an inexpensive general-purpose logic gate element (for example, CMOS) is used.
Since detection is performed at the threshold level (input threshold voltage) of , it is possible to realize disconnection detection at a much lower cost than when using a general comparator.
以下、図面を用いて本考案の実施例を説明す
る。
Embodiments of the present invention will be described below with reference to the drawings.
第1図は本考案の1実施例に係る断線検出回路
を示す。同図において、Xは計数用の入力接点
で、例えばパチンコ台のアウト玉センサとしてア
ウト玉1個ごとに1回オン(閉路)する。これに
より、信号線2を介して断線検出回路1の入力端
に電圧V1の“1”レベル信号が印加される。こ
の断線検出回路1においては、l間の断線を検出
するために、接点Xと並列に抵抗R1を接続し、
検出回路1内の抵抗R2,R3とともに、電源V1の
正極から抵抗R1,R2およびR3を介して電源V2の
負極に至る閉ループを形成している。IC1,IC2は
安価なCMOS論理ゲートICであり、ここではIC1
を断線検出用、IC2を計数用パルス出力用として
用いている。抵抗R5とコンデンサCは接点Xの
チヤタリングを吸収するための積分回路である。
Dは電源電圧V1がIC1の定格電圧より高い場合に
IC1の入力端を保護するためのダイオードである。 FIG. 1 shows a disconnection detection circuit according to an embodiment of the present invention. In the figure, X is an input contact for counting, which is turned on (closed) once for each out ball as an out ball sensor for a pachinko machine, for example. As a result, a “1” level signal of voltage V 1 is applied to the input terminal of the disconnection detection circuit 1 via the signal line 2 . In this disconnection detection circuit 1, in order to detect a disconnection between l, a resistor R1 is connected in parallel with the contact X,
Together with the resistors R 2 and R 3 in the detection circuit 1, a closed loop is formed from the positive pole of the power supply V 1 to the negative pole of the power supply V 2 via the resistors R 1 , R 2 and R 3 . IC 1 and IC 2 are inexpensive CMOS logic gate ICs, and here IC 1
is used to detect disconnection, and IC 2 is used to output pulses for counting. Resistor R5 and capacitor C are an integrating circuit for absorbing contact X chattering.
D is when the power supply voltage V 1 is higher than the rated voltage of IC 1
This is a diode to protect the input terminal of IC 1 .
ここで、IC1,2のスレツシヨルドレベルをVTH,
ダイオードDの順方向電圧をVFとして
V1×(R2+R3)/R1+R2+R3≧(V2−VF) −(1)
となるようにR1およびR2+R3の抵抗値を設定し
ておく。 Here, the threshold level of IC 1, 2 is V TH ,
Assuming that the forward voltage of diode D is V F , R 1 and R 2 + R 3 are Set the resistance value.
この条件は必らずしも必要ではないが、ここで
は、このように条件設定することにより、抵抗
R4を介して抵抗R2,R3に流れ込む電流を零にし
てIC2の入力電圧の計算を容易にしている。 Although this condition is not necessarily required, here, by setting the condition in this way, the resistance
The current flowing into resistors R 2 and R 3 via R 4 is made zero to facilitate calculation of the input voltage of IC 2 .
この時、接点X“開”時のIC2の入力電圧VIN2L
は
VIN2L=V1×R3/R1+R2+R3となる。 At this time, the input voltage of IC 2 when contact X is “open” is V IN2L
is V IN2L = V 1 × R 3 / R 1 + R 2 + R 3 .
接点X“開”時のIC2の入力電圧VIN2Hは VIN2H=V1×R3/R2+R3となる。The input voltage V IN2H of IC 2 when contact X is "open" is V IN2H = V 1 × R 3 /R 2 + R 3 .
l間が接続されている時のIC1の入力電圧VIN1Hは
V1×(R2+R3)/R1+R2+R3≧(V2−VF)よりV2とな
る。 The input voltage V IN1H of IC 1 when the two terminals are connected becomes V 2 from V 1 × (R 2 + R 3 )/R 1 + R 2 + R 3 ≧ (V 2 −V F ).
l間がいずれかで“開”になつた時のIC1の入力
電圧VIN1Lは
VIN1L=(V2−VF)×(R2+R3)/R4+R2+R3+VFと
なる。The input voltage V IN1L of IC 1 when either of the two terminals is open is V IN1L = (V 2 - V F ) x (R 2 + R 3 )/R 4 + R 2 + R 3 + V F. .
ここで、
VIN2L<VTH −(2)
VIN2H>VTH −(3)
VIN1L<VTH −(4)
および(1)式を満たすようにR1、R2,R3,R4を
決定すれば、検出回路1の各部の電圧は第2図の
タイムチヤートに示すようになり、IC1によつて
信号線2の断線を検出することができる。また、
IC2によつて信号線2の出力レベルを2値化すな
わちレベルシフトしているため、接点Xの出力を
用いる装置の入力の閾値が異なる場合も接点Xの
出力(特に“0”レベル)を抵抗R1でバイアス
したことに起因する誤動作を防止することができ
る。 Here, V IN2L <V TH −(2) V IN2H >V TH −(3) V IN1L <V TH −(4) and R 1 , R 2 , R 3 , R 4 to satisfy equation (1). Once determined, the voltages at each part of the detection circuit 1 will become as shown in the time chart of FIG. 2, and IC 1 can detect a disconnection in the signal line 2. Also,
Since the output level of signal line 2 is binarized or level-shifted by IC 2 , even if the input threshold of the device that uses the output of contact X is different, the output of contact Malfunctions caused by biasing with resistor R1 can be prevented.
すなわち、信号線2の電圧はl間正常時はV1
(接点X“開”)または
V1×(R2+R3)/R1+R2+R3
(接点X“開”)であり、いずれも(V2−VF)以
上であるからダイオードDがオフしてIC1の入力
電圧VIN1H=V2であり、IC1の出力電圧は“H”で
ある。一方、l間断線時は(4)式よりIC1の入力電
圧VIN1Lがスレツシヨルド電圧VTHより低くなり、
IC1の出力電圧は“L”となつて断線検出出力と
なる。 In other words, the voltage of signal line 2 is V 1 during normal operation.
(contact X “open”) or V 1 × (R 2 + R 3 )/R 1 + R 2 + R 3 (contact When the IC 1 is turned off, the input voltage V IN1H =V 2 and the output voltage of the IC 1 is "H". On the other hand, when there is a disconnection between 1 and 1, the input voltage V IN1L of IC 1 becomes lower than the threshold voltage V TH according to equation (4),
The output voltage of IC 1 becomes "L" and becomes a disconnection detection output.
IC2は、l間正常時は入力電圧が接点Xの“開”
“閉”に応じて式(2),(3)に示すように変化し、し
たがつて電圧0の“L”レベル信号と電圧V2の
“H”レベル信号を発生する。なお、l間断線時
は信号線2の電圧がl間に断線がない場合の接点
X“開”電圧より充分に低いからIC2の入力は
VIN2Lより低く、したがつて出力電圧は“L”レ
ベルとなる。 When IC 2 is normal, the input voltage is “open” at contact
It changes as shown in equations (2) and (3) depending on the "closed" state, thus generating an "L" level signal of voltage 0 and an "H" level signal of voltage V2 . In addition, when there is a disconnection between l, the voltage of signal line 2 is sufficiently lower than the "open" voltage of contact X when there is no disconnection between l, so the input of IC 2 is
It is lower than V IN2L , so the output voltage is at "L" level.
なお、接点Xの代りにゲート回路やコンパレー
タ等の“L”レベルで電流を吸い込む素子を用い
る場合は、第3図に示すようにダイオードD2を
接続して“L”レベルの電流を阻止し“H”レベ
ルでのみ電流が流れるようにすることにより本考
案を適用することができる。 If you use a gate circuit, comparator, or other element that sucks current at the "L" level instead of contact X, connect a diode D2 as shown in Figure 3 to block the "L" level current. The present invention can be applied by allowing current to flow only at the "H" level.
第1図は本考案の1実施例に係る断線検出回路
の回路図、第2図は第1図の回路各部の動作を示
すタイムチヤート、第3図は本考案の他の実施例
を示すスイツチ部分の回路図である。
1……断線検出回路、2……信号線、X……接
点、R1,R2,R3……抵抗、IC1……汎用論理ゲー
ト素子、V1,V2……直流電源。
Fig. 1 is a circuit diagram of a disconnection detection circuit according to one embodiment of the present invention, Fig. 2 is a time chart showing the operation of each part of the circuit in Fig. 1, and Fig. 3 is a switch diagram showing another embodiment of the present invention. It is a circuit diagram of a part. 1...Disconnection detection circuit, 2...Signal line, X...Contact, R1 , R2 , R3 ...Resistor, IC1 ...General-purpose logic gate element, V1 , V2 ...DC power supply.
Claims (1)
高インピーダンス時に低レベル信号を発生する
スイツチ手段と、該スイツチ手段の出力信号を
伝達する信号線とを含む信号回路の断線を検出
する回路であつて、上記信号線の出力端に汎用
論理ゲート素子の入力端を接続し、上記スイツ
チ手段の出力端と直流電源の高電圧側端子との
間に第1の抵抗を接続し、上記信号線の出力端
と上記直流電源の低電圧側端子との間に第2の
抵抗を接続するとともに、上記第1および第2
の抵抗の分圧比を上記スイツチ手段の出力が低
レベルのときの上記信号線の電位が上記汎用論
理ゲート素子の入力閾値電圧より高レベルであ
るように設定し、該信号線の電位が該入力閾値
電圧より低レベルになつたときの該汎用論理ゲ
ート素子の出力レベルにより該信号線の断線を
検出することを特徴とする断線検出回路。 2 前記スイツチ手段が、前記直流電源の高電圧
側端子に一端を接続された電気接点である実用
新案登録請求の範囲第1項記載の断線検出回
路。[Claims for Utility Model Registration] 1. Disconnection of a signal circuit including a switch means that generates a high level signal when the impedance is low and a low level signal when the impedance is high, and a signal line that transmits the output signal of the switch means. In the detection circuit, an input terminal of a general-purpose logic gate element is connected to the output terminal of the signal line, and a first resistor is connected between the output terminal of the switching means and the high voltage side terminal of the DC power supply. , a second resistor is connected between the output end of the signal line and the low voltage side terminal of the DC power supply;
The voltage division ratio of the resistor is set such that the potential of the signal line when the output of the switch means is at a low level is higher than the input threshold voltage of the general-purpose logic gate element, and the potential of the signal line is set to A disconnection detection circuit that detects disconnection of the signal line based on the output level of the general-purpose logic gate element when the level becomes lower than a threshold voltage. 2. The disconnection detection circuit according to claim 1, wherein the switch means is an electrical contact whose one end is connected to the high voltage side terminal of the DC power supply.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10445084U JPS6121982U (en) | 1984-07-12 | 1984-07-12 | Disconnection detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10445084U JPS6121982U (en) | 1984-07-12 | 1984-07-12 | Disconnection detection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6121982U JPS6121982U (en) | 1986-02-08 |
| JPH0429419Y2 true JPH0429419Y2 (en) | 1992-07-16 |
Family
ID=30663801
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10445084U Granted JPS6121982U (en) | 1984-07-12 | 1984-07-12 | Disconnection detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6121982U (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0190355U (en) * | 1987-12-05 | 1989-06-14 |
-
1984
- 1984-07-12 JP JP10445084U patent/JPS6121982U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6121982U (en) | 1986-02-08 |
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