JPH04294569A - High frequency circuit board and manufacture thereof - Google Patents
High frequency circuit board and manufacture thereofInfo
- Publication number
- JPH04294569A JPH04294569A JP8344491A JP8344491A JPH04294569A JP H04294569 A JPH04294569 A JP H04294569A JP 8344491 A JP8344491 A JP 8344491A JP 8344491 A JP8344491 A JP 8344491A JP H04294569 A JPH04294569 A JP H04294569A
- Authority
- JP
- Japan
- Prior art keywords
- paste film
- circuit board
- film
- frequency circuit
- high frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
- H05K1/092—Dispersed materials, e.g. conductive pastes or inks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing of the conductive pattern
Landscapes
- Manufacturing Of Printed Wiring (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【０００１】0001
【産業上の利用分野】本発明は高周波用回路基板に関し
、特に回路パターンを改善した回路基板及びその製造方
法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency circuit board, and more particularly to a circuit board with an improved circuit pattern and a method for manufacturing the same.
【０００２】0002
【従来の技術】従来の高周波用回路基板は、例えばアル
ミナ、ベリリア、窒化アルミニウム磁器等からなるセラ
ミック基板上に各種金属膜をスパッタ法、蒸着法、スク
リーン印刷法等により必要部分に形成した構成がとられ
ている。この金属膜としては、Ｔｉ／Ｗ・Ｐｔ・Ａｕの
多層膜、ＮｉＣｒ・Ｐｄ・Ａｕの多層膜、或いはＮｉＣ
ｒ・Ｐｔ・Ａｕの多層膜が用いられ、スパッタ法或いは
蒸着法で形成される。又、Ａｇ・Ｐｄ合成ペーストが用
いられることもあり、スクリーン印刷法で形成される。
図３はその一例であり、ここではセラミック基板１上に
ＮｉＣｒ膜４、Ｐｂ膜５、Ａｕ膜６をスパッタ法にて順
次形成することで多層膜を形成している。[Prior Art] Conventional high-frequency circuit boards have a structure in which various metal films are formed on necessary parts by sputtering, vapor deposition, screen printing, etc. on a ceramic substrate made of, for example, alumina, beryllia, aluminum nitride porcelain, etc. It is taken. This metal film may be a Ti/W/Pt/Au multilayer film, a NiCr/Pd/Au multilayer film, or a NiC
A multilayer film of r, Pt, and Au is used and is formed by sputtering or vapor deposition. In addition, an Ag/Pd synthetic paste may be used, and it is formed by a screen printing method. FIG. 3 is an example of this, in which a multilayer film is formed by sequentially forming a NiCr film 4, a Pb film 5, and an Au film 6 on a ceramic substrate 1 by sputtering.
【０００３】0003
【発明が解決しようとする課題】こうした従来の高周波
用回路基板のうち、多層膜を構成する場合には各種金属
膜をスパッタ法や蒸着法でセラミック基板上の必要部分
に順次形成しているため、加工コストが大幅にかかると
いう問題がある。又、Ａｇ・Ｐｂ合成ペーストにおいて
は、一度のスクリーン印刷法で膜形成が可能であるため
低コストで回路基板が作成可能であるが、Ａｇ・Ｐｂ合
成ペーストで形成された膜は、フラックスを使用しなけ
ればソルダ付性が悪いという問題を有し、しかも耐ソル
ダ喰われ（長時間のソルダ付け）性に劣るという問題を
有している。本発明の目的は低コストに製造できる一方
で、ソルダ付け性に優れた高周波用回路基板を提供する
ことにある。[Problem to be Solved by the Invention] Among these conventional high-frequency circuit boards, when configuring a multilayer film, various metal films are sequentially formed on necessary parts of a ceramic substrate by sputtering or vapor deposition. However, there is a problem in that processing costs are significantly increased. In addition, with Ag/Pb synthetic paste, it is possible to form a film with a single screen printing method, so circuit boards can be created at low cost. However, the film formed with Ag/Pb synthetic paste requires the use of flux. Otherwise, there is a problem that the solderability is poor, and furthermore, the resistance to solder eating (long-term soldering) is poor. An object of the present invention is to provide a high frequency circuit board that can be manufactured at low cost and has excellent solderability.
【０００４】0004
【課題を解決するための手段】本発明の高周波用回路基
板は、セラミック基板上の回路パターンをＡｕ・Ｐｔ合
成ペースト膜で構成し、かつその一部にＡｕペースト膜
を形成した構成とする。又、本発明の製造方法は、セラ
ミック基板上にスクリーン印刷法により所要パターンの
Ａｕ・Ｐｔ合成ペースト膜を形成する工程と、このＡｕ
・Ｐｔ合成ペースト膜の一部にスクリーン印刷法により
Ａｕペースト膜を形成する工程とを含んでいる。[Means for Solving the Problems] The high frequency circuit board of the present invention has a circuit pattern on a ceramic substrate composed of an Au/Pt composite paste film, and a part of the circuit pattern is formed with an Au paste film. The manufacturing method of the present invention also includes a step of forming an Au/Pt synthetic paste film of a desired pattern on a ceramic substrate by screen printing, and
・Includes a step of forming an Au paste film on a part of the Pt synthetic paste film by screen printing.
【０００５】[0005]
【作用】本発明によれば、Ａｕ・Ｐｔ合成ペースト膜上
にＡｕペースト膜を有することで、フラックスを使用し
ない場合のソルダ付け性が改善される。According to the present invention, the presence of the Au paste film on the Au/Pt synthetic paste film improves the solderability when no flux is used.
【０００６】[0006]
【実施例】次に、本発明を図面を参照して説明する。図
１は本発明の高周波用回路基板の一実施例の断面図であ
る。セラミック基板１の両面にスクリーン印刷法により
厚さ４μｍ以上のＡｕ・Ｐｔ合成ペースト膜２を形成す
る。このとき、セラミック基板１の裏面には全面に膜を
形成し、半導体チップを搭載する表面には所要パターン
に膜を形成する。更に、セラミック基板１の表面には、
Ａｕ・Ｐｔ合成ペースト膜２と同じスクリーン印刷法に
より、Ａｕペースト膜３を薄く（０．５μ程度）形成す
る。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings. FIG. 1 is a sectional view of an embodiment of a high frequency circuit board of the present invention. Au/Pt synthetic paste films 2 with a thickness of 4 μm or more are formed on both sides of a ceramic substrate 1 by screen printing. At this time, a film is formed on the entire back surface of the ceramic substrate 1, and a film is formed in a desired pattern on the surface on which the semiconductor chip is mounted. Furthermore, on the surface of the ceramic substrate 1,
The Au paste film 3 is formed thinly (about 0.5 μm) by the same screen printing method as the Au/Pt synthetic paste film 2.
【０００７】このように形成された高周波用回路基板は
、蒸着法等により各種金属膜や合金膜を順次形成してい
く従来の高周波用回路基板に比べて、加工工程が２回の
スクリーン印刷で良いため、加工コストが大幅に軽減で
きる。又、表面にはＡｕペースト膜３が形成されている
ため、フラックス無しでのソルダ濡れ性，耐ソルダ喰わ
れ性等を、従来のＡｇ・Ｐｂ合成ペーストによる膜より
も改善することができる。[0007] The high frequency circuit board formed in this manner requires only two screen printing steps, compared to conventional high frequency circuit boards in which various metal films and alloy films are successively formed using vapor deposition methods. As a result, processing costs can be significantly reduced. Furthermore, since the Au paste film 3 is formed on the surface, solder wettability without flux, solder eating resistance, etc. can be improved over films made of conventional Ag/Pb synthetic pastes.
【０００８】因に、従来の高周波用回路基板、Ａｇ・Ｐ
ｄ基板、Ａｕ・Ｐｔ基板、Ａｕ・Ｐｔ＋Ａｕ基板におけ
るソルダ付性や耐ソルダ喰れ性を比較した結果を表１に
示す。これから、本発明の高周波用回路基板におけるＮ
Ｇ数が低減されていることが判る。Incidentally, the conventional high frequency circuit board, Ag/P
Table 1 shows the results of comparing the solderability and solder erosion resistance of the d substrate, the Au/Pt substrate, and the Au/Pt+Au substrate. From now on, N in the high frequency circuit board of the present invention will be explained.
It can be seen that the G number is reduced.
【０００９】[0009]
【表１】[Table 1]
【００１０】図２は本発明の他の実施例の断面図である
。この実施例では、前記実施例と同様に、セラミック基
板１上にスクリーン印刷法によってＡｕ・Ｐｔ合成ペー
スト膜２（厚さ４μ以上）を形成し、更にチップ搭載等
を行う面に同様のスクリーン印刷法によりＡｕペースト
膜３を薄く（ ０．５μ程度）形成する。但し、Ａｕペ
ースト膜３は必要とする部分のみに印刷を行い、他の部
分ではＡｕ・Ｐｔ合成ペースト膜２を露呈させておく。
この構成では、チップを搭載する部分では耐ソルダ喰わ
れ性，ソルダ付け性を改善するためにＡｕペースト膜３
を形成するが、他の部分ではソルダ付け性がそれ程要求
されることがないのでＡｕペースト膜３の形成を省略し
、材料の低減を図ることができ、低コスト化を進めるこ
とができる。FIG. 2 is a cross-sectional view of another embodiment of the invention. In this example, similar to the previous example, an Au/Pt synthetic paste film 2 (thickness of 4 μm or more) is formed on a ceramic substrate 1 by screen printing, and the same screen printing is performed on the surface on which chips are to be mounted. A thin Au paste film 3 (about 0.5 μm thick) is formed by the method. However, the Au paste film 3 is printed only on the necessary parts, and the Au/Pt synthetic paste film 2 is left exposed in other parts. In this configuration, the part where the chip is mounted has an Au paste film 3 to improve solder bite resistance and solderability.
However, since solderability is not so required in other parts, the formation of the Au paste film 3 can be omitted, and the amount of material used can be reduced, leading to cost reduction.
【００１１】[0011]
【発明の効果】以上説明したように本発明は、セラミッ
ク基板上の回路パターンをＡｕ・Ｐｔ合成ペースト膜で
構成し、かつその一部にＡｕペースト膜を形成している
ので、フラックスを用いない場合のソルダ付け性を大幅
に改善することができる効果がある。又、Ａｕ・Ｐｔ合
成ペースト膜とＡｕペースト膜をスクリーン印刷法によ
り形成しているので、回路基板の低コスト化が実現でき
る効果もある。[Effects of the Invention] As explained above, in the present invention, the circuit pattern on the ceramic substrate is composed of an Au/Pt composite paste film, and since the Au paste film is formed on a part of the circuit pattern, no flux is used. This has the effect of greatly improving the solderability in some cases. Furthermore, since the Au/Pt synthetic paste film and the Au paste film are formed by screen printing, there is also the effect of reducing the cost of the circuit board.
【図１】本発明の高周波用回路基板の一実施例の断面図
である。FIG. 1 is a sectional view of an embodiment of a high frequency circuit board of the present invention.
【図２】本発明の他の実施例の断面図である。FIG. 2 is a cross-sectional view of another embodiment of the invention.
【図３】従来の高周波用回路基板の一例の断面図である
。FIG. 3 is a cross-sectional view of an example of a conventional high-frequency circuit board.
１ セラミック基板 ２ Ａｕ・Ｐｔ合成ペースト膜 ３ Ａｕペースト膜 1 Ceramic substrate 2 Au/Pt synthetic paste film 3 Au paste film
Claims (2)
ーンをＡｕ・Ｐｔ合成ペースト膜で構成し、かつこのＡ
ｕ・Ｐｔ合成ペースト膜の一部にＡｕペースト膜を形成
したことを特徴とする高周波用回路基板。Claim 1: A circuit pattern formed on a ceramic substrate is formed of an Au/Pt synthetic paste film, and this A
A high frequency circuit board characterized in that an Au paste film is formed on a part of a u/Pt synthetic paste film.
により所要パターンのＡｕ・Ｐｔ合成ペースト膜を形成
する工程と、このＡｕ・Ｐｔ合成ペースト膜の一部にス
クリーン印刷法によりＡｕペースト膜を形成する工程と
を含むことを特徴とする高周波用回路基板の製造方法。2. A step of forming an Au/Pt synthetic paste film in a desired pattern on a ceramic substrate by a screen printing method, and a step of forming an Au paste film on a part of this Au/Pt synthetic paste film by a screen printing method. A method of manufacturing a high frequency circuit board, comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3083444A JP2697343B2 (en) | 1991-03-23 | 1991-03-23 | Semiconductor device and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3083444A JP2697343B2 (en) | 1991-03-23 | 1991-03-23 | Semiconductor device and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04294569A true JPH04294569A (en) | 1992-10-19 |
| JP2697343B2 JP2697343B2 (en) | 1998-01-14 |
Family
ID=13802608
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3083444A Expired - Fee Related JP2697343B2 (en) | 1991-03-23 | 1991-03-23 | Semiconductor device and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2697343B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0773709A3 (en) * | 1995-11-13 | 1998-06-03 | National Starch and Chemical Investment Holding Corporation | Two-layer solderable gold for thick film circuits |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0312988A (en) * | 1989-06-12 | 1991-01-21 | Nec Corp | Metal conductor thick film printed wiring board |
-
1991
- 1991-03-23 JP JP3083444A patent/JP2697343B2/en not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0312988A (en) * | 1989-06-12 | 1991-01-21 | Nec Corp | Metal conductor thick film printed wiring board |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0773709A3 (en) * | 1995-11-13 | 1998-06-03 | National Starch and Chemical Investment Holding Corporation | Two-layer solderable gold for thick film circuits |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2697343B2 (en) | 1998-01-14 |
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