JPH0430331A - Read verifying method for optical recording information and read veritying reproducing circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an optical recording/reproducing device. Specifically, the present invention relates to an optical recording/reproducing device. Specifically, a laser beam having a diameter of about 1 micron is irradiated onto an optical disk to record/reproduce signals at high density. The present invention relates to an optical recording information reproducing method and an optical recording information reproducing circuit used in a rewritable optical recording and reproducing device that can repeatedly record and reproduce signals by erasing the once recorded signals by laser irradiation.Conventional technology optical discs (The bit error rate of the medium itself is high. fSW5. In order to obtain data reliability, read the data again after recording it. (X) By comparing the recorded data signal and the reproduced data signal, This function, which checks whether recording has been performed correctly, is called a read-verify function. An example of a conventional optically recorded information reproducing circuit having this read-verify function is shown in FIG.

In Fig. 5, 1 is an amplitude detection comparator, 2 is a normal comparator level generation circuit, 3 is a verify comparator level generation circuit, 4.5 is a switch, 6 is a differential circuit, 7 is a zero cross point detection circuit, and 8 is a differential comparator level generation circuit. The inverter is the same. 9 is the AND circuit. The pulse width setting is the same. 11 is the comparison circuit. The operation of the conventional optical recording information reproducing circuit configured as above will be explained below using FIG. To explain, a recording data signal is shown in FIG. 6(g). After writing this recorded data signal, even if the reproduced signal when reproduced again is (a), the recorded information may exist at the peak position of the signal waveform. Signal (a)! t The differential waveform (c) is differentiated by the differentiating circuit 6.21o The differential waveform (c)i; To c) In order to detect countless zero-crossing points in addition to the zero-crossing points corresponding to the recorded information (unknown part in (d)), (d) also includes signals other than the recorded information.

- Person Reproduction signal (a) j; L Also input to amplitude detection comparator 1 Amplitude detection comparator l (y) Compares the reproduction signal (a) with the comparator level and outputs a binarized signal.

To explain the comparator level in more detail, during normal playback, the verify mode switching signal goes ``L'', the switch 4 turns on, and the output from the normal comparator level generation circuit 2 goes to the amplitude detection comparator 1. Input and compare level (bl)
Comparison level (b 1) It is often set to a level of approximately 5% of the reproduced signal amplitude During read verification, the verify mode switching signal becomes ``H°'' and switch 5 is turned on. Therefore, the output from the verification comparator level generation circuit 3 is input to the amplitude detection comparator 1 and becomes the comparator level (b2). The comparator level (b2) during the verification is the comparator level during normal playback. (bl) toward the recording pit side, and the amount of deviation (to the comparator level (bl) during normal playback) is set to be larger than the amount of variation due to setting errors for each circuit, temperature changes, etc. Therefore, the amplitude Detection comparator 1 is a read verification device that compares the playback signal (a) with the comparator level (b2) and outputs an amplitude detection signal (β2). If the comparator level (b2) is not reached, the amplitude detection signal (β
In 2), the detection signal (β1) corresponding to (α) is not output.
The ND circuit 9 performs an AND operation, and the pulse width setting circuit 10 sets the pulse width to a constant value, resulting in the reproduced data signal (f2).The reproduced data signal (f2) also has a data signal (β2) corresponding to (α). ) appears~final jQ The recorded data signal (g) and the reproduced data signal (f2) are input to the comparator circuit 11. The comparator circuit 11i compares the reproduced data (f2) and the recorded data (g) and finds that they match. If they do not match, output the recording status signal at ``H'', and if they do not match, output the recording status signal at ``L''.
Therefore, if the recording status signal strength <, 'H', it can be determined that the recording is correct, and if it is 'L', it can be determined that the recording is incorrect. In the case of Figure 6, the recording data signal ( g) and the playback data signal (f2) do not match. The recording status signal becomes "II L", and it can be determined that this recording is incorrect. 1 when the amplitude detection signal (el)!Q is generated.A detection signal (β3) corresponding to the insufficient recorded bit (α) is also generated, and therefore a signal (β4) corresponding to the reproduced data signal (fl) is generated. occurs, so the recorded data signal (g) and the reproduced data signal (fl) match and it is determined that the main recording was performed correctly.

However, the comparator level (bl) is not constant compared to i, but fluctuates due to environmental temperature changes, setting errors, etc. During normal playback, if it changes to bl2), the recording bit (α) If the data that was read yesterday cannot be read today, it will not be able to be detected and an error will occur.This will cause problems such as data read on one drive cannot be read on another drive.

Therefore, playback during read verification is performed at a comparator level (b2) that takes into account the amount of variation in the comparator level (bl).

Problems to be Solved by the Invention However, when a conventional optical recording information reproducing circuit is applied to reproducing a rewritable optical disk, a problem such as that shown in FIG. 7(g') occurs in the recorded data signal. Figure 7 (a'
) shows the playback signal of a phase-change rewritable optical disc; since it is a continuous rewritable disc, there are residual pits (β) from previous recording. When using a conventional playback circuit and playing back at the verify comparator level (b''2), the recording peak position is detected correctly and the playback data signal (f'2) goes to the gills.
This record matches the recorded data signal (g').
Comparator level during normal playback (b'
l) i) Environmental changes There is a possibility that the signal may fluctuate toward the unrecorded side due to setting errors, etc., and the comparator level (b'13
) may become. At this time, the amplitude detection signal (e“
13), the amplitude detection signal (β1) corresponding to the residual signal (β) is output.
)4Q A signal (β2) corresponding to the residual signal (β) will be generated, and a pattern different from the recorded data signal (g') will be reproduced, causing an error.

In this way, a conventional optical recording information reproducing circuit uses a comparator level that is shifted toward the recording pit side at the time of verification. There is a problem that errors occur during normal playback due to changes in the environment, etc.The present invention provides a method for verifying optically recorded information and a playback circuit that solves the above problems. Means for Solving the Problems In order to solve the above problems, read verification method of optically recorded information according to the present invention c1 detects the amplitude of the reproduced signal and detects the amplitude of the reproduced signal at a level of 50% of the amplitude of the reproduced signal. The present invention has a structure in which the comparator level is shifted toward the bit side and the comparator level is shifted toward the unrecorded side.
By detecting the playback signal amplitude using a comparator level shifted toward the recording bit side from the level of 50% of the playback signal amplitude, insufficiently recorded recording pits can be detected.
By detecting the amplitude of the reproduced signal using a comparator level shifted to the unrecorded side, it is possible to detect residual signals from previous recordings that have not been erased sufficiently, making it possible to determine whether or not recording is correct on rewritable optical discs without error. Embodiment Hereinafter, regarding an optical recording information reproducing circuit according to an embodiment of the present invention,
Although it will be explained without referring to the drawings, FIG. 1 shows an optical recording information reproducing circuit according to a first embodiment of the present invention. In FIG. 14 is a comparison level generation circuit for verification 1, 15 is a comparison level generation circuit for verification 2, 16, 17, 18, 19 are switches, 20 is a differentiation area 21 is a zero cross point detection area 22 is an inverter Circuit 23 is AND circuit, same section 4 is pulse width setting same section
Reference numeral 25 denotes a comparison circuit.The operation of the optical recording information reproducing circuit of the present invention constructed as described above will be explained below using FIG. 2.The recorded data signal is shown in FIG. 2(n). . After writing this recorded data signal, the reproduced signal when reproduced again is (h). In the obtained reproduced signal (h), even if the recorded information is present at the peak position of the signal waveform, it will not be reproduced. Signal (h) 4;L is differentiated by the differentiating circuit 20 and becomes the differential waveform (j) and the differential waveform (j)! ;! , The force that is binarized into (k) by the zero-crossing detection circuit 21 (differential waveform (j) α on the zero-crossing point detection circuit 2H) In order to detect countless zero-crossing points in addition to the zero-crossing points corresponding to the recorded information ((k) (unknown part), (k) also includes signals other than recording information.

-X Playback signal (h) l;L Also input to amplitude detection comparator 12 Amplitude detection comparator 12
CL Compares the playback signal (h) with the comparator level and converts it into a binary value. This comparator level differs between normal playback and read verify. Set signal 2 to L” and switch 17, 1
8 is turned ON and switches 16 and 19 are turned OFF, the output power of the verify comparator level generation circuit l (comparate level (11) is inputted to the amplitude detection comparator 12 as the output power (rate level (11)).
) is shifted toward the recording pi/soto side from the comparator level (10) during normal playback, and the amount of deviation is set for each circuit to the comparator level (i 0) during normal playback. Therefore, the amplitude detection comparator 121 outputs the reproduced signal (h
) and the comparator level (11) and outputs the amplitude detection signal (11). At this time, the amplitude of the insufficiently recorded recording pit (α)
(k) and (11) thus obtained are AND circuit 23
The pulse width is set to a constant pulse width by the pulse width setting circuit 24, and the reproduced data signal (ml) also has a data signal (α) corresponding to (α).
2) The recording data signal (n) and the reproduced data signal (ml) are input to the comparator circuit 25.Comparing circuit 251 Compares the reproduced data signal (ml) and the recorded data signal (n) If it matches, record the status signal ″”
If they do not match, output the recording status signal as “H”.
Therefore, if the recording status signal strength is #H'', it can be determined that the recording is correct, and if it is 'L'', it can be determined that the recording is incorrect. Go to this place The number of discrepancies between the recorded data signal (n) and the reproduced data signal (ml) The recording status signal becomes "L", and it can be determined that this recording is incorrect.
In this way, even if insufficient recording bits are detected, the next step is to proceed! Set the verify mode switching signal 1 to "H" and the verify mode switching signal 2 to "H", and switch 17.1
9 is turned ON and switch 16.18 is turned OFF, the output power level of the verification comparator level generation circuit 2 is inputted to the amplitude detection comparator 12 as the comparator level (12).
) is shifted to the unrecorded state side from the comparator level (lO) during normal playback, and the amount of shift! 1 To the comparator level (10) during normal playback Even though it is set to be larger than the amount of variation due to setting errors for each circuit or temperature changes, the amplitude detection comparator l 2 ) and outputs the amplitude detection signal (12).At this time, the amplitude of the residual signal (β) of the previous recording that is insufficiently erased exceeds the comparator level (12).Amplitude detection signal (12) ni(yo(
Detection signal (βl) corresponding to β) is obtained in this way even if a is applied (k) and (12) i friend AND circuit 2
3 is ANDed, and the pulse width setting circuit 24 sets the pulse width to a constant value, resulting in the reproduced data signal (m2). The reproduced data signal (m2) also has a data signal (β) corresponding to (β).
Even if β2) is detected, the recorded data signal (n) and the reproduced data signal (m2) are input to the comparison circuit 25a.The comparison circuit 251 compares the reproduced data signal (m2) and the recorded data signal (n). , if it matches record status signal ″”
If they do not match, the recording status signal is output as “L”.
Therefore, if the recording status signal strength is "H", it can be determined that the recording is correct, and if it is ``L'', it can be determined that the recording is incorrect. In this case, the recording data signal (n
) and the reproduced data signal (m2) do not match.The recording status signal becomes l+Lll, and it can be determined that this recording is incorrect. The recording state is determined by the reproduced data signal (ml) obtained using the comparator level (11), and then the recording state is determined by the reproduced data signal (m2) obtained by using the comparator level (12). Read verification is performed through a series of operations, and when it can be determined that both t and X are correct records, it is judged as correct.

As described above, according to this embodiment, 50% of the reproduced signal amplitude
A first verify comparator level generation circuit that generates a first verify comparator level shifted closer to the recording pit side, and a reproduction signal amplitude
A second verification on-validation level generation circuit is provided that generates a second verification comparator level that is shifted from the 0% level to the unrecorded side, and the amplitude detection of the reproduced signal is performed using the first verification comparator level. By providing a configuration in which verification is performed at both the verify comparator level and the second verify comparator level, insufficient recording bits can be detected by the first verify comparator level, and the second verify comparator level can detect insufficiently recorded bits. Since the verification comparator level can detect residual signals that have not been erased sufficiently, it is possible to judge whether L is correct or not on a rewritable optical disc without error. FIG. 3 shows an optical recording information reproducing circuit according to a second embodiment of the present invention. In Figure 3, 31,3
2 and 33 are amplitude detection comparator circuits, 34 are normal comparator level generation circuits, 35 are verification comparator level generation circuits 1136 are verification comparator level generation circuits 2, 37 are differentiation circuits, 38 are zero cross point detection circuits K, 39 are inverter circuits, 41, 4
2 is an AND circuit; 43, 44, 45 are pulse width setting circuits; and 46, 47 are comparison circuits.

The operation of the optical recording information reproducing circuit of the present invention constructed as described above will be described below using FIG. 4, and FIG. 4 (S) shows a recorded data signal. After writing this recorded data signal, the reproduced signal when reproduced again is (A).4 In the obtained reproduced signal (A), even if the recorded information is present at the peak position of the signal waveform, it will not be reproduced. The signal (A) (Y) is differentiated by the differentiator circuit 37 and becomes the differentiated waveform (O).

The differential waveform (E) is binarized by the zero-crossing point detection circuit 38 to become (force). The reproduced signal (A) containing the zero cross point is also input to the amplitude detection comparator 32.
4 comparators that compare the reproduced signal (A) with the first verification comparator level (X) output from the verify comparator level generation circuit 1 (35) and output an amplitude detection signal (K). Rate level (1) (Friend) It is shifted toward the recording pit side from the comparator level (A) outputted by the normal comparator level generation circuit 34 during normal playback, and the amount of shift is !-1 Comparator level during normal playback To (a), even if the setting is set to be larger than the amount of variation due to setting errors for each circuit or temperature changes, the amplitude of the recording bit (α) is insufficiently recorded (the amplitude of the recorded bit (α) has not reached the comparator level). Signal (K) (Yo (α)
The detection signal (β1) corresponding to The data signal (ri) and the reproduced data signal (ri) also have a data signal (β2) corresponding to (α). Sum input to circuit 46 Comparison circuit 46
Compares the reproduced data signal (ri) and the recorded data signal (su), and if they match, outputs "H"' and they must match.
Outputs "L". In this case, the recording data signal (su)
Atsushi and the playback data signal (RI) do not match.The output is “L”
It becomes I+.

Also, reproduced signal (a) (y) Amplitude detection comparator 3
The amplitude detection comparator 33 (friend) compares the reproduced signal (a) with the second verify comparator level (1) output from the verify comparator level generation circuit 2 (36). , 4 comparator levels (1) (y) that output the amplitude detection signal (i) are shifted toward the unrecorded state side from the comparator level (a) during normal playback output by the normal comparison level generation circuit 34, The amount of deviation (Y) Comparator level during normal playback (A) Q This is set to be larger than the amount of variation due to setting errors for each circuit, temperature changes, etc.

Therefore, the amplitude (
If the amplitude detection signal (ke) exceeds the comparator level (1), the detection signal (β1) corresponding to (beta)
is output, but the (force) obtained in this way and (ke)i friend AND circuit 42
The pulse width is set to a constant pulse width by the pulse width setting circuit 45, and the reproduced data signal (co) becomes a data signal (β2) corresponding to (β).
is output.

Then, the recording data signal (su) and the playback data signal (co)
is input to the comparison circuit 47. Comparison circuit 47 (Y) Compares the reproduced data signal (K) and the recorded data signal (S) and outputs "H"' if they match.
L ''' is output. In this case, the recorded data signal (su) and the reproduced data signal (co) do not match. The output is '
``Ln'' is the last category.In the AND circuit 48, the product of the outputs of the comparison circuits 46 and 47 is taken and output as a recording status signal.If the recording status signal is ``H'', then the recording is correct. If l+L''', it can be determined that the record is incorrect.

In the case of FIG. 4, the outputs of the comparison circuits 46 and 47 are both "LI+" and the recording status signal is "°L", indicating that the recording is incorrect.

As mentioned above, in this embodiment, the deviation is 50% of the reproduced signal amplitude.
A first verify comparator level generation circuit that generates a first verify comparator level shifted toward the recording pit side, and a reproduction signal amplitude
A second verification on-validation level generation circuit is provided which generates a second verification comparator level that is shifted from the 0% level to the unrecorded side, and detects the amplitude of the reproduced signal. By having a verify playback system that performs at the comparator level and a verify playback system that performs at the second verify comparator level independently, it is possible to quickly and without error judge whether or not L is recorded correctly on a rewritable optical disc. In the first and second embodiments, the comparator circuit outputs a force only when the two inputs match (the amount of mismatch between the two inputs is less than the allowable amount (for example, it can be corrected by error correction). Effects of the Invention As described above, the present invention detects the amplitude of the reproduced signal and records it at a level of 50% of the amplitude of the reproduced signal. By having a configuration that uses both a comparator level shifted toward the bit side and a comparator level shifted toward the unrecorded side, it is possible to judge whether L is correct or not on a rewritable optical disk without making an error.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the optical recording information reproducing circuit in the first embodiment of the present invention. FIG. 2 is a block diagram explaining the operation of FIG. 1.
Figure 4 shows the block diagram of the optical recording information reproducing circuit according to the second embodiment of the present invention. Figure 4 shows the operation explanation diagram of Figure 3. Figure 5 shows the block diagram of the conventional optical recording information reproduction circuit.
7 is an explanatory diagram of the problems of the conventional example. 12, 31. 32. 33...Amplitude detection combiner 13, 34...Normal comparator level generation port i14.35...Comparator level generation circuit for verification 1, 15.36...Comparator level generation circuit for verify 2, 20.37... Differential cycle [2
1, 38... Zero cross point detection circuit 24°43, 4
4. 45...Pulse width setting same section 25°6, 47.
...Name of Comparison Agent: Patent Attorney Shigetaka Awano and 1 other person

Claims (3)

[Claims] (1) A reproduced data signal obtained by reproducing a reproduced signal portion larger than the first level shifted toward the recording pit side from a level of 50% of the reproduced signal amplitude, and a recorded pit from a level of 50% of the reproduced signal amplitude. By comparing both the recorded data signal and the reproduced data signal obtained by reproducing the reproduced amplitude part larger than the second level shifted to the opposite side,
A read verification method for optically recorded information, characterized by determining whether or not it has been correctly recorded. (2) A differentiation circuit that differentiates the playback signal and outputs the differential signal; a zero-cross detection circuit that detects the zero-crossing point of the differential signal; and a comparison circuit that compares the playback signal with an input comparator level to determine the amplitude of the playback signal. an amplitude detection circuit for detecting; a first comparator level generating circuit for generating a first comparator level shifted toward the recording pit side from a level of 50% of the reproduced signal amplitude; and controlling the first comparator level. a switch for inputting input to the amplitude detection circuit according to the signal; and a second comparator level generation circuit that generates a second comparator level shifted from a level of 50% of the reproduced signal amplitude to the side opposite to the recording pit. a switch for inputting the second comparator level to the amplitude detection circuit in accordance with a control signal; a reproduced data signal obtained from the output of the zero-cross point detection circuit and the output of the amplitude detection circuit; A reproducing circuit for read-verifying optically recorded information, comprising a comparison circuit for comparing recorded data signals. (3) a differentiation circuit that differentiates the playback signal and outputs a differential signal; a zero-cross detection circuit that detects the zero-crossing point of the differential signal; a first comparator level generating circuit that generates a comparator level, and comparing the first comparator level and the reproduced signal;
a first amplitude detection circuit that detects the amplitude of the reproduction signal; a first reproduction data signal obtained from the output of the zero-crossing point detection circuit; and the output of the first amplitude detection circuit; and a recording data signal. a first comparator circuit; a second comparator level generation circuit that generates a second comparator level shifted to the side opposite to the recording pit from a level of 50% of the reproduced signal amplitude; and the second comparator level. a second amplitude detection circuit that detects the amplitude of the reproduction signal by comparing the reproduction signal with the reproduction signal; and a second reproduction data signal obtained from the output of the zero crossing point detection circuit and the output of the second amplitude detection circuit. 1. A reproducing circuit for read verifying optically recorded information, comprising: a second comparing circuit for comparing the recorded data signals.