JPH0431414B2 - - Google Patents

Description

[Detailed Description of the Invention] This invention provides a built-in program ROM (read/write).
1-chip microcomputer containing only memory.

In a one-chip microcomputer, the contents of a built-in program ROM can be read externally for purposes such as testing. Therefore, it is possible for a third party other than the manufacturer or the manufacturing client (sometimes a party in competition with the manufacturing client) to read the program contents of the ROM using the external read function. Software cannot be protected.

Conventionally, in order to protect the above-mentioned software, a method has been known (Japanese Patent Application Laid-Open No. 14354/1983) in which a fuse means is blown to prohibit reading of the program ROM from the outside.

However, the above method has the following drawbacks.

First, when the fuse blows out, flying metal pieces cause defects such as short circuits between circuit lines, resulting in a decrease in reliability.

Second, when blowing a fuse, it is necessary to take into account the variations in the blowing current and the allowable current of related circuit elements, and in order to reliably blow only the fuse, a special fuse blowing device is required. There are some drawbacks to becoming one.

Thirdly, once the fuse is blown, reading from the outside of the ROM is prohibited, making it impossible for the manufacturer to inspect the product upon acceptance, or for the product to be returned as defective. There are drawbacks such as making failure analysis difficult.

The purpose of this invention is to provide a one-chip microcomputer that allows specified persons such as manufacturers and manufacturing clients to read the program ROM from outside at any time, and prohibits third parties other than the specified persons from reading the program ROM. It is about providing.

Another object of the present invention is to provide a one-chip microcomputer that realizes the above software protection function using the following simple circuit.

Further objects of the invention will become apparent from the following description and drawings.

Hereinafter, this invention will be explained in detail together with examples.

FIG. 1 shows a block diagram of an embodiment of a one-chip microcomputer to which this design is applied. In the figure, each circuit block surrounded by a dotted line is formed on one semiconductor substrate by a known semiconductor manufacturing technique.

What is indicated by the symbol 1 is a CPU (microprocessor), and its main constituent blocks are exemplarily shown as a representative. That is, CPU1
is an accumulator denoted by the symbol A, an index register denoted by the symbol X, and a symbol
the condition code register, denoted by CC; the stack pointer, denoted by the symbol SP;
It consists of a program counter indicated by the symbols PCH and PCL, a CPU control indicated by the symbol CPUCONT, an arithmetic and logic operation unit indicated by the time ALU, etc. these
Since the configuration of the CPU 1 is well known, detailed explanation thereof will be omitted.

Input and output ports are indicated by symbols 2 to 5, and data direction registers R _A to R _C are indicated by symbols 2 to 4.
is provided and used as an input/output port. Further, the symbol 5 indicates an input-only port.

What is indicated by symbol 6 is an oscillation circuit,
Although not particularly limited, a highly accurate reference frequency signal is formed using an external crystal resonator. This reference frequency signal forms the clock required by the CPU 1. In addition, the above reference frequency signal is
It is also used as the reference time pulse of the timer shown by symbol 7. Timer 7 above is a symbol
It is composed of a counter indicated by COUNT, a prescaler, and a controller indicated by the symbol CONT.

What is indicated by the symbol 8 is a RAM (Random Access Memory), which is mainly used as a temporary data storage circuit.

The symbol 9 indicates ROM (read/write).
only memory), and programs for various information processing are written therein.

The above circuit blocks are interconnected by a bus BUS centered around the CPU. this bus
BUS includes a data bus and an address bus.

In this embodiment, the following circuit is provided in the CPU 1 in order to add the software protection function. FIG. 2 shows an embodiment of the ROM read restriction circuit.

In the figure, what is indicated by symbol 10 is
The instruction register included in the CPU 1 and indicated by the symbol 11 is its instruction decoder.

In this embodiment, a specific instruction word SETFLAG is added to restrict ROM reading, and a decoding function thereof is added to the instruction decoder 11 accordingly. A control signal corresponding to a particular command word SETFLAG formed by the command decoder 11 is transmitted to a set input S of a flag FLAG constituted by a flip-flop. The output signal Q is used as a gate control signal for AND gates _G2 and _G3 . The reset input R of the flag FLAG receives a reset control signal generated by the instruction decoder ₁₁ through the OR gate G1.
RES, and the system reset signal and power-on clear signal input from the external reset terminal RES.
PCL has been reported.

Symbol 12 indicates a three-value determination circuit, which determines whether the signal voltage from a specific external control terminal _C1 has three values, 0 volts, 5 volts, or 12 volts, and determines the appropriate response. The operation mode signal to be
1". The three operating mode signals mentioned above are selected to be operating modes that do not conflict with each other. Among them, the signal formed when the voltage of the terminal _C1 is 12 volts and the signal formed when the voltage of the flag FLAG is set to 1" are selected. The output signal Q is input to an AND gate _G2 , and its output is used as an internal ROM read operation mode signal.

Furthermore, when performing internal bus check (read) mode MOD4 using external control terminal _C2 , this operation mode enables indirect reading of the built-in ROM, so the above flag FLAG
The output signal Q of is used as its limiting signal.
In other words, the above MOD4 signal is the above flag
It is formed by an AND gate G3 that receives the output signal Q of FLAG and a signal from the external terminal _C2 .

In addition to the circuit shown in FIG. 2, the ROM 9 is provided with the following programs and arbitrarily set key codes. FIG. 3 shows a flowchart of an embodiment of the above program.

In this example, 8 bits (1 byte) of
An example is shown in which a CPU is used and an 8-byte key code is used.

At step STP1, 8 is set in register R0 as a loop parameter.

At step STP2, the start address of the key code table arbitrarily set in advance is set in register R1.

At step STP3, the contents of register R1, ie, the starting address of the key code table, are transferred to accumulator A.

At step STP4, the 1-byte key code written at the top address of the key code table is taken into the accumulator A.

At step STP5, the 1-byte key code is transferred to register R2.

At step STP6, the register R1 is incremented (+1) and the address of the next key code is set.

At step STP7, the 1-byte key code input from the outside is taken into the accumulator A.

At step STP8, the external key code taken into accumulator A and register R2 are
A comparison (exclusive OR) of the internal key codes from the ROM stored in the ROM is performed.

In step STP9, if any one of the exclusive ORs is "1", that is, the key codes do not match, the execution of this program is terminated.

On the other hand, if the 1-byte key codes match, the process moves to the next step STP10.

At step STP10, the register R0 is decremented (-1), and if the contents are not 0, the process moves to step 3. Therefore,
When the above steps STP3 to STP10 are repeated 8 times, in other words, 8 times in a row, 1
When the internal key code of the byte matches the external key code, the process moves to step STP11.

In step STP11, the flag FLAG shown in FIG. 2 is set.

Therefore, in the one-chip microcomputer of this embodiment. By running the above program,
Enter the 64-bit keycode correctly and set the flag.
After setting FLAG, the internal ROM can be read by setting terminal _C1 to 12 volts.

In this embodiment, even if a third party who does not know the key code creates a device that randomly generates key codes in order to read the built-in ROM and scans them until they match the internal key code. , its input key code combination is 2 ⁶⁴
Therefore, even if it takes 100MS (microseconds) for one judgment, 2 ⁶² × 100MS = 5.12
Since it takes an enormous amount of time, ×10 ¹¹ hours, it is practically impossible to read the ROM. Also. Even if the flag FLAG can be set, in this embodiment, actual ROM reading cannot be performed unless the external terminal is applied with a high voltage of 12 volts. If only the manufacturer and the manufacturing client know about this terminal, the protection of the software will be strengthened.

Even if a third party were aware of the existence of the above terminal, they would not know exactly which terminal it is, so if they randomly set the external terminal to a high voltage of 12 volts, the three-value judgment circuit described above would be activated. If a voltage as high as 12 volts is applied to a terminal that does not have a terminal, there is a risk of destroying the internal circuit elements, so software can be protected from this point as well.

Furthermore, in this embodiment, the number of bits of the key code itself can be easily set according to the request of the manufacturer, making it difficult for a third party who does not even know the number of bits of the key code to read the ROM. let

Furthermore, which input port among multiple input ports should be used to input the key code from the outside,
Or using the plurality of input ports 2 to 5,
It is also very easy to configure the program to import key codes in a specific order from different input ports, thereby increasing the protection of the ROM program at any time.

On the other hand, the manufacturer and the manufacturing client may use the ROM from time to time.
Since it can be read, there is no problem in testing and failure analysis.

In addition, in this embodiment, many functions of a one-chip microcomputer can be used as is.
To protect the program described above, extremely strong program protection against third parties can be achieved by simply adding a simple circuit consisting of a flag FLAG and a small number of gates.

The invention is not limited to the above embodiments.

For example, the reading of the ROM may be limited and canceled only by the output state of the flag FLAG, which is set when the key codes match.

Alternatively, the timing at which the flag is set may be used as a trigger to receive a ROM read control signal from an external source.

Furthermore, since the specific instruction word mentioned above sets a flag and releases the prohibition of reading from the ROM, the one-chip microcomputer of the above embodiment does not operate with the instruction word (program) from the outside. There is.

The system configuration of the one-chip microcomputer described above can be modified in various ways.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a one-chip microcomputer to which the present invention is applied;
FIG. 2 is a circuit diagram showing an embodiment of the main part of the present invention, and FIG. 3 is a flowchart showing an embodiment of the present invention. 1...CPU, 2 or 5...Port, 6...
Oscillation circuit, 7...Timer, 8...RAM, 9...
...ROM, 10...instruction register, 11...instruction decoder, 12...three-value determination circuit.

Claims (1)

[Claims] 1. At least a CPU and a CPU on one semiconductor substrate.
In a one-chip microcomputer in which RAM and ROM are formed, a first key code consisting of a binary pattern stored in advance in the ROM, and a second key code consisting of the same binary pattern inputted from the outside. an external control terminal to which a signal voltage is applied from the outside; and an external control terminal to which a signal voltage is externally applied; voltage determination means for determining a signal voltage set to a high voltage that would destroy internal circuit elements at a control terminal and generating a second signal; A built-in ROM read operation mode signal is formed by performing a logical product, and based on the built-in ROM read operation mode signal, information stored in the ROM can be read out to the outside. A 1-chip microcomputer.