JPH04320126A - Duplex transmission system - Google Patents

Abstract

PURPOSE:To divert the capability of a processor almost to entire protocol conversion at the time of overload. CONSTITUTION:A processor 11 distributing a data to the pre-stage of a processor 10 of data transmitters 20, 21 and a processor 12 integrating a data is provided on a post-stage. When the processor 10 of an active system decides the occurrence of an overload, the processor 11 of the active system distributes the data from plural terminal equipments 1-n to the processors 10 of the active system and the standby system, in which protocol conversion is implemented and the result is sent to the processor 12 of the active system, which integrates the data and the result is sent to a host through an active system line 30.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to improvements in duplex transmission systems used in power operation systems and the like.

FIG. 3 is a block diagram of an example of a power management system. Status monitoring data such as current values, voltage values, and on/off of breakers of power plants and substations from terminals 1 to n is sent to the active data transmission device 20 or the standby data transmission device 21 at regular intervals. The data transmission devices 20 and 21 concentrate the lines, perform protocol conversion, and send the data to the host computer 40 via the working line 30. It is displayed on the system board 41.

[0003] In order to improve reliability, data transmission equipment and lines are duplicated into an active system and a standby system. Each terminal 1 to n normally transmits data at a fixed cycle, but if an abnormality is detected during status monitoring, the data transmission device 20 of the active system shortens the transmission cycle in order to promptly notify the host computer 40 of data changes. Send to.

[0004] As the data transmission cycle from the terminal becomes shorter,
Since the load on the data transmission device 20 becomes heavy, the standby data transmission device 21 is also used for processing and normally transmits data to the host computer 40, but in this case, the active and standby data transmission devices It is desirable to be able to utilize all of the processor's capabilities for this processing and to be able to cope with overload.

By switching the switches SW1 to SWn, data from the terminals 1 to n can be switched from the active data transmission device 20 to the standby data transmission device 21. Furthermore, by switching the switches SW20, 30, 21, 31, the connections between the data transmission devices 20, 21 and the active and standby lines 30, 31 can be changed.

[0006]

2. Description of the Related Art FIG. 4 is a block diagram of the main parts of a conventional duplex transmission system. In FIG. 4, data from terminals 1 to n is input to the active system data transmission device 20', and output data is transmitted to the active system line 3 via switches SW20 and SW30.
0 and is sent to the host computer 40.

In the current data transmission device 20', data is received by the reception processing section 22 of the processor 10', the protocol is converted by the protocol conversion section 24 to suit the purpose, and the data is sent to the transmission processing section 25 for transmission. The processing unit 25 transmits the protocol-converted data to the active line 30.

At this time, the overload determination unit 23' uses a counter that counts each time data is processed, and if the count value for a certain period of time becomes abnormally large, the processor 1
0' is overloaded, and in order to share the load, some data is sent to the processor 1 of the standby data transmission device 21' via the intersystem link processing unit 26 and the intersystem link 50.
It is sent to the inter-system link processing unit 26 of 0′, is protocol converted by the protocol conversion unit 24 of the standby system, and is sent to the transmission processing unit 2.
5, the signals are sent to the host computer 40 via the switches SW21 and SW32 and the standby line 31.

[0009]

[Problems to be Solved by the Invention] However, the processor 10' of the active data transmission device 20' is not connected to the inter-system link processing section of the standby data transmission device 21' via the overloaded time-system link processing section 26. In order to send data to 26, synchronization must be achieved, and the intersystem link processing section 26 also performs processing for communicating with the other party, so the ability of the processor 11' for protocol conversion is reduced accordingly. Therefore, there is a problem that it becomes impossible to cope with overload.

An object of the present invention is to provide a duplex transmission system that can use almost all of the processor's capacity for protocol conversion when overloaded.

[0011]

[Means for Solving the Problems] FIG. 1 is a block diagram of the principle of the present invention. As shown in FIG. 1, data is received from a plurality of terminals 1, . In a duplex transmission system having active and standby data transmission devices 20 and 21, each data transmission device 20 and 21 has a plurality of terminals 1 upstream of the first processor 10 when overloaded.
A second processor 11 that distributes data from n, and a third processor 12 that integrates data during overload at the subsequent stage.
If the first processor 10 of the active data transmission device 20 determines that it is overloaded, the second and third processors 11 and 12 of the own device and the standby data transmission device 2
1, and the second processor 11 of the active data transmission device 20 transfers the data from the multiple terminals 1...n to the active and standby data transmission devices. The data is distributed to the first processors 10 of 20 and 21, and the active and standby first processors 10 respectively perform protocol conversion and send the data to the third processor 12 of the active data transmission device 20. , are integrated in the third processor 12 of the active system, and transmitted to the upper level via the active line 30.

0012

According to the present invention, when the first processor 10 of the active data transmission device 20 detects an overload, the second and third processors 11 and 12 of the own device and the standby data transmission device 21 The second processor 11 of the active data transmission device 20 transfers the data from the multiple terminals 1...n to the active and standby data transmission devices 20. .
The data is sent to the third processor 12 of No. 0, integrated by the third processor 12 of the current system, and transmitted to the upper level via the line 30 of the current system.

That is, the first processor 10 does not use the inter-system link processing section 26, and there is no need to synchronize between the inter-system link processing sections 26 of the active system and the standby system, so the ability for protocol conversion is increased accordingly. Most of the capabilities of the first processor 10 can be directed to protocol conversion.

[0014]

Embodiment FIG. 2 is a block diagram of the main parts of a duplex transmission system according to an embodiment of the present invention. The difference in FIG. 2 from the conventional example shown in FIG. 4 is that the processors 10 of the active and standby data transmission devices 20 and 21, except for the intersystem link processing section 26, are equipped with front-end processors ( The difference is that an FEP 11 (hereinafter referred to as FEP) is provided, and an FEP 12 for integrating data is provided in the latter stage, so this different point will be mainly explained below.

In the case of FIG. 2, the active data transmission device 2
When the overload determining unit 23 of the processor 10 of No. 0 determines that there is an overload, it notifies the FEPs 11 and 12 of the own device and the processor 10 of the standby data transmission device 21 of the overload.

[0016] Then, the active FEP 11 connects terminals 1 to 1.
Set the data from n to a predetermined ratio, for example 1/2,
It is distributed to the active and standby processors 10. Current system,
The standby processor 10 performs protocol conversion and sends the result to the active FEP 12, where it is integrated and sent to the host computer 40 via the active line 30.

That is, the processor 10 does not use the intersystem link processing section 26 and there is no need to synchronize the intersystem link processing sections 26 of the active system and the standby system.
Almost all of 0's abilities can now be directed to protocol conversion.

[0018]

[Effects of the Invention] As explained in detail above, according to the present invention, the processor does not use the intersystem link processing section, and there is no need to synchronize the intersystem link processing sections of the active system and the standby system. This has the effect of allowing almost all of the processor's ability to be devoted to protocol conversion.

[Brief explanation of drawings]

[Fig. 1] Block diagram of the principle of the present invention,

FIG. 2 is a block diagram of main parts of a duplex transmission system according to an embodiment of the present invention;

[Figure 3] is a block diagram of an example power operation system.

FIG. 4 is a block diagram of main parts of a conventional duplex transmission system.

[Explanation of symbols]

1 to n are terminals, 10, 10' are processors, 11, 12
is processor, front end processor, 20, 20
' is an active data transmission device, 21, 21' is a standby data transmission device, 22 is a reception processing section, 23, 23' is an overload determination section, 24 is a protocol conversion section, 25 is a transmission processing section, 26 30 is an intersystem link processing unit, 30 is an active system line, and 31 is an intersystem link processing unit.
is a standby system line, 40 is a host computer, 41 is a system board, 50 is an intersystem link, SW1 to SWn, SW20, S
W21, SW30, and SW31 indicate switches.

Claims (1)

[Claims] Claim 1: Receive data from a plurality of terminals (1...n), convert the protocol in the first processor (10), and send the data to a higher level than the active line (30) or the standby line (31). Active and standby data transmission equipment (20
, 21), the first processor (
10), there is a second processor (11) that distributes data from the multiple terminals (1...n) during overload, and a third processor (11) that integrates the data during overload. 1
2), the first data transmission device (20) of the current system
When the processor (10) determines that it is overloaded, it notifies the second and third processors (11, 12) of the own device and the first processor (10) of the standby data transmission device (21); The second processor (11) of the active data transmission device (20) transfers data from the multiple terminals (1...n) to the active and standby data transmission devices (20, 2).
1) to the first processor (10) of the active system,
The first standby processor (10) performs protocol conversion, and the third processor of the active data transmission device (20)
A duplex transmission system characterized in that the signals are transmitted to the third processor (12) of the active system, integrated by the third processor (12) of the active system, and transmitted to a higher level via the active system line (30). .