JPH0432039B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a thin film crystallization technique for preferentially forming a single crystal in important parts of a semiconductor device during the manufacturing process of the device.

[Conventional technology] Conventionally, the thin film crystallization technology was SOI.
(Semiconductor on insulator) technology,
Semiconductors, especially silicon thin films, and insulating films, especially SiO ₂
Techniques have been developed to crystallize on This will be explained using a diagram. FIG. 5 is a diagram for explaining the prior art, especially when the lower layer insulating film 20 is partially thinner than the thickness t _px2 of other parts of the insulating film 20 (portion t _px1 ) as shown in the figure. When the semiconductor film 30 is melted and crystallized, solid crystallization starts from the thin portion a of the insulating film 20 where a large amount of heat flows to the substrate 10 which is a good thermal conductor.

[Problem to be solved by the invention] However, if the thickness t _px1 of the thin part of the above insulating film is
1000Å or less, the thickness of the thick part of the insulating film t _px2 is 2000
In the case of Å or more, even if the semiconductor film other than the part a is melted, the semiconductor film in the part a is not melted, so the film is not uniformly crystallized, and it is inappropriate to make an element in the part a. It is. Furthermore, if you try to melt the semiconductor film at part a, the temperature of the thick part of the insulating film will rise too much, and the semiconductor thin film that melted into water droplets will solidify, creating an uneven crystal layer. It is still unsuitable for manufacturing devices. Furthermore, Japanese Patent Application Laid-Open No. 58-55395 describes that ``A first SiO ₂ film with a thickness of 3000 Å, a first polysilicon film, and a second SiO ₂ film (5000 to 3000 Å) are sequentially deposited on a Si wafer. Periodic grooves were formed on the surface of the SiO ₂ film (thickness not disclosed), and a second polysilicon film was deposited.Then, this was laser annealed to make the second polysilicon film into a single crystal. , enhancement type P is added to this silicon single crystal film.
It was disclosed that the company had produced a prototype channel FET. However, this silicon single crystal film actually has many grain boundaries and sub-grain boundaries.
Alternatively, there is a high probability that sub-grain boundaries will enter, and there is a high risk that elements with large leakage or low mobility will be accidentally included.

[Means for Solving the Problems] The present invention has been made to solve the above-mentioned difficulties, and is aimed at solving the above-mentioned difficulties. Between,
The semiconductor thin film 30 is formed by inserting a structure consisting of at least a second high melting point thin film 41 made of a material with poor thermal conductivity of 1600 Å or more and a first thin film 40 with good thermal conductivity that serves as a gate. The first high-melting point thin film that is uniformly melted and is in contact with the semiconductor thin film 30 in the region where the transistor channel is arranged is thinned, and crystallization starts from the portion of the semiconductor thin film provided in that region. The channel is made into a single crystal in a self-aligned state with the gate. Further, a first high melting point film 20' is placed below at least a portion of the semiconductor thin film 30 to be melt-crystallized where a channel of a transistor is arranged.
A structure consisting of at least a first thin film 40 with good thermal conductivity and a second thin film 41 made of a material with poor thermal conductivity, which will serve as a gate, is partially inserted between the substrate and the substrate. The thickness of the first high melting point film 20' is 1000 Å or less, and the thickness of the second high melting point thin film 4 is
1 has a thickness of 1600 Å or more, and during the melt crystallization, crystallization is started from the region of the semiconductor thin film 30 where the channel is arranged, and the channel of the transistor is made into a single crystal in a self-aligned state with the gate. This is a method for manufacturing a transistor.

Note that in the present invention, the term "substrate" refers to a single-layer substrate or a multilayer substrate having at least a thin film on its surface having a higher thermal conductivity than the second high-melting point thin film.

Furthermore, these first thin films with good thermal conductivity can be self-aligned with the important parts of the element, and can be used as means for controlling the electrical characteristics of the important parts.

[Example] FIG. 1 is a drawing for explaining an example of the present invention. 30 as in the conventional example explained in Fig. 5.
is a thin film to be crystallized (semiconductor thin film), 20 is the first high melting point thin film, and has a thickness of t _I1 at the part a,
t _I1 is less than 1000 Å. The thickness t _I2 of the other portion of the first high melting point thin film is 2000 Å or more. 40 is a first thin film with good thermal conductivity, and 41 is a second thin film made of a material with poor thermal conductivity (second high melting point thin film).
And its thickness t _I3 is 1600 Å or more. Reference numeral 10 indicates a substrate, but if a multilayer structure is formed on the substrate, it may be a second thin film with good thermal conductivity.
Prior to the experiment of the embodiment of the present invention, a cross section was prepared using silicon as the substrate 10, an oxynitride film as the first high melting point thin film 20, and a silicon thin film of 1500 to 3000 Å chemically deposited as the thin film 30 to be crystallized. An experiment was conducted on a sample having (shown in Figure 5). The silicon thin film was melted by sweeping a 5-6 W argon laser at a speed of 0.2-0.5 cm/sec. In this melt crystallization, the substrate was heated to 450°C. t _px2 = 4000~5000
Å, t _px1 = 200 to 1000 Å. In this case, when the thin film (silicon thin film) 30 to be crystallized is supplied with laser power to melt the part a, the thick part of the first high melting point thin film 20 is solidified after the silicon thin film evaporates or condenses. A portion that does not remain on the first high melting point thin film 20 comes out. The thickness of the remaining portion of the silicon thin film was not uniform, and in some cases, the thickness often flowed into the portion a. Thickness of thin part of insulation film
When t _px1 was increased to 2000 Å, a laser power and sweep speed that enabled uniform melting was found.

On the other hand, as shown in FIG. 1, the first thin film with good thermal conductivity 40 is a polycrystalline silicon thin film of about 4000 Å, the thin film 30 to be crystallized is a silicon thin film of about 3000 Å, and the second high melting point thin film 41 is a thin film of about 3000 Å. as film thickness t _I3
= SiO ₂ of 1600 Å or more, film thickness as the first high melting point thin film t _I2 = 2000 Å (one example of 1000 Å or more), t _I1 = 200
When SiO ₂ with a thickness of Å to 1000 Å is used, the thin film 30 that crystallizes under the conditions of an argon laser power of 5 to 6 W and a sweep speed of approximately 2 cm/sec is uniformly melted and a
The area became a single crystal or a crystallized film with large crystal grains. Furthermore, as the first high-melting point thin film 20, an oxynitrite film was used in the embodiment corresponding to _FIG . It was hot.

Next, other embodiments of the present invention will be described.

The thin film crystallization method of the present invention is an essential method for melt crystallization of a structure in which a part of the lower surface of the crystallized thin film has a thin insulating high melting point thin film of 1000 Å or less, and the first is good thermal conductivity. The first thin film 40 of
It is also possible to implement the structure shown in FIG. 2, in which the high melting point thin film is provided only in a thin portion. The first and second high melting point thin films 20 and 41 are made of high melting point insulators such as silicon oxide, silicon nitride, and oxynitride. The thin film 30 to be crystallized may be a semiconductor such as silicon or germanium, or a metal thin film. The first thin film 40 with good thermal conductivity may be any thin film with good thermal conductivity and a melting point comparable to or higher than that of the thin film 30 to be crystallized. Further, although an example is shown in which an argon laser is used as a thin film melting means for crystallization, known means such as an electron beam, linear high frequency heating, linear lamp heating, and strip carbon heater may be used.

As an application example of the manufacturing method of the present invention, we will introduce a new model that has a gate via a thin insulating film on both the lower and upper parts.
I made a prototype FET.

Figure 3 is a cross-sectional view of the above FET, where 10 is a silicon substrate, 20 is SiO ₂ , and 41 is a 1600-5400 Å silicon substrate.
SiO ₂ , 40 is n ⁺ polycrystalline Si bottom gate, 30C
is a channel portion using silicon crystallized by the method of the present invention, and the insulating film between it and the lower gate is SiO ₂ of 350A. 30S and 30D are n ⁺ source and n ⁺ source made in crystallized silicon, respectively.
33 is the upper gate made of n ⁺ polycrystalline silicon. The upper gate insulating film thickness is
It is 250A. 32S and 32D are source and drain extraction electrodes. This transistor can be fabricated using conventional silicon gate technology from the structure of the embodiment of the invention described in FIG.
FIG. 4 is for explaining the output characteristics of the new type of FET explained in FIG. It is also possible to control the threshold voltage of the upper gate by applying a bias.

[Effects of the Invention] As described above, the present invention arranges a first thin high-melting point thin film under a region where an important part of a semiconductor element of a thin film to be melt-crystallized is arranged, and furthermore, a substrate (where the substrate is In the case of a multilayer structure, a second high melting point thin film made of a material with poor thermal conductivity of 1600 Å or more is placed between the first thin film with good thermal conductivity and a second thin film with good thermal conductivity on the substrate side. By partially inserting a structure consisting of at least This method has the effect of uniformly melting and crystallizing a sample that has a structure in which a thin high-melting point thin film of 1000 Å or less is partially located under the crystallized thin film, and also preferentially improves the crystallinity of the above-mentioned portion. It has the advantage that it can be easily manufactured.
Therefore, important parts of the device are preferentially composed of good crystals in a uniform molten crystallized film, and moreover, the first
The present invention provides a method for manufacturing a transistor that has exceptional effects, such as the ability to use a thin film with good thermal conductivity as a means for controlling important parts such as channels of the device.

[Brief explanation of drawings]

FIG. 1 is a diagram for explaining an embodiment of the present invention,
Fig. 2 is a diagram for explaining another embodiment of the present invention, Fig. 3 is a diagram of still another embodiment of the invention, and Fig. 4 shows the output characteristics of the FET of the embodiment shown in Fig. 3. FIG. 5 is a diagram for explaining the prior art. In the figure, 10 is a substrate, 20 is a first high melting point thin film,
20' is a thin part of the first high melting point thin film, 30 is a crystallized thin film, 30C is a crystallized thin film (channel part), 30D is a crystallized thin film (n ⁺ drain), and 30S is a crystallized thin film. thin film (n ⁺ source),
32D is a drain extraction electrode, 32S is a source extraction electrode, 33 is an upper gate of n ⁺ polycrystalline silicon, 40 is a first thin film with good thermal conductivity (lower gate of n ⁺ polycrystalline silicon), and 41 is a lower gate of n + polycrystalline silicon. 2 high melting point thin film (1600-5400 Å SiO ₂ ).

Claims (1)

[Claims] 1. A semiconductor thin film 30 to be melt-crystallized, and a first semiconductor film provided on the substrate side in contact with the semiconductor thin film 30.
In addition, a first high melting point insulating film 20, which serves as a gate, is formed under the first high melting point insulating film 20.
In a laminated structure in which a second two-layer structure consisting of a thin film 40 with good thermal conductivity and a second thin film 41 with a high melting point made of a material with poor thermal conductivity is inserted at least on the substrate side, the second high melting point The thickness of thin film 41 is 1600
The first high melting point insulating film 20 has a thickness of at least 1000 Å or more at least in the portion of the semiconductor thin film 30 that is in contact with the region where the channel of the transistor is arranged.
Å or less, and the other portions are thicker than 1000 Å. When melt-crystallizing the semiconductor thin film 30, crystallization is started from the region where the channel is placed, and the channel of the transistor is formed into a single crystal in a self-aligned state with the gate. A method for manufacturing a transistor, characterized by: 2. A first high-melting point insulating film 20' is disposed below at least a portion of the semiconductor thin film 30 to be melt-crystallized where a channel of a transistor is disposed, and a first high-melting point insulating film 20' is further disposed between it and the substrate to serve as a gate. A structure consisting of at least a thermally conductive thin film 40 and a second high melting point thin film 41 made of a material with poor thermal conductivity is partially inserted to reduce the thickness of the first high melting point film 20'.
The thickness of the second high melting point thin film 41 is 1600 Å or less.
Å or more, and in melt-crystallizing the semiconductor thin film 30, crystallization is started from the region where the channel is arranged, and the channel of the transistor is made into a single crystal in a self-aligned state with the gate. Method.