JPH04322352A - Bus transfer control system - Google Patents

Abstract

PURPOSE:To shorten the bus hunt time in the bus transfer control system where plural devices are sharing a bus. CONSTITUTION:In the system where the use right of a bus 1 to which plural devices 2 are connected is arbitrated by a bus arbitrating circuit 3, the bus arbitrating circuit is provided with a time zone designating means 4 which simultaneously returns the use time zone numbers of devices, which simultaneously request the bus use, to these devices and a time zone number sending means 5 which reports the time zone numbers, which are updated at each time of the end of the bus use, to plural devices through a time zone report line 6, and each of plural devices is provided with a use time zone storage means 7 where the use time zone number is stored, a time zone number reception means 8 which receives the time zone number from the time zone report line, and a bus use right confirming means 9 which confirms acquisition of the bus use right at the time of coincidence between the use time zone number in the use time zone storage means and the time zone number in the time zone number reception means.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bus transfer control method in a system in which a plurality of devices share a bus.

[0002] Processor, memory and DM on one bus
In a system in which multiple channel devices that perform A (Direct Memory Access) access are connected, bus usage conflicts occur when memory access occurs during processor processing or DMA access to the memory of each channel device. To avoid this, a bus arbitration circuit (BA) is provided to arbitrate the right to use the bus.

Conventional bus arbitration circuits grant the right to use the bus to one request source according to priority when requests to use the bus occur at the same time, and thereafter grant the right to use the bus to other request sources in sequence whenever the bus becomes free. However, this increases the cumulative value of bus hunt time, resulting in a reduction in the data transfer capacity of the bus.

[0004] Therefore, a bus transfer control system that can shorten the bus hunt time is desired.

[0005]

2. Description of the Related Art FIG. 5 is a block diagram of a conventional technique, FIG. 6 is an explanatory diagram of bus use request processing in the conventional technique, and FIG. 7 is a sequence diagram of bus transfer control in the conventional technique.

FIG. 5 shows that a processor (CPU) is connected to the bus 21.
22, multiple channel devices (CH
1 to CHN) 23-1 to 23-n and memory (ME
24 is connected, and a bus arbitration circuit (BA) 25 arbitrates the right to use the bus. The bus 21 includes an address bus, a control bus, and a data bus (
In FIG. 5, a part of the control bus is shown separately as a bus use request line 26 and a bus use permission line 27.

[0007] The processor 22 (hereinafter referred to as CPU) accesses the MEM 24 (hereinafter referred to as MEM) during the processing process, and also accesses a plurality of channel devices 23-1 to 23-2.
3-n (hereinafter referred to as CH1 to CHN) is also transferred to MEM.
MA access is performed, but between CPU and MEM and CH1
The bus 21 between ~CHN and MEM is commonly used by each device, so the bus 21 between CPU or CH1 ~CHN
makes a bus use request (hereinafter referred to as RQ) to the bus arbitration circuit 21 (hereinafter referred to as BA) via the bus use request line 26 before accessing the MEM.

When the BA receives an RQ from a bus request source such as the CPU or CH1 to CHN, it returns a bus use permission signal (hereinafter referred to as ACK) to the bus use permission line 27 for the bus request source. If two RQs occur simultaneously, one is selected according to the priority order, and an ACK is returned to the selected bus request source. Figure 6 explains this relationship. The solid line indicates RQ and ACK. The figure shows a state in which RQ is issued simultaneously from CPU, CHJ, and CHK, and BA selects only CPU and returns ACK. .

When the bus request source receives the ACK, the bus 21
The address is sent to the MEM via the MEM, data is written (transmitted) or read (received), and when the data write/read is completed, the RQ is turned off.

When the RQ is turned off, the BA selects the next bus request source, for example, the RQ of the CHJ, and sends an ACK, whereby the CHJ writes or reads data using the MEM and DMA. The subsequent operations are also the same as described above.

FIG. 7 shows the above operation in a sequence diagram, and shows the sequence when the CPU, CHJ, and CHK make requests to use the bus at the same time. In this example, first CPU, then CHJ, and finally CHK
ACK is sent to , the CPU and CHK write to MEM, and CHJ reads from MEM.

[0012] In this method, even if RQs are sent at the same time, a bus hunt time is required for each access, so as shown in the figure, the bus hunt time is the cumulative value of the three bus hunt times of ■, ■, ■, t1 + t2. +t3. During this time, the bus cannot perform any transfer, so the data transfer capability of the bus decreases.

[0013]

[Problem to be solved by the invention] In the prior art,
Even when a plurality of devices request the use of the bus at the same time, it is necessary to perform a bus hunt for each access, resulting in a problem that the cumulative value of bus hunt time becomes large and the data transfer capacity of the bus decreases.

[0014] An object of the present invention is to shorten the bus hunt time when bus usage requests are made simultaneously from a plurality of devices.

[0015]

[Means for Solving the Problems] FIG. 1 is a diagram illustrating the principle of the present invention. In the figure, 1 is a bus, and 2 is a plurality of devices connected to the bus 1, but only one device is shown in FIG. 3 is a bus arbitration circuit for arbitrating the right to use the bus 1; 4 and 5 are provided in the bus arbitration circuit 3; A time zone specifying means for simultaneously returning to the device a usage time zone number that specifies the bus usage time zone for each device; It is a time zone number sending means that notifies the plurality of devices 2 via the time slot number sending means.

Further, 6 is a time zone notification line provided between the bus arbitration circuit 3 and the plurality of devices 2, and transmits the time zone number sent from the bus arbitration circuit 3 to the plurality of devices;
Reference numerals 9 to 9 are provided in the plurality of devices 2, 7 is a use time zone storage means for storing the use time zone number returned from the bus arbitration circuit 3 when a bus use request is sent, and 8 is the time zone notification line. 6, a time slot number receiving means for receiving the time slot number sent out to the time slot number; 9, comparing the usage time slot number stored in the usage time slot storage means 7 and the time slot number received by the time slot number receiving means 8; This is a bus usage right confirmation means that confirms that the bus usage right has been acquired when both time slot numbers match.

[0017]

In FIG. 1, a plurality of devices 2 send a bus use request to the bus arbitration circuit 3 when accessing a memory or the like (not shown). In the bus arbitration circuit 3, when the time zone specifying means 4 receives this bus usage request, it returns a usage time zone number that specifies the usage time zone of each device that has made the request. In this case, bus use requests received at the same time are returned at the same time with different usage time slot numbers assigned to them according to their priorities. This usage time slot number is received and stored in the usage time slot storage means 7 of each device 2 that has made the bus use request.

In the bus arbitration circuit 3, the time zone number sending means 5 always sends the time zone number to the time zone number notification line 6 for informing the plurality of devices 2 using the bus of the time zone. The time zone number will be updated each time the bus is used.

In a plurality of devices 2, the time zone number receiving means 8 always receives the time zone number, and in these devices, the bus usage right confirmation means 9 receives the time zone number received by the time zone number receiving means 8. and the usage time slot numbers stored in the usage time slot storage means 7 are compared. If the two time zone numbers match, it means that the time zone designated by the device has arrived; therefore, if the two time zone numbers match, the bus right confirmation means 9 confirms that the bus right to use has been acquired. ,
Information is sent to a processing unit (not shown), etc., to start using the bus.

As described above, when the plurality of devices 2 make a request to use the bus to access memory, a usage time period is immediately specified, and the bus can be used immediately after that time period arrives. . Therefore, even if a plurality of devices request the use of the bus at the same time, there is no need to perform another bus hunt when accessing the memory. As a result, bus hunt time is reduced and the data transfer capacity of the system is increased.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 2 is a block diagram of an embodiment of the present invention, FIG. 3 is an explanatory diagram of bus use request processing in an embodiment of the present invention, and FIG. 4 is a bus transfer control sequence diagram of an embodiment of the present invention.

In FIG. 2, the same objects as in FIG. 1 are indicated by the same symbols, and 2a and 2b are devices constituting a plurality of devices,
2a is a processor (hereinafter referred to as CPU), 2b-1~
2b-n is a plurality of channel devices (hereinafter, CH1 to CH
(denoted as N). Also, 10 is a memory, 11 and 1
2 shows a part of the control bus separated, 11 is a bus use request line, and 12 is a bus use permission line.

FIG. 2 will be described in conjunction with FIGS. 3 and 4, with parts that overlap with the operation of the means for solving the problem described using FIG. 1 being omitted. In FIG. 2, the CPUs or CH1 to CHN that use the bus pass through the bus use request line 11 to the bus arbitration circuit 3 (hereinafter referred to as BA).
A bus use request (hereinafter referred to as RQ) is sent to.

FIG. 3 is a diagram illustrating processing in an example in which RQ is simultaneously performed on BA by the CPU, CHJ, and CHK (not shown in FIG. 2). In the figure, the portion marked with a solid line shows the state of RQ input to BA and the state of time zone number designation from BA.

As shown in FIG. 3, BA sends an ACK, which means permission to use the bus, to all of the CPU, CHJ, and CHK that sent the RQ, and the usage time period numbers T1 to T.
Return 3. In this case, ACK does not mean immediate permission to use the bus, but means permission to use the bus during the respective specified usage time slot numbers. In this example, CPU, CHJ, and CHK are designated to use the buses in time zone numbers T1, T2, and T3, respectively.

Although FIG. 4 shows a bus transfer control sequence under the same conditions as FIG. 3, FIG. 4 will be explained below using FIG. 2 in combination. First, CPU, CHJ and CHK
RQs are sent to BA from three devices at the same time,
In the BA, the time zone specifying unit 4 that receives this specifies the usage time zone number according to the predetermined priority order of the request source, and sends it back to each device almost simultaneously via the bus usage permission line 12 along with ACK. do. In this example, the time zone number T1 ~
T3 is the time slot where the lower number is earlier, and the time slot where the CPU has the highest priority is designated.

The ACK and usage time slot number are received and stored in the usage time slot storage section 7 of each device. As shown in FIG. 4, all bus hunts for the three devices are thus completed.

When BA returns the ACK and the usage time slot number, the use of the bus is temporarily terminated, so the time slot number is updated here, and here, the updated time slot number is assumed to be T1. This time zone number T1 is sent from the time zone number sending unit 5 to the time zone number notification line 6, and is sent to each CPU and CH1 to
It is received by the time zone number receiving section 8 of CHN.

The CPU and CH1 to CHN bus right confirmation unit 9 compares the usage time slot number stored in the usage time slot storage unit 9 with the time slot number received by the time slot number receiving unit 8. However, the CPU that received the usage time slot number T1 along with the ACK confirms that the bus usage right confirmation unit 9 has acquired the bus usage right because the time slot number T1 received at this point matches the usage time slot number. Then, a processing unit (not shown) is notified of this and starts using the bus. Figure 4 shows the CPU writing data to the MEM (
An example of performing W) is shown.

Since the other CHJ and CHK do not match the designated usage time slot number T2 or T3 with the current time slot number T1, the reception of the time slot number and the comparison in the bus right confirmation unit 9 are performed. continue.

[0031] When the CPU finishes writing data to the MEM, the CPU turns off RQ to the BA. This means that the use of the bus has ended, so B
At A, the time zone number sending unit 5 updates the time zone number to T2 and sends it to the time pair notification line 6. This time zone number is CH
CH because it matches the usage time zone number specified in J.
J obtains the right to use the bus and reads data (R) from the MEM as shown in FIG. When RQ is turned off upon completion of data reading, the time zone number is updated to T3 and CHK gains the right to use the bus.

As mentioned above, since the bus hunt ends when an RQ is received, the bus hunt time is t0 shown in FIG.
Only. This bus hunt time t0 is approximately equal to the bus hunt time (t1 in FIG. 7) for the first priority bus use request source in the prior art, and is a time that is approximately equal to the bus hunt time for the first priority bus use request source (t1 in FIG. The bus hunt time (t2, t3 in FIG. 7) is included in the time t0, so it becomes unnecessary. That is, according to the present invention, the bus hunt time is significantly shortened, and the transfer capacity of the bus is increased.

Although the embodiment of the present invention has been described above with reference to FIGS. 2 to 4, FIGS. 2 to 4 merely show one embodiment of the present invention. Of course, it is not limited to For example, in FIG. 2, the devices that make a bus use request are not limited to the processor (CPU) and channel devices (CH1 to CHN), but can be other devices as long as they are connected to the bus and need to request bus use. It is also possible to apply this method to other devices as well.

Furthermore, in FIGS. 3 and 4, the bus use request (R
In response to Q), BA adds the usage time zone number T1 to T3 to the ACK that means permission to use the bus and returns it, but BA returns only the time zone number and makes this also function as an ACK. , ACK can also be omitted.

Furthermore, although FIGS. 3 and 4 show an example in which three devices (CPU, CHJ, and CHK) make requests to use the bus at the same time, the number of request sources from which BA can receive requests at the same time is three. Of course, it is not limited. Furthermore, in FIG. 4, bus use requests are made from three request sources at exactly the same time, but the range of "simultaneous" in this case is not limited to one clock width in BA (not shown); It is possible to set any clock width. In this case, the greater the number of request sources that simultaneously receive bus use requests, the greater the effect of reducing bus hunt time.
It is more effective to make the time range of the "simultaneous" range as large as possible without causing a delay in processing. In particular, when the number of channels is large or when bus usage requests occur frequently, the effect can be enhanced by widening the time width.

[0036]

[Effects of the Invention] As explained above, according to the present invention,
In a system where multiple devices share a bus, it is possible to reduce the bus hunt time when multiple devices request the use of the bus at the same time, improving the data transfer capacity of the bus in such a system, and ultimately improving the system. This greatly contributes to improving the processing capacity of

[Brief explanation of drawings]

[Figure 1] Diagram explaining the principle of the present invention

[Figure 2] Embodiment configuration diagram of the present invention

[Figure 3] An explanatory diagram of bus use request processing according to the embodiment of the present invention

[
Figure 4: Bus transfer control sequence diagram according to the embodiment of the present invention

[
Figure 5: Configuration diagram of conventional technology

[Figure 6] Illustration of conventional technology bus use request processing

[Figure 7
] Conventional technology bus transfer control sequence diagram

[Explanation of symbols]

1 Bus 2　Device 3 Bus arbitration circuit 4 Time zone specification means 5 Time zone number sending means 6 Time zone notification line 7 Usage time storage means 8 Time zone number receiving means 9. Bus usage right confirmation means

Claims (1)

[Claims] Claim 1: In a system in which a bus arbitration circuit (3) arbitrates bus usage rights for a plurality of devices (2) connected to one bus (1), the bus arbitration circuit (3)
A time zone designation function that, when a bus use request is received from the plurality of devices (2), simultaneously returns a usage time zone number that specifies the bus usage time zone for each device to the devices that made the requests at the same time. The means (4) and the time zone number, which is updated each time the use of the bus ends, are transmitted through a time zone notification line (
6) a time zone number sending means (5) for notifying the plurality of devices (2) via the plurality of devices (2);
2) The bus arbitration circuit (
3) a use time zone storage means (7) for storing the use time zone number returned from the time zone notification line (6);
a time zone number receiving means (8) for receiving the time zone number sent to the time zone number; and a use time zone number stored in the use time zone storage means (7) and the time zone number receiving means (8).
1. A bus transfer control system comprising: a bus right confirmation means (9) for comparing time zone numbers received by the time zone numbers and confirming acquisition of the bus right when the two time zone numbers match.