JPH0432236A - Method for producing solder bump - Google Patents

Abstract

PURPOSE:To prevent deterioration of a semiconductor crystal and enable mechanical strength to be reinforced by coating a surface of a compound semiconductor with an insulation film of an Si compound including N, window is made, and a bump-shaped solder is formed on an electrode pad which is formed on that exposed part sandwiching a metal layer. CONSTITUTION:A bias electrode 2 of a CdTe wafer 1 is formed, an Si3N4 film 7 is formed on a surface where the electrode 2 is formed and a side surface, the Si3N4 film 7 is formed on an opposite surface, a window is made for obtaining a pattern of an electrode part for taking out signal, and an electrode pad 3 which is made of Ni is formed at the window part. Then, Cr is uniformly deposited for forming a current metal layer 4 and an SiO2 film 8 is formed on it. At this time, a window of the SiO2 film 8 is made for exposing a current metal layer 4 at a pat corresponding to a part where solder bump is formed. Then, a barrier metal layer 5 is formed, that unneeded part is eliminated, and a skin 6a is exposed. Then, the SiO2 film 8 and the current metal layer 4 are etched. Then, the solder 6a is subjected to wet-back to obtain a semispherical solder bump 6.

Description

Detailed Description of the Invention <Industrial Application Field> The present invention relates to a method for manufacturing solder bumps for connecting a semiconductor chip and a substrate in, for example, a flip-chip mounting method. The present invention relates to a method suitable for forming solder bumps on compound semiconductor chips such as the above.

<Prior Art> One of the techniques for mounting semiconductor elements and the like with high density is the flip-chip mounting method. The flip-chip mounting method is a method in which solder bumps are formed on the electrode pads formed on the surface of the semiconductor chip, and the chip is directly connected to the conductor part of the board by the solder paste flow.
It is widely used for high-density packaging of I-chips.

In addition, in radiographic imaging devices using semiconductor sensors, it is necessary to array the semiconductor sensor chips in a two-dimensional form, for example, and high-density packaging is required together with the signal processing circuit. When mounting this semiconductor sensor, a flip-chip mounting method similar to that used for the above-mentioned IC chips and the like is adopted.

The structure of such a solder bump is, for example, as shown in FIG. 3, a current metal layer 34 is formed on the electrode pad 33 on the surface of the Si chip 31, and a Cr layer as an adhesive metal layer is further formed on the metal layer. layer, Cu layer as diffusion prevention metal layer and Au as oxidation protection metal layer.
Generally, a barrier metal layer 35 consisting of three layers is formed, and a bump-shaped solder 36 is formed on this barrier metal layer. In addition, 37 is Si
This is an Ozm edge film (passivation film), and the plasma CVD method, SOC (spin on glass) method, etc. are generally used to form this insulating film.

<Problems to be Solved by the Invention> Incidentally, compound semiconductor crystals such as CdTe are used in radiation detection elements, etc., and since CdTe etc. have low mechanical strength, it is necessary to Must be covered with insulating material. Furthermore, when compound semiconductors are exposed to high temperatures, compositional deviations occur, so it is necessary to form an insulating film at low temperatures. Here, when forming an insulating film on CdTe by a plasma CVD method or the like, if the film is formed at a low temperature that allows the film to be formed, good film quality cannot be obtained. From the above, conventionally, when forming solder bumps on compound semiconductors, it has been difficult to obtain an insulating film, that is, a passivation film, of good quality without deteriorating the compound semiconductor crystal.

<Means for Solving the Problems> In order to solve the above-mentioned conventional problems, in the present invention, as shown in FIG. , after coating with an insulating film 7 of a Si compound containing at least N (for example, Si3N, film, etc.), a window is opened in the insulating film 7 to expose a part of the compound semiconductor 1, and then an electrode is placed on the exposed part. Pad 3 is formed. A bump-shaped solder 6 is formed on this electrode pad 3 with a predetermined metal layer 4.5 interposed therebetween.

Effect> By employing the ECR-CVD method for forming the insulating film, it is possible to form Si3N, a film, etc. with good film quality at room temperature. Here, Si, N, and the like have strong adhesion strength with CdTe and the like, and do not pass hydrogen or sodium, which can cause contamination. In addition, since it does not contain oxygen, CdTe
can prevent oxidation.

<Example> FIG. 1 is a diagram for explaining the procedure of the method of the present invention, and shows an example in which the present invention is applied to a radiation detection element array.

First, as shown in (a), one side of the CdTe wafer 1 is polished and further surface treated, and then Au is applied to the treated side.
is uniformly deposited to form a common bias electrode 2.
Next, ECR-C is applied to the formation surface and side surfaces of the electrode 2.
After forming the 5i3N4 film 7 by the VD method, the wafer 1
Perform polishing and surface treatment on the opposite side (c). At this time, E
Since the CR-CVD method has large anisotropy, the 5isNa film 7
When stacking, the wafer 1 is tilted or rotated to form a film.

Next, the opposite side of the wafer 1 is coated with S by the ECR-CVD method.
i. N4 film 7 is formed. At this time, a photoresist film is formed on the lower layer of the 5i3N4 film 7, and a window is opened in the Si, N4 film 7 using the lift-off method as shown in (C) to obtain a pattern for the electrode part for signal extraction. . Next, an electrode pad 3 made of Ni is formed in the open window portion (opening) by electroless plating.

Next, Cr is uniformly vapor-deposited to form a current metal layer 4e), and then EC is applied on the current metal layer 4.
A Sin film 8 is formed by the R-CVD method. At this time, a photoresist film is formed under the SiO□ film 8, and a window is opened in the Sing film 8 by a lift-off method to expose the current metal layer 4 in the portion corresponding to the solder bump formation portion (f ).

Next, a photoresist film 9 is formed only on the Sin film 8, and then Cr5Cu and Au are sequentially deposited in a negative manner to form a barrier metal layer 5 (6). Remove unnecessary parts of (c).

Next, in a solder plating bath, a predetermined amount of solder 6a is deposited on the surface of barrier metal layer 5 by electroplating using current metal layer 4 as a current path (i). Then Sin
, the film 8 is removed by etching, and the counter metal layer 4 is further etched using the barrier metal layer 5 as a mask (j). At this time, BHF (buffered fluoric acid) is used as the etchant for the 5in2 film, and a (potassium ferricyanide+KOH+H2O) solution is used as the etchant for the current metal (Cr)4.

Then, the solder 6a deposited on the barrier metal layer 5 is wet-backed to obtain a hemispherical solder bump 6 (G). Finally, open the 5i3N47 window using RIE (reactive ion etching) method, etc.
As shown in FIG. 2, a contact hole 2a of the bias electrode 2 is opened.

According to the above procedure of the embodiment of the present invention, the surface of the CdTe wafer 1 is coated with the St, N4 film 7 at the initial stage of the process, that is, before the electrode pad 3 is formed. Damage, contamination, etc. can be reduced. Moreover, in the formation of the Si, N4 film 7,
By employing the ECR-CVD method, the film can be formed at room temperature without deteriorating the CdTe crystal. In addition, Si and N4 have strong adhesion strength with CdTe (and can strongly protect the CdTe wafer 1.Furthermore, by covering the entire wafer 1 with oxygen-free Si, N, and film 7, the CdTe surface can be Can prevent oxidation.

The insulating film covering the surface of the wafer 1 at the initial stage of the process may be an insulating film of a Si compound containing N, such as 5iON or Si, N, f, etc., in addition to the Si3N film.

Furthermore, the present invention is applicable not only to radiation detection element arrays but also to other sensor arrays using compound semiconductor crystals.

<Effects of the Invention> As explained above, according to the present invention, the surface of a compound semiconductor such as CdTe is coated with an insulator such as Si, N, or a film by the ECRCVD method before forming an electrode pad for forming a solder bump. Since it is covered with a film, the compound semiconductor crystal does not deteriorate during the formation of the insulating film, and there is less damage or contamination of the element during the solder bump manufacturing process.

However, the entire element is made of 5i, which has strong adhesion with CdTe etc.
Since it is covered with an sNi film or the like, the mechanical strength is increased. For these reasons, it is possible to improve the characteristics, strength, etc. of compound semiconductor elements used in flip-chip mounting methods and the like.

[Brief explanation of the drawing]

FIG. 1 and FIG. 2 are diagrams explaining the procedure of the method of the present invention. FIG. 3 is a diagram showing an example of a general structure of a solder bump. 1... CdTe wafer 2... Bias electrode 3... Electrode pad for signal extraction 4... Current metal layer 5... Barrier metal layer 6... Solder bump 7... Si, N4 film (Insulating film) Figure 2 Figure 3 Patent applicant Agent: Shimadzu Corporation
Patent Attorney Nishi 1) Arata

Claims (1)

[Claims] The surface of the compound semiconductor is coated with the ECR-CVD method.
After coating with an insulating film of Si compound containing at least N,
A window is opened in the insulating film to expose a part of the compound semiconductor, and then an electrode pad is formed on the exposed part, and then a bump-shaped solder is formed on the electrode pad with a predetermined metal layer in between. A solder bump manufacturing method.