JPH04324353A - Eddy current flaw detection method for piping - Google Patents

Abstract

PURPOSE:To achieve a decrease in amount of memory data, a smaller size of the apparatus and a higher speed of processing by recording an amplitude or a peak value and a phase together with a distance signal only when the amplitude or the peak value is above a specified value. CONSTITUTION:A flaw detection signal having noises suppressed with a synchronous detector 4 is inputted into a phase shifter 7 via a zero adjustor 6 which is controlled with a CPU11 and a signal corresponding to an amplitude of the flaw detection signal is inputted into a peak detector 12. The detector 12 generates an interrupt signal to the CPU11 only when a peak value of the flaw detection signal exceeds a specified value while the value thereof is converted into digital from analog to be outputted to a bus 8. A signal having the amplitude exceeding a specified value is recorded into an IC memory card 16 together with the grade of the amplitude, a phase and a distance signal derived by a distance synchronous pulse. Thus, data effective for flaw detection alone are selected and recorded thereby enabling the use of even a card 16 with a limited memory capacity with a decrease on the amount of data when a long-range flaw detection is performed.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an eddy current flaw detection method for piping.

0002

2. Description of the Related Art Eddy current flaw detection of piping is carried out by moving a flaw detection coil into the pipe using a traveling device, recording a flaw detection signal together with a distance signal, and analyzing the recorded flaw detection data. In other words, the raw flaw detection signal from the eddy current flaw detection coil is recorded as a two-dimensional flaw detection signal containing amplitude and phase information by suppressing the noise component using a technique such as synchronous detection, and is recorded in this way. By appropriately processing and observing the flaw detection data obtained, the types of defects such as through holes and thinning, as well as joints, etc., are determined. Regarding eddy current flaw detection using synchronous detection, please refer to "Eddy current flaw detection test B 1991" edited by the Japan Nondestructive Inspection Association.

0003

[Problems to be Solved by the Invention] Conventionally, the above-mentioned flaw detection signal is recorded on a recording medium as an analog quantity together with a distance signal, or simply as a digital quantity by continuous A/D conversion, so that the data to be recorded is Therefore, not only is a large amount of data to be processed after recording, which takes a long time to process, but also a recording medium with a large recording capacity, such as a data recorder, is required, making miniaturization difficult.

Further, the derivation of flaw detection results from the recorded data, that is, the determination of the type of defect, joint, etc., can be carried out using a method such as observation using a two-dimensional display, that is, a Lissajous display, on the image plane of a CRT or the like. This is done with very little automation. The present invention aims to solve such problems.

[0005]

[Means for Solving the Problems] In order to solve the above-mentioned problems, the eddy current flaw detection method for piping of the present invention first records a two-dimensional flaw detection signal including amplitude and phase information on a recording medium together with a distance signal. In an eddy current flaw detection device configured to perform flaw detection, the amplitude or peak value and phase of the flaw detection signal are recorded on a recording medium together with a distance signal only when the amplitude or peak value is greater than a predetermined value. The flaw detection signals recorded in the test were graded for each of the amplitude or peak value and phase, and then flaw detection results were derived from a combination of these grades and the distance signal.

In the eddy current flaw detection method, only when the amplitude or peak value of the flaw detection signal is greater than a predetermined value, the amplitude or peak value is graded, and the grade is recorded on a recording medium together with the phase and distance signals. In this case, the flaw detection data recorded on the recording medium is subjected to phase grading processing, and the flaw detection results are determined based on the combination of the amplitude or peak value grading and the distance signal. can be derived.

Furthermore, in the eddy current flaw detection apparatus, only when the amplitude or peak value of the flaw detection signal is greater than a predetermined value, the amplitude or peak value and phase of the flaw detection signal are graded, and these grades are recorded on a recording medium together with the distance signal. In this case, the flaw detection data recorded on the recording medium can derive the flaw detection result from a combination of amplitude or peak value and phase class and a distance signal.

[0008] In the above method, the recording medium can be an IC memory card;
The storage space of the memory card can be allocated within the addressing space of the CPU of the eddy current flaw detection device by bank switching.

[0009]

[Operation] Only when the amplitude or peak value of the flaw detection signal is greater than a predetermined value, the amplitude or peak value and phase data are recorded on the recording medium together with the distance signal, so the amount of data to be recorded is extremely small and the storage capacity is A relatively small number of recording media can be used. The data recorded on the recording medium in this way is the signal value itself including the amplitude or peak value and phase of the two-dimensional flaw detection signal, as well as the grading of either the amplitude or peak value, or the amplitude or peak value and phase. These grades can be recorded by adding a grading code, which further reduces the amount of data to be stored.

[0010] Therefore, a small, high-speed IC memory card can be used as the recording medium, and as a result, the flaw detection apparatus can be downsized. Further, by configuring the storage space of the IC memory card to be allocated within the address designation space of the CPU of the eddy current flaw detection device by switching banks, processing speed can be further increased.

By the way, the amplitude of the flaw detection signal changes depending on the area of the defective portion such as the through hole, that is, the larger the area, the larger the amplitude, and it becomes extremely large at the joint portion. On the other hand, the phase of the flaw detection signal is large at the through hole portion, and conversely becomes small at the thinned portion or joint portion.

[0012] Therefore, the amplitude or peak value and phase of the flaw detection signal recorded on the recording medium are graded, and the type and size of the defect and the joint can be determined from a combination of these grades. As described above, if either the amplitude or the peak value, or the magnitude of the amplitude or the peak value and the phase is recorded on the recording medium, the above determination process can be performed easily and at high speed.

[0013]

Embodiments Next, embodiments of the present invention will be explained with reference to the drawings. First, FIG. 1 is a block diagram showing an embodiment of an eddy current flaw detection device to which the present invention is applied, and this device is configured as a microcomputer application device. In this diagram,
Reference numeral 1 denotes a flaw detection coil, which is configured as an element of a bridge circuit 2, and a flaw detection signal due to a defect or the like appears as an unbalanced signal of this bridge circuit 2. This flaw detection signal is amplified by an amplifier 3 and input to a synchronous detector 4. Reference numeral 5 denotes an oscillator, and an AC signal from this oscillator 5 is input to the bridge circuit 2 and the synchronous detector 4. The flaw detection signal whose noise has been suppressed in the synchronous detector 4 is sent to a zero adjuster 6 controlled by a CPU 11 and a phase shifter 7 via D/A converters 9 and 10 connected to a bus 8, respectively. A signal corresponding to the amplitude of the flaw detection signal is output. The output of the phase shifter 7 is then input to the peak detector 12, and when the peak value is greater than or equal to a predetermined value, a predetermined signal, in this case an interrupt signal, is sent to the CPU 11, and the value is A/D converted. Output to bus 8,
Predetermined processing as described later is performed. Reference numeral 13 is a ROM that stores control programs, constants, etc., 14 is a RAM for working, 15 is a keyboard for operation, and 16 is an IC memory card as a recording medium. Further, reference numeral 17 is a liquid crystal display section, and 18 is a printer. On the other hand, reference numeral 19 is an encoder provided on a traveling device that moves the flaw detection coil 1 into the pipe.
A distance synchronization pulse corresponding to the travel of the bus 8 is output to the bus 8.

FIG. 2 shows an example of a two-dimensional flaw detection signal containing amplitude and phase information in Lissajous display, and noise can be suppressed by making the X-axis direction correspond to the phase of the noise. can do. The flaw detection device detects the amplitude and phase of such a flaw detection signal using the above-described configuration or the like. These detections can be derived, for example, from the X-axis direction component and the Y-axis direction component in FIG. 2, and these components are obtained as the outputs of the pair of synchronous detectors in which the phases of the control signals are different by 90 degrees. be able to.

Thus, the CPU 11 ranks the peak values of the amplitudes output to the bus 8 as described above. FIG. 3 shows a flaw detection signal indicating the amplitude of each grade, that is, a signal in the Z-axis direction in FIG. 2, and the signal level increases from the left side to the right side in the figure. Among the signals in this figure, the signal (■) has not reached the level C shown on the left side of the figure, so the peak detector 12 does not generate the above interrupt signal, and therefore this data is It will be ignored. The signals on the right side are: ■, ■ are C rank, ■, ■ are B rank, ■, ■ are A rank, ■,
■ is graded as J rank.

In this way, a signal having an amplitude above a predetermined value, that is, an amplitude above the above-mentioned C rank, is outputted to the IC memory card 16 together with the magnitude and phase of this amplitude and the distance signal derived from the above-mentioned distance synchronization pulse. and recorded. Recording of the flaw detection signal is performed only when a signal with an amplitude equal to or higher than the above C rank is detected, that is, only data effective for flaw detection is selected and recorded, so when performing flaw detection over a long distance. However, the amount of data is very small. Therefore, even the IC memory card 16 with limited storage capacity can record data over a sufficient distance. On this occasion,
By configuring the storage space of the IC memory card 16 to be allocated within the address designation space of the CPU 11 by switching banks, processing speed can be increased. In addition, in such a flaw detection operation, the flaw detection device checks whether the IC memory card 16 is installed as specified and whether the remaining memory capacity is sufficient.
By configuring the device to determine whether the built-in battery has sufficient remaining power, reliable flaw detection can be performed.

In the above operation, only the peak value of the amplitude is recorded as a grade, but the phase can also be similarly graded and recorded as a grade, as will be described later. In some cases, both amplitude and phase
It is also possible to record without grading.

The flaw detection data thus recorded on the IC memory card 16 is processed in the flaw detection device itself or in a processing device 20 such as a personal computer to derive flaw detection results, that is, to determine the type and size of defects, joints, etc. Make a judgment. FIG. 4 shows a basic algorithm for making such a judgment as a judgment table, and the judgment is made based on a combination of graded amplitude and phase. The amplitude is
As mentioned above, it is graded from A rank to J rank,
Moreover, the phase is graded from 1st rank to 5th rank. In the embodiment, the ranks of this phase are 1 rank...130° to 70°, 2 ranks...70° to 60°, and
3rd rank: 60°, 4th rank: 60° to 50°, and 5th rank: 50° to 0° (180° to 130°).

As described above, the amplitude of the flaw detection signal changes depending on the area of the defective portion such as the through hole, that is, the larger the area, the larger the amplitude. The amplitude also becomes very large at the joint. On the other hand, the phase of the flaw detection signal is large in the through hole portion, regardless of its area, and is about 80° to 120°. In addition, the angle is small and does not exceed 60° in areas with reduced thickness or joints. Therefore, the type and size of the defect, the joint, etc. can be determined in accordance with the combination of the above-mentioned amplitude and phase ranks.

In other words, in FIG. 4, the numbers displayed corresponding to the intersections of each rank of amplitude and phase indicate the priority of the determination results of the type and size of defects, joints, etc. The lower the value, the higher the priority of flaw detection. The correspondence between this value and the type and size of defects, joints, etc. is as follows. 2, 3...Large through holes 4, 6, 7, 8, 10...Through holes 11, 19...Normal 14, 18...Thickness loss (corrosion) 9, 13, 17...Joint 20...Normal Based on this correspondence relationship Judgment can be made by obtaining a combination of each rank of amplitude and phase for each flaw detection signal recorded on the recording medium. Such determination processing can be easily performed as appropriate in the processing device 20 or the like, and the determination results can also be displayed as appropriate.

[0021] In the flaw detection of piping, it is important to ensure that there are no multiple joints within 15 cm, and that there are no
For example, in a range of about 3 cm, accurate flaw detection is impossible due to the influence of the joint, and in a short distance, for example, 2 cm.
There are specific conditions such as when there are multiple defects within a certain distance, there will be no problem in dealing with them even if they are included in the higher priority defects. It is best to take the conditions into account.

[0022]

[Effects of the Invention] As described above, in the present invention, the amplitude and phase data of the flaw detection signal is recorded on the recording medium together with the distance signal only when the amplitude or peak value is above a predetermined value.
The amount of data to be recorded is extremely small, and a recording medium with relatively low storage capacity can be used.Using an IC memory card as the recording medium has the effect of speeding up processing and making it more compact. be.

[0023] Furthermore, the present invention judges the flaw detection data recorded on the recording medium by determining the type, size, and joint of the defect from each combination of the graded amplitude or peak value and phase. The effect is that processing can be performed automatically and at high speed.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of the configuration of an eddy current flaw detection apparatus to which the present invention is applied.

FIG. 2 shows an example of a flaw detection signal expressed in Lissajous display.

FIG. 3 is an explanatory diagram showing grading of amplitudes of flaw detection signals.

FIG. 4 is an explanatory diagram showing a basic algorithm of determination processing as a determination table.

[Explanation of symbols]

1 Flaw detection coil 2 Bridge circuit 3 Amplifier 4 Synchronous detector 5 Oscillator 6 Zero adjuster 7 Phase shifter 8 Bus 9 D/A converter 10 D/A converter 11 CPU 12 Peak detector 13 ROM 14 RAM 15 Keyboard 16 IC memory card 17 Liquid crystal display 18 Printer 19 Encoder 20 Processing equipment

Claims (1)

[Scope of Claims] [Claim 1] In an eddy current flaw detection apparatus configured to perform flaw detection by recording a two-dimensional flaw detection signal including amplitude and phase information on a recording medium together with a distance signal, the flaw detection signal has amplitude and phase information. Alternatively, only when the peak value is above a predetermined value, the amplitude or peak value and phase are recorded on the recording medium together with the distance signal, and the flaw detection signal recorded on the recording medium is After performing the grading process,
A piping eddy current flaw detection method characterized by deriving a flaw detection result from a combination of these grades and a distance signal.Claim 2: A two-dimensional flaw detection signal including amplitude and phase information is recorded on a recording medium together with a distance signal. In an eddy current flaw detection device configured to perform flaw detection, only when the amplitude or peak value of the flaw detection signal is greater than a predetermined value, the amplitude or peak value is graded, and the grade is recorded together with the phase and distance signal. The flaw detection signal is recorded on a medium, and the flaw detection signal recorded on the recording medium is subjected to phase grading processing, and the flaw detection result is derived from the combination of the above-mentioned amplitude or peak value grade and the distance signal. [Claim 3] An eddy current flaw detection method configured to perform flaw detection by recording a two-dimensional flaw detection signal including amplitude and phase information on a recording medium together with a distance signal, wherein the flaw detection signal is Only when the amplitude or peak value is greater than a predetermined value, the amplitude or peak value and phase are graded and the grades are recorded on a recording medium together with a distance signal, and the flaw detection signal recorded on the recording medium is A piping eddy current flaw detection method characterized in that a flaw detection result is derived from a combination of amplitude or peak value and phase class and a distance signal.Claim 4: In the method of claim 1, 2 or 3, a recording medium is provided. [Claim 5] In the method of claim 4, the storage space of the IC memory card is a bank in the addressing space of the CPU of the eddy current flaw detection device. Eddy current flaw detection method for piping, characterized by having a configuration in which assignment is made by switching