JPH04326876A - Picture input device - Google Patents

Abstract

PURPOSE:To average integration action time in a horizontal direction in a picture input device to synthesize the picture of one frame from plural frames of input pictures by using the solid state image pickup element of a line sequential reset dot sequential read-out system. CONSTITUTION:This picture input device is constituted of the solid state image pickup element of the line sequential reset dot sequential read-out system consisting of a picture element array 3, a vertical scanning circuit 1, two horizontal scanning circuits 2-1,2-2 to execute scanning in directions reverse to each other, and output signal line 4, frame memories 8-1 to 8-n to A/D-convert a video signal outputted from the output signal line 4 and store it, and an adder 10 to execute the addition processing of the picture data of the frame memory. The integration action time is averaged in the horizontal direction by the above- mentioned addition processing, and the video signal corrected in its integration action time difference can be obtained.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image input device using a solid-state image sensor.

0002

2. Description of the Related Art Conventionally, an image input device using a solid-state image sensor as an input section is known to have a configuration for synthesizing one frame image from a plurality of frames of input images. For example, Japanese Patent Application Laid-Open No. 2-107076 discloses an image input method that obtains an image signal with a wide dynamic range by importing multiple frames of images into a frame memory and then combining them into one frame image by adding them. A device has been proposed. In addition to this proposal,
Examples of frame addition processing as described above are known for the purpose of reducing random noise.

0003

[Problem to be Solved by the Invention] However, if the solid-state image sensor used as the input section in the image input device configured as described above has a line-sequential reset point-sequential readout method, the integration time differs depending on the horizontal position. The above-mentioned problem peculiar to the solid-state image sensor still remains. This problem will be explained using FIG. 12. Figure 12
1 shows the configuration of a general solid-state image sensor, which is composed of a light receiving section in which unit pixels 101 are arranged in a matrix, a vertical scanning circuit 102, a horizontal scanning circuit 103, and an output signal line 104. There is. In the case of the line sequential reset point sequential readout method, first the vertical selection line 105
Regarding the row line accessed by , the horizontal selection line 106 sequentially accesses the column lines, and the readout operation is performed in the order of unit pixels 1, 2, 3, . . . m (m: number of horizontal pixels) in the figure. It will be done. Then, when the reading of one row line is completed, the vertical selection line 1
05, a reset operation is performed for m pixels continued in that row line.

The difference in the integration time of photocharges of each pixel in this case will be explained based on FIG. 13. The integral time here is defined as the time from the time when resetting is completed for a certain pixel to the time when reading is performed. If the time when resetting is completed for a certain row line is t=0, and the first pixel of that row line is read out at time t=T, then the kth pixel (1≦k≦m) is read out. The integration time of is expressed as T+(k-1)t0. However, t0 indicates the readout time of one pixel. Therefore, the integration time differs depending on the reading order, in other words, the horizontal position. There is an integration time difference of (m-1)t0 between the first pixel read out in the row line and the last (mth) pixel read out, which is a time approximately equivalent to 1H period.

The present invention has been made in order to solve the above-mentioned problems in conventional image input devices. An object of the present invention is to provide an image input device that does not cause a difference in integration time in the horizontal direction even when using a solid-state image sensor of a reset point sequential readout method.

[0006]

[Means and Operations for Solving the Problems] In order to solve the above-mentioned problems, the present invention includes a solid-state image pickup device of a line sequential reset point sequential readout method as an image input section, and outputs an output signal of the solid-state image pickup device A. In the image input device, the solid-state image pickup device has a means for performing A/D conversion, a means for storing a plurality of frames of A/D-converted image data, and a means for performing an addition process on the stored plurality of frames of image data. two horizontal scanning circuits that scan in opposite directions;
It is equipped with a common output signal line for taking out the video signals output by the two horizontal scanning circuits, and a control terminal for controlling the scanning direction of the two horizontal scanning circuits from outside the element. be.

In the image input section configured as described above, two horizontal scanning circuits that scan in opposite directions output a normal rotation signal and an inversion signal from the output signal line, and these signals are A/D converted. After each is stored in the storage means, addition processing is performed. As a result, the integration time is averaged in the horizontal direction, and a video signal with no difference in integration time can be obtained.

[0008]

[Example] Next, an example will be explained. FIG. 1 is a block diagram showing a first embodiment of an image input device according to the present invention. This embodiment shows an example of an image input device that synthesizes one frame of image data by performing addition processing on a plurality of frames of image data. In the figure, the part shown to the left of the broken line is a solid-state image sensor with a line-sequential reset point-sequential readout method, which serves as an input section. It is composed of a circuit 1, two horizontal scanning circuits 2-1 and 2-2 that scan in opposite directions, and an output signal line 4. Two horizontal scanning circuits 2
-1 or 2-2 is selected by inputting a scanning direction control signal (F/R) from the timing control circuit 9 to the image sensor via the scanning direction control signal line 14 connected to the control terminal. is done. The video signal output from the output signal line 4 passes through a preamplifier 5, is converted into a digital signal by an A/D converter 6, and is sent to a timing control circuit 9.
and are stored in frame memories 8-1 to 8-n designated by distributor 7. Note that n is the number of frames to be input. The n-frame image data taken into the memory is subjected to addition processing by an adder 10, then converted to an analog signal by a D/A converter 11, and subjected to various processing by a process circuit 12 and an encoder 13. , and is output as a video signal.

Next, the principle of correcting the horizontal integration time difference in the image input device configured as described above will be explained. FIG. 2 shows in more detail the internal configuration of the solid-state image sensor used in this example. This solid-state image sensor has a pixel array in which unit pixels 17 are arranged in k rows and m columns, a vertical scanning circuit 1, and two horizontal scanning circuits 2-1 and 2-2 that scan in opposite directions. . The two horizontal scanning circuits 2-1 and 2-2 have separate horizontal selection switch groups 15-1 to 15-m and 16-1 to 16-, respectively.
However, the output signal line 4 is common to both. The scanning direction (from left to right) of the first horizontal scanning circuit 2-1 is the forward direction, and the scanning direction (from left to right) of the second horizontal scanning circuit 2-2 is the forward direction.
(from right to left) in the opposite direction, the first horizontal scanning circuit 2-
The video signal outputted by the first scanning is a normal normal rotation signal, while the video signal outputted by the scanning of the second horizontal scanning circuit 2-2 is an inverted signal in which the left and right sides of the screen are reversed.

Here, assuming that n=2, that is, one frame of image data is synthesized by adding two frames of image data, the first frame is scanned by the first horizontal scanning circuit 2-1. In the second frame, an inverted signal obtained by scanning by the second horizontal scanning circuit 2-2 is taken in. The j-th line in FIG. 2 (1≦j≦
k) pixel groups Pj1, Pj2, Pj3,... Pjm
Paying attention to the output from the pixel group Pjn in the n-th column (1≦n≦m), the output from the forward scanning of the first horizontal scanning circuit 2-1 is Fn, and the output from the second horizontal scanning circuit 2 is Fn. If the signal obtained by scanning in the -2 reverse direction is Rn, the video signal obtained from the output signal line 4 is as shown in FIG. The first pixel read out in both the first frame and the second frame (
If the integration time of Pj1 in the first frame and Pjm in the second frame is T, and the readout time of one pixel is t0, then the integration time of the i-th pixel (1≦i≦m) is T+(i -1) It is expressed as t0. Therefore, since Fn is read out at the nth time in the first frame, the integration time is T+(n-1)t0, and since Rn is read out at the m-n+1th time in the second frame, the integration time is T+(m-n ) becomes t0. What is finally obtained as the output of pixel Pjn is the sum of image data for two frames (Fn + Rn), but the integration time corresponding to this output sum is [T+(n-1)t0]+[T+( m-n)
t0]=2T+(m-1)t0, which does not depend on n. That is, by performing the above-mentioned addition process, it is possible to obtain a video signal in which the integration time does not differ depending on the position in the horizontal direction.

Furthermore, the above addition process can be easily realized by simply controlling the memory addresses in the configuration shown in FIG. An example of this memory address control is
It is conceptually shown in FIG. For example, normal rotation signal data F1, F
2, F3,...Fm are stored sequentially from the address with the smallest address #, while the inverted signal data Rm, Rm-1
, Rm-2, . . . R1 may be stored in order from the one with the largest address #, and the sum of data having the same address # may be calculated. Further, since it is sufficient to time-reverse the inverted signal data as a result, a configuration is also possible in which data having different address #s are summed at the time of reading. With this configuration, while achieving the original purpose of compositing one frame of image data by adding two frames of image data, the horizontal direction can be achieved with almost no increase in time or system configuration burden. It becomes possible to correct the integration time difference. Also, the above example is for the case where n=2, but even if n is larger, n is set to an even number and the normal rotation signal data and the inversion signal data are divided by n/2.
By capturing frames frame by frame, an image with no horizontal integration time difference can be obtained by the same operation as above.

Next, a second embodiment of the present invention will be explained based on FIG. This embodiment has exactly the same system configuration as the first embodiment shown in FIG. 1, except that the configuration of the solid-state image sensor in the input section is replaced with that shown in FIG. 5. The solid-state image sensor of this embodiment also has two horizontal scanning circuits 2-1 and 2-.
However, by connecting the horizontal selection switches through OR gates 22-1 to 22-m, the horizontal selection switch groups 21-1 to 21-m and the output signal line 4 are shared. According to this configuration, the number of MOS transistors for horizontal selection switches connected to the output signal line 4 is halved compared to the first embodiment, and the parasitic capacitance is halved. This is advantageous in terms of noise.

Next, a third embodiment of the present invention will be explained. This embodiment also has almost the same system configuration as the first embodiment shown in FIG. 1, except that the configuration of the solid-state image sensor in the input section has been changed. FIG. 6 shows the system configuration, and FIG. 7 shows the solid-state image sensor. It shows the configuration. This embodiment aims at simplifying the element configuration by making the horizontal scanning circuit 23 a bidirectional scanning type that can operate in both forward and reverse directions. As shown in FIG. 7, by making the horizontal scanning circuit 23 a bidirectional scanning type, only one horizontal scanning circuit is required, and the connection with the horizontal selection switch is also very simple, reducing the peripheral circuit area. It becomes possible to do so.

Next, the bidirectional scanning type horizontal scanning circuit used in this embodiment will be specifically explained. FIG. 8 shows an example of a shift register unit generally used as a scanning circuit. 8(A) is constructed by a combination of an inverter and a transfer gate, and FIG. 8(B) is constructed by a combination of clocked CMOS type inverters. FIG. 9A shows a connection configuration of an m-stage shift register that enables bidirectional scanning using a shift register unit having the above configuration. This circuit configuration includes m shift register units 24 and m
It is composed of +1 switch group (A) 25 and m+1 switch group (B) 26. When the switch group (A) 25 is closed and the switch group (B) 26 is open, it operates in the forward direction (from left to right in the figure), and when the switch group (A) 25 is open and the switch group (B) 26 is closed, it operates in the reverse direction. Operates in the direction (from right to left in the diagram). Also, these switch groups (A), (
B) is composed of a two-channel transfer gate as shown in FIG. 9B, and its opening and closing are controlled by the timing control circuit 9 shown in FIG.
Scanning direction control signal (F/*R), (*F/R) [However*
indicates negative logic] is input to the element. The processing of the data output in this third embodiment is similar to that described in the first embodiment.

Next, a fourth embodiment of the present invention is shown in FIGS.
The explanation will be based on. This embodiment is an application example in which a non-destructively readable solid-state image sensor is used in the input section. The solid-state image sensor used in this embodiment also has two horizontal scanning circuits, as in the first and second embodiments, the first horizontal scanning circuit 2-1 is dedicated to forward scanning, and the second horizontal scanning circuit 2-1 is dedicated to forward scanning. Although the circuit 2-2 is dedicated to reverse scanning, it has two output signal lines, a normal rotation signal output line 27 and an inversion signal output line 28, so that a normal rotation signal and an inversion signal can be taken out independently. Note that 29 is a pixel that can be read out non-destructively. When these two horizontal scanning circuits 2-1 and 2-2 are operated simultaneously, the solid-state image pickup device can be read out non-destructively, so that a normal rotation signal and an inversion signal can be simultaneously output. The forward rotation signal and the inversion signal output at the same time are separately A/D
It is converted and stored in frame memories 8-1 to 8-n. Then, as in the first embodiment, by time-reversing the inverted signal and adding it to the normal rotation signal, the horizontal integral time difference can be corrected.

According to this configuration, a pair of normal rotation data and inverted data can be obtained in one frame of capture time, so that the integration time difference can be corrected with one capture. Furthermore, since the number of frames that can be captured per unit time is doubled compared to the case of using a solid-state image sensor that cannot be read out non-destructively, it is also possible to obtain a greater effect of reducing random noise by addition processing.

The present invention is based on the premise that the input/output characteristics of the solid-state image sensor used in the light receiving section are linear within the range of output level fluctuations due to integration time differences. Therefore, in principle, accurate correction cannot be performed with an element having nonlinear input/output characteristics. However, in many cases, the time required to read one line is quite short compared to the total integration time (T>>mt0), and the output level fluctuation due to the integration time difference does not become so large. Therefore, even if an element has non-linear input/output characteristics, it can be considered to be sufficiently linear within a relatively narrow output range. It can be said that it is applicable.

Furthermore, the configuration of each of the above embodiments can be applied to an input device for horizontally inverted images by simply changing the memory address control circuit. That is, in the above embodiment, the inverted signal is time-reversed and added to the normal signal, but if the normal signal is time-reversed and added to the inverted signal, a horizontally inverted image with no horizontal integration time difference is obtained. Become. Therefore, by changing the memory address control circuit and configuring the normal rotation signal to be time-inverted, an input device for horizontally inverted images can be obtained. Furthermore, by including a memory address control circuit that can time-reverse either the normal rotation signal or the inversion signal by external control, the image input device can obtain any image, whether it is a normal rotation image or a horizontally reversed image. It is also possible to do this. Note that the configurations of each of the above embodiments are obviously applicable to multi-line readout as well.

[0019]

[Effect of the invention] As explained above based on the embodiments,
According to the present invention, in an image input device that synthesizes one frame of image data by addition processing of input image data of a plurality of frames, even when a solid-state image sensor of a line sequential reset point sequential readout method is used as an image input section,
It is possible to realize an image input device that does not cause a difference in the integration time of the above-mentioned elements in the horizontal direction.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a first embodiment of an image input device according to the present invention.

FIG. 2 is a circuit configuration diagram showing the configuration of a solid-state image sensor in the first example.

FIG. 3 is a diagram showing the output signal and integration time of the solid-state image sensor shown in FIG. 2;

FIG. 4 is a conceptual diagram showing an aspect of signal addition processing by memory address control in the first embodiment.

FIG. 5 is a circuit configuration diagram showing the configuration of a solid-state image sensor in a second embodiment.

FIG. 6 is a block configuration diagram showing a third embodiment.

FIG. 7 is a circuit configuration diagram showing the configuration of a solid-state image sensor in a third embodiment.

FIG. 8 is a diagram showing a circuit configuration of a general shift register unit.

FIG. 9 is a block configuration diagram showing a shift register capable of bidirectional operation.

FIG. 10 is a block configuration diagram showing a fourth embodiment.

FIG. 11 is a circuit configuration diagram showing the configuration of a solid-state image sensor in a fourth example.

FIG. 12 is a schematic diagram showing a configuration example of a conventional solid-state image sensor.

13 is a diagram showing a difference in integration time of pixels in the horizontal direction in the solid-state image sensor shown in FIG. 12. FIG.

[Explanation of symbols]

1 Vertical scanning circuit 2-1 First horizontal scanning circuit 2-2 Second horizontal scanning circuit 3 Pixel array 4 Output signal line 7 Distributor 8-1 to 8-n Frame memory 9 Timing control circuit 10 Adder 12 Process circuit 13 Encoder 14 Scanning direction control lines 15-1 to 15-m Horizontal selection switches 16-1 to 1
6-m Horizontal selection switch 17 Unit pixels 18-1 to 18-k Vertical selection lines 19-1 to 19-m Horizontal selection lines 20-1 to 20-m Horizontal selection line 23 Bidirectional scanning type horizontal scanning circuit 24 Shift register Unit 27 Normal rotation signal output line 28 Inversion signal output line 29 Pixel that can be read out non-destructively

Claims (3)

[Claims] 1. A solid-state image sensor of a line-sequential reset point-sequential readout system is provided as an image input section, means for A/D converting an output signal of the solid-state image sensor, and means for converting a plurality of A/D-converted image data frames. An image input device comprising a storage means and a means for performing an addition process on stored image data of a plurality of frames, the solid-state imaging device comprising: two horizontal scanning circuits in which the solid-state image sensor scans in mutually opposite directions; An image input device comprising: a common output signal line for taking out video signals output by the circuit; and a control terminal for controlling the scanning direction of the two horizontal scanning circuits from outside the element. Device. 2. A solid-state image sensor of a line sequential reset point sequential readout method is provided as an image input section, means for A/D converting an output signal of the solid-state image sensor, and means for converting a plurality of A/D converted image data frames. In the image input device, the image input device has a storage means and a means for performing an addition process on the stored image data of a plurality of frames,
one horizontal scanning circuit capable of scanning in a direction, an output signal line for taking out a video signal output by the horizontal scanning circuit, and a control terminal for controlling the scanning direction of the horizontal scanning circuit from outside the element. An image input device comprising: 3. The horizontal scanning circuit includes an N-stage shift register, an N+1 first switch group, and an N+1 second switch group, and the K-th stage (1≦
The input terminal of the shift register (K≦N) is connected to the output terminal of the K-1st stage via the first switch group, and
The output terminal of the K-th stage shift register is connected to the input terminal of the K-1st stage through a second switch group, and 3. The image input device according to claim 2, wherein the image input device is connected to the K+1st stage input terminal via one switch group.