JPH04329792A - Still picture recorder - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a still image recording apparatus for recording still images on a magnetic disk or the like.

0002

[Prior Art] For example, a 2-inch magnetic disk has an NT
SV (
still/video) systems are known. Recently, the CHSV (format Compa
Table High Definition SV)
A method called ``method'' has been proposed. The details of this CHSV method are well known and will therefore be omitted, but an outline thereof will be explained here.

[0003] The CHSV method uses a technique called analog transmission of sample values. This is HDT
V (high definition televisions)
MUSE (mu ion) is known as a transmission method for
ltiple sub-Nyquist sample
This technique is also used in the NG encoding system, and attempts to correctly transmit a sample value sequence (time interval is T) using an analog transmission path with a predetermined band limit. The following (a),
There are two (b).

(a) The frequency characteristic of the analog transmission line is a linear phase and a symmetric roll-off characteristic centered at a frequency of 1/2T (Nyquist condition).

(b) On the receiving side (during playback), correct sample points can be resampled. In the CHSV method, after satisfying the above two conditions, the sample value sequence of the video signal is converted into S
It is basically recorded on a V floppy and played back.

FIG. 3 is a diagram conceptually showing the above-mentioned analog transmission of sample values. In the figure, 201 is a signal transmission line with LPF (low pass filter) characteristics, 202 is a sampling means for resampling, and the input signal that has entered the transmission line 204 is band-limited by the LPF 2001.
After being modulated by the FM modulation circuit 2002, it is magnetically recorded on the SV floppy 2003 via an electromagnetic conversion system. Also,
The reproduced signal is demodulated by the FM demodulation circuit 2004 and then output to the sampling means 202 through the LPF 2005.

FIG. 4 also shows that in the above CHSV method,
Y (luminance signal and C1, C2) recorded on SV floppy
This shows a sample pattern of a (color difference) signal. Here, the color difference signals C1 and C2 indicate the (RY) signal and the (B-Y) signal, but as a classification method that indicates how to take sample points, here they are indicated as C1 and C2. do. Therefore, when C1=(RY), C2=(BY), and conversely, when C1=(BY), C2=(RY). And in the CHSV method,
The Y, C1, and C2 signals of the sample patterns shown in FIGS. 4(a), (b), and (c) are divided into four types and recorded on four tracks of the SV floppy. This division method is Y
The signal, C1 signal, and C2 signal are different, and are as shown in Tables 1 to 3.

[0008]

[Table 1]

[0009]

[Table 2]

0010

[Table 3]

[0011] However, n=1, 2, 3, . . . . In the conventional SV system recording format,
FM modulated Y signal (FM-Y) and FM modulated C
A 1/C2 (color difference line sequential) signal (FM-C) is frequency multiplexed and recorded. FIG. 5 shows the frequency allocation of the recording signal in the SV format. Further, in the CHSV system, the YA to YD signals are frequency-multiplexed by FM modulating the C1A to C1D and C2A to C2D signals in combinations shown in Table 4.

0012

[Table 4]

FIG. 6 is a diagram showing a recording pattern when the signals ① to ② in Table 4 above are recorded on the SV floppy. Ru. In the figure, 1H indicates one horizontal period, the track width of each recording track is 60 μm, and the track interval is 40 μm.
It is μm.

When an SV floppy on which video signals are recorded using the CHSV method as described above is played back by a conventional SV playback device, at least field playback is completely compatible. When frame playback is performed on the third track, frame playback compatibility can also be achieved. Furthermore, during CHSV playback, by resampling the sample value strings recorded on the four tracks at the correct sample points, the original sample values can be completely restored. These signals are stored in the memory during playback, and then by interpolating pixels other than the sample points shown in FIG. 4, a still image of about 1000 x 1300 pixels can be played back.

FIG. 7 is a block diagram showing a schematic configuration of the above-mentioned CHSV type electronic camera. In the same figure, 3
01 is an image sensor having a color filter shown in FIG. 8, and this image sensor 301 has R, Y1, Y2, B
The four types of signals shown in FIG. 8 are output, and the pair signals A and B or the pair signals C and D shown in FIG. The output signal of the image sensor 301 is subjected to blanking processing by blanking circuits 302 to 305, and addition circuits 306 and 307 perform HIT (H
A horizontal interval test) pulse is added to the left end of each line as a phase reference signal for resampling during playback. Then, S/H (sample/hold) circuits 308 to 311 clocks Fs1 and Fs2.
sampled and retained. That is, the output signal of the image sensor 301 and the HIT pulse are sampled and held, and this becomes a rectangular sample value signal for performing the analog transmission of the sample value described above. Note that the clocks Fs1 and Fs2 have a phase of 180° with respect to each other.
This corresponds to the one pixel shift in the horizontal direction between the R, Y2 pair and the Y1, B pair shown in FIG.

The sampled signals enter subtraction circuits 312 and 313, where color difference signals R-Y1 and B-
When Y2 is generated, it enters adder circuits 314 and 315, where Csync (synchronization) is applied to luminance signals Y1 and Y2.
A pulse is added. Further, the switches SW1 and SW2 generate color difference line sequential signals from the signals R-Y1 and B-Y2. However, in this case, the switches SW1 and SW2 should not select the same color difference signal.

Next, the processed signals are input to recording signal processing circuits 316 and 317, where they undergo processing such as predetermined emphasis and FM modulation. Although not shown, a pilot signal for TBC (time base correction) during reproduction may be added here (added by frequency multiplexing). The processed signal then enters the switcher 318. This switcher 318 is for realizing the recording pattern shown in FIG. And amplifier 31
9,320, 2ch (channel) head 32
3, the pixel information of A and B on the image sensor 301 in FIG.
It is recorded on two tracks of the floppy 321. Thereafter, the head 323 moves two tracks, and the pixel information C and D in FIG. 8 are recorded on the next two tracks. At this time, the recording tracks of C and D pixel information are switched by the switcher 318 as described above.

[0018]

[Problems to be Solved by the Invention] However, in the above-mentioned still image recording device, as shown in FIG. Therefore, there is a problem in that aliasing distortion occurs in the R and B signals in black and white vertical line parts and horizontal line parts (including edge parts), and image quality deteriorates. This is an optical LPF on the camera side to ensure the resolution of the Y signal.
Therefore, the R and B signals are not sufficiently pre-filtered in the horizontal and vertical directions, and as a result, the color difference signals also include aliasing distortion, further accelerating the deterioration of image quality. be done.

The present invention has been made to address the above-mentioned problems, and it is possible to prevent the occurrence of aliasing distortion in vertical and horizontal line areas in black and white, and to improve image quality significantly. The purpose is to obtain an image recording device.

[0020]

[Means for Solving the Problems] The still image recording device of the present invention photoelectrically converts imaging light to produce two different sample patterns.
An imaging unit that outputs a set of color signals and a luminance signal, two subtraction circuits that generate respective color difference signals from the color signal and luminance signal from the imaging unit, and a subtraction circuit that switches between the two sets of luminance signals and outputs each set of luminance signals. and a switch circuit that supplies the signal to the subtraction circuit, and the switch circuit is configured to switch the luminance signal in accordance with a control signal based on the result of comparing the difference between the two sets of luminance signals with a reference value. be.

[0021]

In the still image recording apparatus of the present invention, two sets of color signals and luminance signals with different sample patterns are outputted from the imaging section, and their color difference signals are calculated by the subtraction circuit. At this time, two sets of luminance signals are switched and supplied to each subtraction circuit. This makes it possible to cancel aliasing components in the vertical and horizontal line portions of a black and white image.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, which is basically the same configuration as FIG. 7. In the same figure, reference numeral 101 is an image sensor having the color filter shown in FIG.
, Y2. 102-10
5 is a blanking circuit that performs blanking processing; 106;
, 107 are adder circuits, and the adder circuits 106 and 107 add the aforementioned HIT pulse to the left end of each line as a phase reference signal for resampling during reproduction only to the luminance signals Y1 and Y2. 108 to 111 are clocks Fs1 and Fs
2 is an S/H circuit that samples and holds the video signal, and 112 and 113 are two subtraction circuits that generate color difference signals R-Ya and B-Yb from the color signal and luminance signal from the image sensor 101. , the respective luminance signals Ya and Yb are supplied via the switch circuit 125. These luminance signals Ya, Yb are luminance signals Y1, Y that are switched by the switch circuit 125 according to a control signal based on the result of comparing the difference between the two sets of luminance signals Y1 and Y2 with a reference value.
2.

114 and 115 are adder circuits that add chrominance signal synchronization pulses to the luminance signals Y1 and Y2; 116 and 117;
is the recording signal processing circuit of the SV system, and switch SW
1. Color difference line sequential signal (C) is input via SW2,
Further, a luminance signal (Y) to which the synchronization pulse is added is input. 118 is a switcher for realizing the recording pattern shown in FIG. 6, 119 and 120 are amplifiers that amplify the recording signal, 121 is an SV floppy that is a magnetic recording medium, 122 is a spindle motor that rotationally drives this SV floppy 121, 123 is a 2ch head for recording pixel information on the SV floppy 121;

The image sensor 101 simultaneously reads out the signals of the pair A and D or the pair C and D shown in FIG. 8, and outputs four signals: color signals R and B and luminance signals Y1 and Y2. These signals are sent to the blanking circuit 10
After the blanking process is performed in steps 2 to 105, the S/H circuit 1
Although sampled by 08 to 111, the luminance signal Y
1 and Y2, the HIT pulse is added as a phase reference signal during reproduction as described above. Further, sampling is performed at the timing of clocks Fs1 and Fs2, but the phases of these clocks Fs1 and Fs2 are shifted by 180°. This is to accommodate the fact that the pair of signals R and Y2 and the pair of signal Y1B shown in FIG. 8 are shifted by one pixel in the horizontal direction. The signals sampled by the S/H circuits 108 to 111 become rectangular sample value signals for analog transmission of the sample values described above.

Further, the subtraction circuits 112 and 113 generate color difference signals from the sampled color signals and luminance signals, but the luminance signals Ya and Yb are supplied from the switch circuit 125, and the color difference signals R-Ya and B- Output Yb. This signal then becomes a color difference line sequential signal through switches SW1 and SW2, and is input to recording signal processing circuits 116 and 117. At this time, the switches SW1 and SW2 are controlled so that the same color difference signals are not selected. Further, the luminance signals Y1 and Y2 from the image sensor 101 are inputted to recording signal processing circuits 116 and 117 after being added with the above-mentioned synchronization pulses in addition circuits 114 and 115.

The signals input to the recording signal processing circuits 116 and 117 undergo processing such as predetermined emphasis and FM modulation, and a TBC pilot signal during reproduction is added by frequency multiplexing. The output signals RF1 and RF2 of the recording signal processing circuits 116 and 117 are sent to the 2ch head 123 via the switcher 118 and amplifiers 119 and 120, and are recorded on the SV floppy 121 being rotated by the motor 122. . At that time, first, the pixel information of A and B on the image sensor 101 shown in FIG. Pixel information of C and D is recorded. As a result, a still image is recorded in the recording pattern shown in FIG.

Here, the subtraction circuit 11 inputs the color difference signals R-Ya and B-Yb to the recording signal processing circuits 116 and 117.
2 and 113 are supplied with the luminance signals Ya and Yb from the switch circuit 125 as described above, and the details of this switch circuit 125 are as shown in FIG. In FIG. 2, SW5 is a switch that selects either the input signal Y1 or Y2 and outputs it as a luminance signal Ya to the subtraction circuits 112 and 113, and SW6 also selects either the signal Y1 or Y2, This is a switch that outputs a luminance signal Yb. And these switches SW5
, SW6 do not select the same signal, and when the control signal S is "High" (high level), the switch SW5
selects signal Y1, switch SW6 selects signal Y2, and when control signal S is “Low” (low level),
Switch SW5 receives signal Y2, and switch SW6 receives signal Y.
Select 1 for each.

Next, how to generate the control signal S will be described. Signals Y1 and Y2 from the image sensor 101 are input to a subtraction circuit 1001, where the difference (Y1-Y2
) is calculated. This (Y1, Y2) signal is compared with predetermined reference values -Vref and Vref by comparators 1002 and 1003. The outputs of both comparators 1002 and 1003 are then outputted by an OR circuit 1004.
By taking the R condition, the above control signal S can be obtained. At that time, when -Vref<(Y1-Y2)<Vref, the control signal S becomes "Low", and at other times, the control signal S
becomes “High”. This means that when the difference between the signals Y1 and Y2 exceeds the reference value Vref, the control signal S is set to “High”.
h” signal, and the difference between the signals Y1 and Y2 is the reference value Vref.
When it is smaller, the control signal S is set to "Low".

As a result of the above operations, for example, in the case of horizontal stripes in a monochrome image as shown in FIG. 9, Ya=Y1 and Yb=Y2 are selected as the luminance signals Ya and Yb, respectively, and In the case of vertical stripes in the image, the brightness signal Ya
, Yb are selected as Ya=Y2 and Yb=Y1, respectively. Therefore, in both the images in FIGS. 9 and 10, the calculation results in the subtraction circuits 112 and 113 are (R-Ya)
= 0, (B-Yb) = 0, and the color difference signal = 0. Therefore, in the case of a black and white image, the aliasing distortion of the color difference signal, whether in the vertical line portion or the horizontal line portion, is canceled by subtraction to create the color difference signal.

That is, for the four signals R, B, Y1, Y2 from the image sensor 101, one subtraction circuit 1
12, when (R-Y1) is being calculated, the other subtraction circuit 113 is calculating (B-Y2), and conversely, the subtraction circuit 11 is calculating (B-Y2).
2, when (R-Y2) is being calculated, the subtraction circuit 113
(B-Y1) is calculated, and this is controlled by the switch circuit 125. Therefore, as described above, the aliasing component of the color difference component can be canceled at the stage of generating the color difference signal, and the occurrence of aliasing distortion in black and white vertical and horizontal line parts (including edge parts) can be prevented. , it is possible to significantly improve image quality.

In the circuit shown in FIG. 2, the control signal S may be obtained by comparing the absolute value of the difference between the signals Y1 and Y2 (|Y1-Y2|) with the reference value Vref. Further, in the above embodiment, the reference values Vref and -Vref are fixed, but they may be adaptively varied by some means.

[0032]

As described above, according to the present invention, since the two sets of luminance signals output from the imaging section are switched and supplied to the subtraction circuit that generates the color difference signal,
It is possible to cancel aliasing components at vertical and horizontal line areas, including the edges of black and white images, at the stage of generating color difference signals, preventing aliasing distortion at vertical and horizontal line areas in black and white images, significantly improving image quality. This has the effect of improving the

[Brief explanation of drawings]

[Fig. 1] Block diagram showing the configuration of an embodiment of the present invention

[Figure 2] Block diagram showing details of the switch circuit in Figure 1

[
Figure 3: Conceptual diagram of analog transmission of sample values

[Figure 4]
Explanatory diagram showing sample patterns of luminance signals and color signals

[Figure 5] Explanatory diagram showing frequency allocation of recording signals in SV format

[Figure 6] Explanatory diagram showing the recording pattern of CHSV method

[Figure 7] Block diagram showing the schematic configuration of a CHSV type electronic camera

[Figure 8] Explanatory diagram showing the configuration of the color filter of the image sensor

[Figure 9] Explanatory diagram showing an example of a black-and-white image

[Figure 10]
Explanatory diagram showing an example of a dark-skinned image

[Explanation of symbols]

101 Image sensor (imaging unit) 112 Subtraction circuit 113 Subtraction circuit 116 Recording signal processing circuit 117 Recording signal processing circuit 121 SV floppy 125 Switch circuit

Claims (2)

[Claims] 1. An imaging unit that photoelectrically converts imaging light and outputs two sets of color signals and luminance signals with different sample patterns;
It is characterized by comprising two systems of subtraction circuits that generate respective color difference signals from the color signal and luminance signal from the imaging unit, and a switch circuit that switches between the two sets of luminance signals and supplies them to each subtraction circuit. Still image recording device. 2. The still image recording apparatus according to claim 1, wherein the switch circuit switches the luminance signal according to a control signal based on a result of comparing a difference between two sets of luminance signals with a reference value.