JPH0433143B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to an improvement of a two-story solid-state image pickup device in which a photoconductive thin film is laminated on top of a semiconductor substrate in which a scanning device and a group of switching devices are integrated.

[Prior art]

Solid-state imaging devices require an imaging plate with a resolution comparable to that of the imaging electron tubes used in current television broadcasting. A pixel matrix in which pixels (elements) are arranged and a scanning element corresponding to the pixel matrix are required. Two types of solid-state imaging devices have been considered so far: CCD type and MOS type (devices that use the source junction of a MOS switch as a photodiode). All of these devices have the advantage that they can be manufactured using highly integrated MOS process technology. However, since the photosensitive section is located under the electrode (in the case of CCD type) or on the same plane as the scanning switch and signal output line (in the case of MOS type), there are areas where the incidence of light is blocked by the electrode and switch section. The disadvantage is that there is a large amount of light loss, that is, there is a large optical loss. Furthermore, since the photosensitive section and the scanning section are on the same plane as described above, the area occupied by the picture element becomes large. That is, there is a problem in that the resolution cannot be increased because the degree of integration of picture elements cannot be increased.

As a structure to solve these problems (photosensitivity, resolution), we have applied for a two-story solid-state image pickup device in which a photoelectric conversion film for photosensing is laminated on top of a substrate on which a scanning switch and the like are integrated.

The above-mentioned CCD type and MOS type can be considered as the bases constituting the substrate of this type of image sensor. Recently, a two-story image sensor using a CCD type scanning substrate has been reported (T. Teruietal., “A CCD
Imager UsingZnSe−Zn ₁ −x
CdxTeHeterojunction Photocorductor，
JapaneseJ.Appl Phys., vol.21, pp.237−242,
(1982). ) The configuration and structure of this device are shown in FIG. 1st
In Figure a, 1 is a pixel electrode that determines the dimensions of the pixel; 2 and 3 are a vertical CCD shift register and a horizontal CCD shift register ( (hereinafter simply referred to as vertical and horizontal CCD). 5,
6 is a clock pulse generator that produces clock pulses for driving the vertical CCD and horizontal CCD. Although a two-phase clock pulse generator is shown here, either a four-phase or three-phase clock configuration may be adopted. In addition, 7 is a transfer gate that sends the charge accumulated in the picture element electrode to the vertical CCD, and 8
and 9 indicate the charge transfer direction in the vertical CCD and horizontal CCD, respectively. The structure of the above device is shown in FIG. 1b. The picture element electrode 1 is connected to a diffusion layer 11 (composed of impurity atoms different from the substrate 12) via a contact hole 10. 2-1, 2-
2 is an electrode that constitutes the vertical CCD (generally polycrystalline silicon is used); 2-3 is a diffusion layer that makes the vertical CCD a buried type (composed of the same impurity atoms as the diffusion layer 11, but at a lower concentration) , 13 is vertical
An oxide film (generally
_Furthermore , 14 is a photoconductive film, and 15 is a transparent electrode (for example, Indium TinOxide) that applies a target voltage to form an electric field 16 to the photoconductive film 14.
It is. In its current form, this element becomes a monochrome image sensor, and when a color filter is laminated on top, each photodiode is provided with color information, making it a color image sensor.

This double-decker image sensor has the excellent advantages of higher pixel integration than conventional image sensors, and low noise (i.e., high sensitivity) because it uses a CCD shift register for scanning. . However, the number of picture elements is still 500 (vertical direction) x 400
(in the horizontal direction), and the resolution is still half of the required specification. Also, due to the configuration constraints of the vertical shift register, interlacing requires a method in which odd columns (solid arrow 7-1) are read out in the first field and even columns (pointed arrow 7-2) are read out in the second field. As a result, there are problems caused by the interlace method, such as 50% of the charge accumulated in the previous field remaining (afterimage) and low color resolution. Therefore, the applications are limited to a few, such as home VTR cameras, and in order to develop a wide range of applications that take advantage of the advantages of solid-state devices in the future, it is necessary to improve the above-mentioned problems such as resolution. There is an urgent need to address this issue.

[Object of the present invention]

An object of the present invention is to solve the above-mentioned problems, that is, to improve the resolution of a two-story solid-state image sensor by devising the device configuration without relying on miniaturization technology for MOS integrated circuits.

[Summary of the invention]

In order to achieve the above-mentioned object, the present invention has a structure of a substrate used for scanning of a two-story image sensor, in which two series of pixel electrodes are periodically arranged horizontally shifted by 1/2 pixel size for each row. and separate (two series) vertical lines that transfer the optical signal charges accumulated in each series of pixel electrodes.
By changing the system so that the data is distributed to the CCD and transferred, the resolution can be effectively improved.

[Embodiments of the invention]

Hereinafter, the present invention will be explained in detail using examples. FIG. 2 is a diagram showing the basic configuration of the two-story CCD image pickup device of the present invention. 1-a and 1-
b is a picture element electrode group, and the second group 1-b is the first
The pixels are arranged horizontally shifted from the group 1-a by half the pixel size. 2-a and 2-b are first electrodes arranged on both sides of the electrically insulating separation strip 17.
and a second vertical CCD group. Insulation separation strip 1
7 is constituted by, for example, a thick oxide film 13 and an impurity atomic layer 17' having the same type as the substrate and having a high concentration.
Further, 17'' is an impurity atomic layer (same type as the substrate) for pixel separation, and the concentration is usually the same as that of 17' and is formed in the same process as 17'. Electrode group 1
-a is the diffusion layer 11- by the contact hole 10-a.
a, and electrode group 1-b is connected to contact hole 10.
-b is connected to the diffusion layer 11-b. The optical signal charges accumulated in the electrode group 1-a are transferred to the transfer gate 7-
a to the vertical CCD group 2-a through the electrode group 1-b.
The charges accumulated in are sent to the vertical CCD group 2-b via the transfer gate 7-b. The signal charge of each electrode group is carried sequentially within the vertical CCD group, and then
Sent to 3. The charge on electrode group 1-a is horizontal
It is sent to the electrode 3'-a one stage before the CCD,
The charges on the electrode group 1-b are sent to the subsequent electrode 3'-b. Each signal charge is sequentially carried within the horizontal CCD towards the output amplifier 4. Here, horizontal CCD
Of the three electrodes 3'-a, 3'-b, and 3'-c constituting the circuit, charges are carried using two adjacent electrodes 3'-a and 3'-b. (1 of 3 electrodes
Compared to the general transfer method using electrodes,
The above transfer method is hereinafter referred to as double transfer).
Furthermore, φ _H1 , φ _H2 , and φ _H3 are horizontal clock pulses that drive the three electrodes.

FIG. 3 is a diagram showing an example of the structure of the image sensor of the present invention shown in FIG. 2. In the same figure, a shows the element structure shown in the a-a' section in FIG. 2, and b shows the element structure in the b-b' section.
CCD2-a and 2-b are shown. 2-3a and 2-3b in Figure 3 are vertical CCDs
This is a diffusion layer that constitutes 2'-a and 2'-b.
Here, electrodes 1-a and 1-b are shifted from each other by half (d/2) of the size of one pixel, where d is the size of one pixel (the pitch interval between electrodes 1-a and 1-b). are arranged. When a high voltage ("1" level in FIG. 5) is applied to the electrode 2-1, the optical signal accumulated on the electrode 1-a or 1-b is transferred to the vertical CCD 2 via the transfer gate 7'-a or 7-b. ′−
a or 2'-b (arrow 20-
a, 20-b).

FIG. 4 shows the clock pulses and their timings for driving the vertical shift register in the image pickup device of the present invention shown in FIG. This pulse consists of three levels: "1", "M", and "0", and the "1" level (highest voltage) is at the transfer gate 7.
(7') is shown in an open state (a state in which the charges of the electrode groups 1-a and 1-b can be sent to the vertical shift register). "M" level (intermediate voltage) is vertical CCD2
-a, 2-b is the voltage that drives the vertical CCD
“1” is placed on the CCD electrodes 2-1 and 2-2 that constitute the
By alternately applying "0" (for example, ground voltage), signal charges are sequentially transferred within the vertical CCD toward the horizontal CCD (downward). Here, “1”
level and the following “M” level are contained within the vertical blanking period (T _BL ) in any pulse, but in the first field, the clock pulse φ _V1
The “1” level of φ _V2 is outputted a predetermined time (t _d ′−t _d ) earlier than the “1” level of φ V2, and conversely, in the second field, the “1” level of φ _V2 is outputted earlier than the “1” level of φ _V1 . “It is output faster than the level. In this way, by applying a pulse in which both φ _V1 and φ _V2 are at the “1” level in each field and whose output time is inverted for each field to the image sensor of the present invention, one column is generated for each field. Shifted two rows of electrode groups 1-
It becomes possible to read out the signal charges of a and 1-b. That is, in the first field, for example, the n-1st column (electrode group 1-a) is selected by pulse φ _V1 , the n-th column electrode group 1-b is selected by φ _V2 , and the vertical CCD
The signal charges of each column fed into the
In the second field, under the n-th column of CCD electrodes constituting CCD2-a and 2-b, the n-th column (electrode group 1-b) is formed by φ _V2 , and the electrode group 1- of the n+1 column is formed by φ _V1 . a is selected, vertical CCD2-a, 2-b
The signal is transferred to the bottom of the CCD electrode of the n+1th column. In this way, the signals of adjacent columns arranged in the same column are transferred within each vertical register at the same time, and finally transferred to the horizontal shift register 3. When transferring the signal charges in each column to the horizontal shift register, for example, the signal charges in the n-1st column (or nth column) are one step earlier (more than Since the signal charges are transferred to the output 4 (in the order of n-1 and n columns in the first field, and in the order of n and n+1 columns in the second field), signal charges can be extracted from the output 4. In this way, signals in adjacent columns are transferred at the same time in the vertical CCD, but are transferred in the horizontal CCD with a time lag of a predetermined time (determined by the drive frequency per horizontal CCD stage). (meaning multiple transfer) makes signal processing (separation of signals in adjacent columns) extremely simple. This can be done in exactly the same form as the conventional one-column readout type element shown in FIG.

As a result, in the image sensor of the present invention, the signals of the electrode groups 1-a and 1-b, which are arranged spatially shifted by 1/2 pixel in the horizontal direction for each column, are transmitted in two vertically adjacent columns. are read out as a set, and resolution can be improved both horizontally and vertically (up and down). When the inventor calculated the resolution of an image sensor configured as in the present invention, it was found that a resolution approximately 1.8 times higher than that of an element with a conventional configuration can be obtained. The number of picture elements (the number of picture element electrodes) remains the same as the conventional element, and the improvement in resolution can be achieved by changing the arrangement of the picture element electrodes as described above. This is due to the constraints of the element manufacturing technology and the degree of picture element integration. This is of great practical value for current solid-state imaging devices, which have an upper limit.

FIG. 5 shows an embodiment in which the direction of the transfer gate for sending the optical signal charges accumulated in the electrode groups 1-a and 1-b to the vertical CCD is different from that in FIG. 2. The charges of the electrode group 1-a are transferred to the vertical CCD 2- through the transfer gates 7-b and 7-a having different directions.
The charges of the electrode group 1-b are transferred to the vertical CCD 2 through the opposing transfer gates 7-a and 7-b.
-a, 2-b. In this embodiment, the operation of transferring charges from the vertical CCD to the horizontal CCD is the same as in the embodiment shown in FIG. 2, which was explained using FIG. 4.

In FIGS. 2 and 5, electrode groups 1-a, 1
Vertical CCD 2-a, which transfers the optical signal charge of −b,
2-b are arranged to face each other with the insulating separation band 17 in between. FIG. 6 shows an embodiment of a structure in which vertical CCDs for transferring signal charges of electrode groups 1-a and 1-b are arranged separately one by one. 18-a is a vertical CCD that transfers the signal charge of electrode group 1-a;
b is a vertical line that transfers the signal charge of electrode group 1-b.
It is a CCD. Further, 19 is a horizontal CCD. Here, an example is shown in which two series of horizontal CCDs 19-a and 19-b are provided in correspondence with the transfer of charges carried by each of the vertical CCDs 18-a and 18-b (of course, the horizontal CCDs are the second As in the case of fig.
It is also possible to perform double transfer operation using a 3-phase CCD). Here, the horizontal CCD is driven by two-phase clock pulses φ _H1 and φ _H2 (if the number of wiring lines is not concerned, it may be driven by four-phase clock pulses).
4-a and 4-b are output amplifiers provided for each horizontal CCD.

FIG. 7 is a diagram showing the structure of the image sensor shown in FIG. 6. Figure a is the image sensor shown in Figure 6.
a' section, and b is the bb' section. 1-a, 1-b
is a group of picture element electrodes, areas 18'-a and 18'-b are vertical
CCD18-a and 18-b are shown. here,
The electrodes 1-a and 1-b are arranged offset from each other by half (d/2) of the size of one picture element, as in the case of FIG. The optical signal charge transfer operation of the electrode group in this device is exactly the same as that in the image sensor shown in FIG.

In the previous embodiments, we have described a configuration in which the picture element electrode groups are horizontally shifted by 1/2 picture element for each vertically adjacent column. 1/n of each other according to
(n: 3, 4,...) picture elements or m/n picture elements (m: 1, 2, 3, 4,...where m≠n, m<n)
You can shift it. Figure 8 shows the pixel electrode groups being 1/1/1 of each other.
This shows the configuration of elements arranged with a shift of three picture elements.

Although the above description has been made with reference to a monochrome image pickup device to avoid loss of generality, the configuration and operation of a color device are exactly the same as those of the image pickup device described above. As an example, FIG. 9 shows the element configuration in which a complementary color filter is employed in the element having the configuration shown in FIG. 2, and the color correspondence. For example, the electrode group 1-a series has a cyan filter C, white filter W, and yellow filter Y in order from left to right, and the electrode group 1-b series has a yellow filter, which corresponds to shifting the front row by 1/2 pixel. , cyan filter, and white filter are assigned.

As described above using the embodiments, the two-story image sensor of the present invention has two series of vertical CCDs.
and two series of pixel electrode groups arranged in pairs at every other row, both series are arranged with m/n, preferably 1/2 pixel offset from each other, and each of the electrode series is distributed to each of the shift registers. The resolution can be improved approximately twice by making the optical signal charges correspond to each other and reading out the optical signal charges accumulated in each electrode using an interlace method in which two columns are simultaneously selected. In addition, conventional CCD
By changing the one-column selection interlacing used on the scanning board to two-column selection, it is possible to prevent afterimages, prevent color mixture, and simplify the signal processing circuit, which makes it possible to put the present invention into practical use. The value is extremely high.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the basic configuration of a conventional CCD type two-story solid-state image sensor, FIG. 2 is a diagram showing the configuration of a CCD type two-story image sensor of the present invention, and FIG. Diagram 4 showing the structure of the image sensor of the invention
The figure shows a pulse time chart for driving the image sensor of the present invention shown in FIG.
The figure shows an example in which the configuration of the vertical CCD shift register is different from that in Figure 2, Figures 6 and 8.
The figure shows a vertical CCD and a horizontal CCD that are different from figures 2 and 5.
7 is a diagram showing the structure of the element shown in FIG. 6, and FIG. 9 is a diagram showing the configuration of the color CCD type two-story image sensor of the present invention in which color filters are laminated. be. 1... Pixel electrode, 2, 18... Vertical CCD shift register, 3, 19... Horizontal CCD shift register, 4... Output amplifier, 5... Vertical clock pulse generator, 6... Horizontal clock pulse generator,
7...Transfer gate, 10...Contact hole, 11
... Diffusion layer, 12 ... Substrate, 13 ... Insulating oxide film, 14 ... Photoconductive film, 15 ... Transparent electrode, 1
7...Insulating separation band.

Claims (1)

[Claims] 1. In a stacked CCD solid-state image sensor in which a photoconductive film that plays the role of photoelectric conversion is stacked in a two-story pattern on a semiconductor substrate that integrates a plurality of vertical CCD shift registers and horizontal CCD shift registers,
By arranging a matrix of picture element electrodes forming one picture element every other row in the vertical scanning direction, two series of picture element electrode groups are provided, and one series of picture element electrode groups is connected to the other series of picture element electrodes. m/n of the horizontal arrangement pitch of the picture element electrodes for the electrode group (where m is an integer of 1 or more, n is an integer of 2 or more, m<n, m≠n)
The vertical CCD shift registers are arranged such that they are shifted from each other, and the optical signal charges accumulated in the picture element electrode group of the first series are assigned to the first series.
The optical signal charge accumulated in the picture element electrode group of the second series is transferred towards the horizontal CCD shift register by the vertical CCD shift register assigned to the second series. , and a stacked type, characterized in that the accumulated optical signal charges of the picture element electrodes in one set of two rows adjacent to each other in the vertical scanning direction are simultaneously read out for each field.
CCD solid-state image sensor.