JPH0433145U - - Google Patents
Info
- Publication number
- JPH0433145U JPH0433145U JP7408190U JP7408190U JPH0433145U JP H0433145 U JPH0433145 U JP H0433145U JP 7408190 U JP7408190 U JP 7408190U JP 7408190 U JP7408190 U JP 7408190U JP H0433145 U JPH0433145 U JP H0433145U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- wdt
- watchdog timer
- time
- trigger signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010365 information processing Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 239000013256 coordination polymer Substances 0.000 description 1
Landscapes
- Debugging And Monitoring (AREA)
Description
第１図はこの考案の一実施例によるＷＤＴエラ
ー発出回路のブロツク図、第２図、第３図は、こ
の考案の効果を示すためのタイミングチヤート、
第４図は従来例を示すブロツク図である。第５図
は説明文中にて用いたＷＤＴ回路図、パルス発生
器の構成図、第６図は従来例の動作を示すための
タイミングチヤートである。図において１はＣＰ
Ｕ（中央処理装置）、２はＷＤＴ回路、３は警報
表示、処理回路、４はパルス発生器、５は論理Ｏ
Ｒゲートである。なお、図中、同一符号は同一、
又は相当部分を示す。
FIG. 1 is a block diagram of a WDT error generation circuit according to an embodiment of this invention, and FIGS. 2 and 3 are timing charts showing the effects of this invention.
FIG. 4 is a block diagram showing a conventional example. FIG. 5 is a WDT circuit diagram and a configuration diagram of a pulse generator used in the explanatory text, and FIG. 6 is a timing chart showing the operation of a conventional example. In the figure, 1 is CP
U (central processing unit), 2 is WDT circuit, 3 is alarm display, processing circuit, 4 is pulse generator, 5 is logic O
This is the R gate. In addition, in the figure, the same reference numerals are the same,
or a corresponding portion.
Claims (1)
ツチドツグタイマ回路と、前記ＷＤＴ回路におい
てＷＤＴエラー検出時に出力されるタイムアツプ
信号をトリガ信号として、トリガ信号入力時より
一定時間のパルスを出力するパルス発生器とを備
えたことを特徴とするウオツチドツグタイマエラ
ー発出回路。 In an information processing device equipped with a CPU, a watchdog timer circuit and a pulse generator that uses a time-up signal outputted when a WDT error is detected in the WDT circuit as a trigger signal and outputs a pulse for a certain period of time from when the trigger signal is input. A watchdog timer error generation circuit comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7408190U JPH0433145U (en) | 1990-07-10 | 1990-07-10 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7408190U JPH0433145U (en) | 1990-07-10 | 1990-07-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0433145U true JPH0433145U (en) | 1992-03-18 |
Family
ID=31613464
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7408190U Pending JPH0433145U (en) | 1990-07-10 | 1990-07-10 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0433145U (en) |
-
1990
- 1990-07-10 JP JP7408190U patent/JPH0433145U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS58108724U (en) | Digital protective relay device | |
| JPH0218149U (en) | ||
| JPS60116537U (en) | Electronic computer program plagiarism prevention device | |
| JPS63130839U (en) | ||
| JPH0358741U (en) | ||
| JPS6439536U (en) | ||
| JPS59168175U (en) | Obstacle detection alarm device | |
| JPH0428351U (en) | ||
| JPH0242132U (en) | ||
| JPH0232155U (en) | ||
| JPS5866445U (en) | Alarm generation circuit | |
| JPH01175340U (en) | ||
| JPS60649U (en) | Multi-CPU system synchronization device | |
| JPS6347641U (en) | ||
| JPS6010391U (en) | Alarm | |
| JPS5866485U (en) | Alarm generation circuit | |
| JPS63199308U (en) | ||
| JPS6261544U (en) | ||
| JPS6421451U (en) | ||
| JPS591141U (en) | Tape running display circuit | |
| JPS635535U (en) | ||
| JPH0414499U (en) | ||
| JPH0467751U (en) | ||
| JPH01173854U (en) | ||
| JPS62118290U (en) |