JPH04342375A - Contour correction circuit - Google Patents

Abstract

PURPOSE:To easily execute optimum contour correction without lowering an S/N even to the source signal of a low APL by respectively automatically controlling the contour correcting amounts on the positive level side and the negative level side corresponding to the amplitude of the source signal and the change of the APL. CONSTITUTION:Delay means 2A and 2D are provided to delay the source signal, a delay means 2B is provided to delay the output signal of the 2A, a delay means 2C is provided to delay the output signal of the 2B, a subtraction circuit is provided to form a signal D or E by subtracting the respective output signals from the 2A, 2B and 2C, arithmetic circuits 5 and 6 are provided to form a contour correcting signal F or G according to those signals D and E, and an arithmetic circuit 7 is provided to control the level of the signal G corresponding to the APL. Then, the contour of the source signal is corrected by controlling the levels of the signals F and G and adding the result to the signal obtd. by controlling the level of the signal B.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a contour correction circuit for correcting the contour of a video signal to improve the sharpness, definition, etc. of an image in, for example, a television receiver.

0002

[Prior Art] A conventional contour correction circuit is
As described in Japanese Patent No. 6582, the amount of preshoot and overshoot was changed independently to create a contour correction signal. On the other hand, no consideration is given to changing the contour correction amount on the positive level side and the contour correction amount on the negative level side, respectively.

0003

[Problem to be solved by the invention] In the above conventional technology,
For an original signal with a low APL, if the amount of preshoot and overshoot is large, the amplified noise component becomes noticeable and the S/N ratio decreases. Therefore, a method to improve this problem is to reduce the amount of contour correction on the positive level side. However, in order to do this, it is necessary to adjust and reduce both the amount of preshoot and overshoot, and in this case, there is a problem that the amount of contour correction on the negative level side is also reduced along with the amount of contour correction on the positive level side. be. In addition, the appropriate amount of correction varies depending on the amplitude and APL of the original signal,
There is also the problem that adjustments must be made manually one by one.

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, it is an object of the present invention to adjust the contour correction amount on the positive level side and the contour correction amount on the negative level side in response to changes in the amplitude and APL of the original signal. By automatic adjustment, it is possible to perform easy and optimal contour correction without reducing the S/N ratio even for an original signal with a low APL, and to realize high quality images.

[0005]

[Means for Solving the Problems] The contour correction circuit of the present invention includes first and fourth delay means for delaying an original signal, and a second delay means for delaying an output signal of the first delay means. , a third delay means for delaying the output signal of the second delay means, and first and second contour correction by subtracting the respective output signals from the first, second and third delay means. first and second subtraction circuits forming signals;
The first and second arithmetic circuits form third and fourth contour correction signals from the second contour correction signal, and the third contour correction signal from the level of the output signal from the first delay means. APL (Average Pic
a third arithmetic circuit that determines the level of the fourth contour correction signal based on the fourth contour correction signal;
, creating a fifth contour correction signal obtained by adding signals obtained by automatically adjusting the levels of each of the fourth contour correction signals, and outputting the fifth contour correction signal and the second delay means. The present invention is characterized in that signals obtained by adjusting the signal levels are added.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a contour correction circuit according to the present invention, in which an original signal X consisting of a luminance signal Y or color difference signals Pb, Pr, etc. is input to an input terminal 1 as an input signal. This original signal
The delay signal B output from the second delay circuit 2B is supplied to the third delay circuit 2C and the first arithmetic circuit 7', respectively. subtraction circuit 3 and second subtraction circuit 4, respectively. Note that the delay time of the first delay circuit 2A is τ1, the delay time of the fourth delay circuit 2D is τ2, and the delay time of both the second delay circuit 2B and the third delay circuit 2C is τ.

Further, the first subtraction circuit 3 calculates the difference between the delayed signal A and the delayed signal B and obtains a first contour correction signal D=B-A.
and supplies the first contour correction signal D to the first arithmetic circuit 5 and the second arithmetic circuit 6, respectively. Further, the second subtraction circuit 4 takes the difference between the delayed signal B and the delayed signal C, creates a second contour correction signal E=B−C, and converts the second contour correction signal E into the first contour correction signal E. The signal is supplied to the arithmetic circuit 5 and the second arithmetic circuit 6, respectively.

FIG. 2 is a timing chart of the circuit shown in FIG. 1. Assuming that the delayed signal A is a square wave as shown in FIG. 2(b) to FIG. 2(e). Further, the first arithmetic circuit 5 obtains a third contour correction signal F shown in FIG. The second arithmetic circuit 6 obtains the fourth contour correction signal G shown in FIG. 2(g) and supplies it to the third multiplication circuit 8C.

Further, the first multiplier circuit 8A supplies the signal K1*F obtained by multiplying the signal F by the coefficient K1 to one input terminal of the adder circuit 9, and supplies the signal K1*F obtained by multiplying the signal F by the coefficient K1 to one input terminal of the adder circuit 9. is supplied with a signal K3*G obtained by multiplying the signal G by a coefficient K3 from the third multiplication circuit 8C. Here, the coefficient K1 of the first multiplier circuit 8A is the delay signal A shown in FIG. 3(a).
is given by the fourth arithmetic circuit 7' as a function of the amplitude ε. For example, the relationship between the coefficient K1 and the amplitude ε may be set linearly as shown by the straight line 12 in FIG. 3(b), or the relationship between the coefficient K1 and the amplitude ε as shown in the curve 13 may be given so that it is nonlinear. Of course, straight line ■14
The coefficient K1 may be constant with respect to the amplitude ε, as shown in FIG. In this way, the fourth arithmetic circuit 7' determines the coefficient K1 from the amplitude ε of the delayed signal A, and sets the value of this coefficient K1 to the first
is supplied to the multiplication circuit 8A and the third arithmetic circuit 7. On the other hand, the coefficient K3 of the third multiplier circuit 8C is set to the third multiplier according to the APL of the delay signal A' output from the fourth delay circuit 2D.
is given by the arithmetic circuit 7 as follows. First, FIG. 4 is an example of the circuit configuration of the third arithmetic circuit 7 shown in FIG. AP for a signal that is a certain period of time T before signal A
The value σ18 of L is calculated and this σ18 is supplied to the K3/K1 calculation circuit 16. Here, the APL calculation circuit 15 is 1
If we calculate σ18 from the line signal, T=τ
2 + 1H - τ1. For example, if τ1 = 0, τ2 = 0, then T = 1H, and the APL can be calculated for the signal one line before the delayed signal A, and τ1 = 0,
If τ2=524H, T=525H, and APL can be calculated for the signal one frame before the delayed signal A. Furthermore, the K3/K1 calculation circuit 16 calculates σ18
The value κ19 of K3/K1 is calculated according to the value of . For example, when the value of σ18 is small, as in curve ■20 in Figure 5,
In other words, when the APL of the delayed signal A' is low, K3/K
1<1.0, that is, the coefficient K3 is set smaller than the coefficient K1, and when the value of σ18 is greater than a certain value σ0, K3/
Set K1=1.0, that is, K3=K1. Furthermore, the K3/K1 calculation circuit 16 calculates the value κ19 of K3/K1.
is supplied to one input terminal of the K3 calculation circuit 17, and the K
A fourth calculation circuit 7 is connected to the other input terminal of the third calculation circuit 17.
' provides the value of the coefficient K1. The K3 calculation circuit 17 obtains the coefficient K3 by multiplying κ19 by the coefficient K1. In the above manner, the third arithmetic circuit 7 obtains the coefficient K3 corresponding to the APL of the delayed signal A', and
is supplied to the multiplication circuit 8C.

Next, the addition circuit 9 creates a fifth contour correction signal W=K1 *F+K3 *G shown in FIG. 2(h), supplies it to one input terminal of the addition circuit 10, and performs the addition. The other input terminal of the circuit 10 receives a signal K2 *B obtained by multiplying the delayed signal B by a coefficient K2 from the second multiplier circuit 8B.
is supplied. This adder circuit 10 adds the fifth contour correction signal W and the signal K2*B to create an output signal Z, and supplies this output signal Z to an output terminal 11. The output signal Z is shown in FIG. 2(i) and is given by the following equation.

0012

[Math. 1] Z=K2*B+W=K2*B+K1*F+K3*G 1st
An example of the simplest circuit for realizing the arithmetic circuit 5 is a minimum value circuit that compares the levels of two input signals and gives the minimum value as the output signal.
An example of the simplest circuit for realizing this is a maximum value circuit that compares the levels of two input signals and provides the maximum value as an output signal.

In the fifth contour correction signal W, the coefficient K1 of the first multiplier circuit 8A and the coefficient K of the third multiplier circuit 8C
3 are different, the amount on the positive level side and the amount on the negative level side of the fifth contour correction signal W become different, as shown in FIG. 2(h). Therefore, the amount of correction on the positive level side and the amount of correction on the negative level side of the finally obtained output signal Z are different.

As described above, according to the present example, the coefficient K1 of the first multiplier circuit 8A and the coefficient K3 of the third multiplier circuit 8C are adjusted according to the amplitude and APL of the original signal, and the output signal Z is adjusted. This has the advantage that the correction amount on the positive level side and the correction amount on the negative level side can be set to optimal values, and more optimal image quality can be obtained. In particular, as shown in Fig. 6(a), APL
When input signal A1 containing low noise component 23 is supplied to input terminal 1, the conventional contour correction method produces
) is applied to the output terminal 11. Note that the white level 21 and black level 22 are shown in FIG. 6(a).
Shown below. In this case, the noise component 23 is amplified together with the contour component of the input signal A1. This amplified noise component 26 lowers the S/N ratio, resulting in image quality that gives a rough and grainy feel. In order to improve this, it is sufficient to reduce the amount of contour correction on the positive level side. However, in order to do this, it is necessary to adjust and reduce both the amount of preshoot 24 and overshoot 25, which has the disadvantage that the amount of contour correction on the negative level side is also reduced along with the amount of contour correction on the positive level side. There is.

On the other hand, in this example, the coefficient K1 can be set according to the amplitude ε of the delayed signal A as shown in FIG. 3(b), and the coefficient K3 can be set as the coefficient K1 according to the APL as shown in FIG. It can be set below the value of . Furthermore, if the coefficient K1 is set to be constant with respect to the amplitude ε, then
APL without reducing the contour correction amount on the negative level side.
It is also possible to reduce only the contour correction amount on the positive level side in accordance with . Therefore, by changing the values of coefficient K1 and coefficient K3 in accordance with changes in the amplitude and APL of the original signal, the contour correction amount on the positive level side and the contour correction amount on the negative level side are automatically adjusted, and the S/ Optimal image quality can be obtained with minimal reduction in N ratio.

Furthermore, there are the following advantages when the output signal obtained in this example is used as an input signal to be applied to a liquid crystal display element via a signal processing circuit. For example, on the LCD panel,
Considering the area A27 and the area B28 and the pixels a to h as assumed in (a), it is assumed that at time t=t0, a voltage v0 is applied to each pixel as shown in FIG. 7(b). Furthermore, assume that time has elapsed by Δt and at time t=t1, the voltage applied to each pixel changes as shown in FIG. 7(c). That is, assume that during Δt, the applied voltage in region A27 decreases to v1 and becomes dark, and conversely, in region B28, the applied voltage increases to v2 and becomes bright. Here, we pay particular attention to pixel c, and assume that the light transmittance of pixel c increases by α due to the increase in applied voltage.The time change in this light transmittance is shown by the locus 29 in FIG. 7(e). The slope of this locus 29 determines the response speed of the liquid crystal pixels, which is considerably slower than that of a CRT. As a result, the response speed of pixel c and pixel f corresponding to the outline part of area B28 is slow like other pixels d and e of area B28, resulting in problems such as a decrease in image sharpness and definition. arise.

[0017] In order to solve such problems, FIG.
The contour part is corrected by the contour correction circuit shown in , and the voltage applied to each pixel is improved as shown in FIG.
A voltage v2' is applied to the pixel b, and a voltage v1' is applied to the pixel b. Here, assuming that the light transmittance of pixel c increases by β, the change in light transmittance over time is shown by the locus 30 in FIG. 7(e). In this way, by correcting the contour to make β>α, β/Δt>α/Δt, so this circuit can increase the response speed of the liquid crystal display element. the result,
It can increase the response speed of pixels to signal voltages and improve the sharpness and definition of images.

Finally, in the present invention, the delay means 2B and 2
Horizontal contour correction can be realized by setting the delay time τ of C to a sufficiently small value, for example, about several tens of ns.
If the delay time is set to about 1H, contour correction in the vertical direction can be realized.

The embodiments including the advantages of the present invention have been described above while also citing the disadvantages of the conventional art, but the present invention is not limited to the above-mentioned embodiments, and modifications may be made without departing from the gist of the present invention. Of course you can. For example, the present invention may be configured with an analog circuit or a digital circuit, and it goes without saying that methods of setting the coefficients of the multiplier circuit may be other than those of the above-described embodiments.

[0020]

Effects of the Invention: According to the contour correction circuit of the present invention, whether the original signal is an analog waveform or a digital waveform,
There is an advantage that easy and optimal contour correction can be realized by a circuit with a simple configuration including delay means and the like. Further, by setting the delay time τ of the second and third delay means to appropriate values, horizontal contour correction or vertical contour correction can be realized.

Furthermore, the coefficient K1 can be set according to the amplitude ε of the delayed signal A, that is, the amplitude of the original signal X, and furthermore, the coefficient K3 can be set to a value lower than the value of the coefficient K1 according to the APL. can. Furthermore, if the coefficient K1 is set to be constant with respect to the amplitude ε, it is possible to reduce only the contour correction amount on the positive level side according to the APL without reducing the contour correction amount on the negative level side. . Further, by setting τ1 and τ2 to appropriate values, it is possible to calculate the APL of a signal having a high correlation with the delayed signal A, for example, a signal one line or one frame before the delayed signal A. Therefore, the amplitude and APL of the original signal
By changing the values of the coefficients K1 and K3 in response to changes in , the contour correction amount on the positive level side and the contour correction amount on the negative level side are automatically adjusted, and the S Optimum image quality can be obtained with minimal reduction in /N ratio.

Furthermore, if this contour-corrected signal is supplied to the liquid crystal display element as an input signal applied to the pixel electrode of the liquid crystal, the temporal response speed of the light transmittance of the pixel is improved in addition to the contour correction, and the image It becomes possible to further improve the sharpness and definition of the image.

[Brief explanation of drawings]

FIG. 1 is a circuit configuration diagram showing an embodiment of a contour correction circuit of the present invention.

FIG. 2 is a timing chart diagram of a circuit in an embodiment of the present invention.

FIG. 3 is a diagram showing an example of the relationship between amplitude ε and coefficient K1.

FIG. 4 is a circuit configuration diagram showing an embodiment of a third arithmetic circuit of the present invention.

FIG. 5 is a diagram showing an example of the relationship between the APL value σ and K3/K1.

FIG. 6 is a diagram showing an example of contour correction according to a conventional example.

FIG. 7 is a diagram showing improvement in response speed of light transmittance in pixels of a liquid crystal.

[Explanation of symbols]

1 Input terminal 2A First delay means 2B Second delay means 2C Third delay means 2D Fourth delay means 5 First arithmetic circuit 6 Second arithmetic circuit 7 Third calculation circuit 7' Fourth arithmetic circuit 8A First multiplier circuit 8B Second multiplication circuit 8C Third multiplier circuit 11 Output terminal 12 Straight line ■ 13 Curve■ 14 Straight line ■ 15 APL calculation circuit 16 K3/K1 calculation circuit 17 K3 calculation circuit 18 APL value σ 19 K3/K1 value κ 20 Curve ■ 21 White level 22 Black level 23 Noise component 24 Preshoot 25 Overshoot 26 Amplified noise component 27 Area A 28 Area B 29 Trajectory■ 30 Trajectory■

Claims (1)

[Claims] 1. First and fourth delay means for delaying the original signal, second delay means for delaying the output signal of the first delay means, and delaying the output signal of the second delay means. and first and second subtraction circuits that subtract the respective output signals from the first, second, and third delay means to form first and second contour correction signals. and first and second arithmetic circuits that form third and fourth contour correction signals from the first and second contour correction signals;
a fourth arithmetic circuit that determines the level of the third contour correction signal from the level of the output signal from the delay means;
a third arithmetic circuit that determines the level of the fourth contour correction signal based on the picture level), and adds signals obtained by adjusting the levels of each of the third and fourth contour correction signals. A fifth contour correction signal obtained is created, and a signal obtained by adjusting the level of the fifth contour correction signal and the output signal of the second delay means is added. circuit.