JPH04352016A - information processing equipment - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention]

0001

[Industrial Field of Application] The present invention provides a system in which, when power is turned on,
The present invention also relates to an information processing device whose circuit operates normally even under unstable voltage conditions such as when the system power is turned off.

0002

2. Description of the Related Art Conventionally, in many information processing apparatuses such as personal computers, a small current is applied to some circuits (hereinafter referred to as backup circuits) to keep them active even after the system power is turned off. This is because circuits such as registers that store system environment data need to be supplied with current in order to maintain the contents of the registers even when the power is turned off. In particular, in an information processing device equipped with a resume function, it is necessary to supply current to a backup memory device in order to retain backed up information.

0003

By the way, such information devices sometimes malfunction when the system power is turned on or when the system power is turned off. This is due to the following reason. First, even when the system power is turned off, backup circuits are supplied with power and remain active, but circuits other than backup circuits (hereinafter referred to as non-backup circuits) are not supplied with power and are in a dormant state. shows. Next, when the system is started up, power is given to non-backup circuits. This power causes the non-backup circuit to transition from a dormant state to an active state. Due to this state change, the high level signal in the circuit also changes from 0V to 5V. However, this change draws a gentle curve on the order of several milliseconds due to the influence of capacitors in the circuit. During this change, if a high level signal is applied from the non-backup circuit to the backup circuit, the high level signal becomes an intermediate level signal lower than 5V. In particular, the backup circuit is CMOS
(Complementary MOS) circuit, if such an intermediate level signal is applied, a through current will occur. When there are many such signal lines, there is a problem that a voltage drop of the power supply supplied to the backup system circuit occurs, and data held in the backup system circuit is destroyed. This problem also occurred when the system was disconnected. The present invention attempts to solve such problems.

0004

[Means for Solving the Problems] In order to solve the above problems, the information processing device of the present invention has the following steps:
A first circuit that maintains an active state regardless of disconnection, a second circuit that maintains an active state when the system power is turned on and goes into a dormant state when the system power is turned off, and an input/output terminal of the first circuit and a second circuit
between the input and output terminals of the circuit, a certain period during which the second circuit changes from a resting state to an active state or from an active state to a resting state;
A voltage holding circuit is provided that holds a voltage signal transmitted between an input/output terminal of the first circuit and an input/output terminal of the second circuit at a low level.

[0005]

[Operation] The second circuit maintains an active state when the system power is turned on, and changes to a dormant state when the system power is turned off. Therefore, when the system power is turned on and the system power is turned off, these states switch, and the voltage state in the second circuit becomes unstable. If a high-level signal is applied from the input/output terminal of the second circuit to the input/output terminal of the first circuit during a certain period when this voltage is unstable, a through current is generated and a voltage drop occurs in the backup power supply. As a result, the backed up data is destroyed. According to the information processing device of the present invention, a high level signal in an unstable voltage state transmitted between the input/output terminal of the first circuit and the input/output terminal of the second circuit is transmitted between the input/output terminal of the first circuit and the input/output terminal of the second circuit. A voltage holding circuit provided between the input and output terminals of the second circuit converts the signal to a low level signal. Therefore, even if the voltage is unstable when the system power is turned on and when the system power is turned off, the circuit will not malfunction.

[0006]

[Example] Hereinafter, with reference to FIGS. 1 to 4 of the accompanying drawings,
An embodiment of the present invention will be described.

FIG. 1 is a block diagram of an information processing apparatus according to an embodiment of the present invention. The information processing device 1 of this embodiment includes:
A non-backup circuit 10, which is a second circuit that maintains an active state when the system power is turned on and a dormant state when the system power is turned off, and a first circuit that maintains an active state regardless of whether the system power is turned on or off. A certain backup circuit 40, a power supply device 50 that supplies power to the non-backup circuit 10 and the backup circuit 40, and a DC/DC converter 60 that supplies a current of 2 to 3 A (ampere) to the non-backup circuit 10. Backup circuit 4
A three-terminal regulator 70 that supplies a current of 5 to 10 mA when the system power supply is turned off to the input terminal 80, and a switch 90 that is operated by a PON signal applied from an input terminal 80 are provided. The non-backup circuit 10 includes a CPU and an I
A circuit section 20 consisting of a circuit such as a /O device, and a circuit section 20
and an output section 30 which is a voltage holding circuit to which an output signal is applied. Further, the backup system circuit 40 includes a register storing data such as a system management table, a memory RAM for backup at the time of resume, and the like. Furthermore, the output section 30 of the non-backup circuit 10 is supplied with a PON signal (FIG. 3(b)
)) and the PWGD signal (FIG. 3(d)) which becomes high level when the in-circuit voltage of the circuit unit 20 is 4.5V or higher, and a logic circuit 31 that calculates the logical product of PRO outputted from the logic circuit 31.
A buffer 33 and a logic circuit 32 that performs an AND operation between the N signal (FIG. 3(e)) and the output signal from the circuit section 20 (FIG. 3(c)) are provided.

Next, the operation of this embodiment will be explained using FIGS. 1 and 3. First, in the system power-off state, the switch 90 is turned off, so power is not supplied to the non-backup circuit 10, and the non-backup circuit 10 maintains a hibernation state. On the other hand, since the backup circuit 40 is supplied with power from the power supply device 50, it is in an active state. Then, when the system power is turned on, the PWSW signal (Fig. 3(a)) becomes high level, and the PON signal (Fig. 3(b)
)) also becomes a high level signal. The switch 90 is turned on by this PON signal, and the non-backup circuit 1
0 is powered. Until the voltage value of every corner element in the non-backup circuit 10 reaches a stable state of 5V,
Draw a gentle upward curve on the order of millimeter (Figure 3(c))
). If a high-level output signal is directly sent from the circuit section 20 to the backup circuit 40 in this state, a through current flows through the backup circuit 40. Therefore, in this embodiment, the output section 3 is provided between the circuit section 20 and the backup circuit 40.
0 is provided, the output signal from the circuit section 20 is processed by the output section 30, and then transmitted to the backup circuit 40. Processing in the output section 30 first involves processing the PWGD signal (FIG. 3(d)), which becomes high level when the voltage value of the high-level signal in the circuit section 20 becomes 4.5 V or more, and the PON signal (FIG. 3(b) )) in the logic circuit 31. PRON signal output from this logic circuit 31 (FIG. 3(e)
) is always at low level when the voltage value of the high level signal in the non-backup circuit 10 is 4.5V or less. By logically ANDing this PRON signal (FIG. 3(e)) and the output signal from the circuit section 20 (FIG. 3(c)) in the logic circuit 32, the output signal (FIG. 3(c)) rises and falls. The lower edge is cut off. By cutting this edge part, the backup circuit 4
0 can be prevented from flowing through current. Then, the output signal from the logic circuit 32 (FIG. 3(g)) is applied to the backup circuit 40 via the buffer 33.

Next, another embodiment will be explained using FIG. 2. The information processing device 101 of this embodiment includes backup circuits 110 and 150 that maintain an active state regardless of whether the system power is turned on or off, and that maintain an active state when the system power is turned on and enter a dormant state when the system power is turned off. a power supply device 160 that supplies power to the backup circuits 110, 150 and the non-backup circuit 140, and provides a current of 5 to 10 mA to the backup circuits 110, 150 when the system power is turned off. A three-terminal regulator 170, a DC/DC converter 180 that supplies a current of 2 to 3 A (ampere) to the non-backup circuit 140, and a switch 200 that operates by a PON signal applied from an input terminal 190.
are provided. The backup system circuit 110 is C
A circuit section 120 consisting of circuits such as a PU and an I/O device,
an output section 130 to which an output signal from the circuit section 120 is applied;
It is composed of. Furthermore, backup system circuit 1
The output section 130 of 10 has a PON signal (FIG. 3(b)) and a PWGD2 signal (FIG. 3(f)) which becomes high level when the voltage value of the high level signal in the circuit section 120 is 2.0V or more. A logic circuit 131 that takes a negative OR, and a PON signal (
3(b)) and the PWGD signal (FIG. 3(d)) which becomes high level when the voltage value of the high-level signal in the circuit section 120 is 4.5 V or more; a logic circuit 132; A logic circuit 133 that takes the logical product of the PRON signal output from the logic circuit 132 (FIG. 3(e)) and the output signal from the circuit section 120 (FIG. 3(c)), and the output signal from the logic circuit 133 and the logic circuit. The output signal from 131 is input to the logic circuit 134, and the output signal (FIG. 3(h)) is given to the non-backup circuit 140 and the backup circuit 150. This output signal (FIG. 3(h)) always holds 0V while the high-level voltage value in the non-backup circuit 140 is unstable between 2.0V and 4.5V. Therefore, it is possible to prevent a through current from flowing through the non-backup circuit 150. Also, the high level voltage value in the non-backup circuit 140 is between 0V and 2.0V.
By stopping holding the voltage at 0V during 0V and setting it to high impedance, the signal of the non-backup circuit 140 is stopped from continuing to be pulled to 0V. This is because if the non-backup circuit 140 is connected to an external expansion device and the external device is pulled up, an abnormal current may flow through the pull-up resistor and malfunction may occur.

Next, an example of application of the present invention will be explained using FIG. In this application example, when the system power is turned on and the PWGD signal (Fig. 3(d)) becomes high level,
The power supply to the backup circuit is switched from the three-terminal regulator 320 to the DC/DC converter 310. This is because after the system power is turned on, the current consumption of the backup circuits 350 and 360 increases significantly, so power is supplied from the DC/DC converter 310, which can supply a larger amount of power than the 3-terminal regulator 320. be.

In this embodiment, the voltage holding circuit is incorporated in the output portion of the non-backup circuit or the backup circuit, but it may be placed independently or incorporated in the input portion.

0012

Effects of the Invention With the information processing device of the present invention, a high level signal in an unstable voltage state transmitted between the input/output terminal of the first circuit and the input/output terminal of the second circuit can be transmitted to the first circuit. A voltage holding circuit provided between the input/output terminal of the second circuit and the input/output terminal of the second circuit converts the signal to a low level signal. Therefore, the circuit operates normally even when the voltage is unstable when the system power is turned on and when the system power is turned off.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of an information processing device according to an embodiment of the present invention.

FIG. 2 is a configuration diagram of an information processing device according to an embodiment of the present invention.

FIG. 3 is a timing chart of an information processing device according to an embodiment of the present invention.

FIG. 4 is a configuration diagram of an information processing device according to an application example of the present invention.

[Explanation of symbols]

1... Information processing device 10...Non-backup circuit 20...Circuit section 30...Output section 40...Backup circuit 50...Power supply device 60...DC/DC converter 70...3 terminal regulator 80...Input terminal 90...Switch

Claims (1)

[Claims] Claims: 1. A first circuit that maintains an active state regardless of whether the system power is turned on or off; a second circuit that maintains an active state when the system power is turned on and enters a dormant state when the system power is turned off; Between the input/output terminal of one circuit and the input/output terminal of the second circuit, during a certain period when the second circuit changes from a resting state to an active state or from an active state to a resting state, the input/output terminal of the first circuit and a voltage holding circuit that holds a voltage signal transmitted between the input and output terminals of the second circuit at a low level.