JPH0435320A - 1-bit digital/analog converter - Google Patents

Abstract

PURPOSE:To reduce noise at the time of existing no signal by deciding an input to be zero when '0s' in an input data are consecutive for a prescribed period to fix a pulse width modulation output to '0' or 1. CONSTITUTION:At the time of existing no signal, a zero detector 9 outputs a zero detection signal and 1st and 2nd data selectors 10, 11 output '0' (or '1'). The output Dc level of 1st and 2nd low pass filters 5, 6 is changed in such a case, but a final output level is unchanged by adding the output DC levels differentially by a differential adder 7. Moreover, the input signal to the 1st and 2nd low pass filters 5, 6 is unchanged in terms of AC.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is applicable to a device used in, for example, digital audio equipment.
It relates to bit digital/analog converters.

2. Description of the Related Art A conventional 1-bit digital/analog converter converts an input multi-bit digital signal, such as a pulse code modified mW (hereinafter referred to as PCM) signal, by using a noise shaving technique or the like to reduce the number of output bits. After the signal is reduced and finally converted into a 1-bit signal such as pulse width modulation (hereinafter referred to as PWM), the signal within the band is extracted through a filter. Furthermore, in order to improve performance, some devices have been devised such that, for example, two analog complementary output signals are differentially added to extract the output.

The operation of a conventional differential addition type 1-bit digital/analog converter will be explained with reference to the drawings.

FIG. 3 shows the configuration of a conventional example. In FIG. 3, 31 is a signal input terminal, 32 is a noise shaper that reduces the number of bits of the input PCM signal by noise shaving technology, 33 is a first signal converter that performs PWM conversion on the output of the noise shaper 32, 34 is a second signal converter that converts the output of the noise shaper 22 into a PWM signal complementary to the first signal converter 33 and outputs it; 35 is a PWM signal output from the first signal converter 33; a first low-pass filter that removes high-frequency components; 36 is a second signal converter 34;
A second low-pass filter 37 removes high-frequency components of the PWM signal output from the first low-pass filter 35.
A differential adder 38 differentially adds the output of the differential adder 37 and the output of the second low-pass filter 36, and 38 is an output terminal from which the output of the differential adder 37 is taken out.

The operation of the noise shaper 32 will not be explained as it does not play an important role in the present invention, but when a sine wave signal is input, the output of the noise shaper 32 will be as shown in FIG. 4 in analog form. It becomes a signal. In this example, the noise shaper 32 converts a 17-bit full scale sine wave into an 11-value digital signal. The values -5 to +5 shown in FIG. 4 are converted by the first signal converter 33 into PWM waveforms as shown in FIG. 5, and are converted into PWM waveforms as shown in FIG. P.W.
Converted to M waveform. After high-frequency components are removed from these PWM waves by first and second low-pass filters 35 and 38, they are differentially added by a differential adder 37 and taken out as output.

Problems to be Solved by the Invention However, while resistance ladder type digital/analog converters do not generate any noise other than noise caused by the analog circuit when there is no signal, 1-bit digital converters such as the above conventional example /In the analog converter, even when there is no signal, that is, when digital zero is input, the output of the noise shaper 32 becomes data as shown in FIG. 7, and even when the input data is zero, the output data changes, Since this data is subjected to PWM conversion, there is a problem in that it is output as noise.

The present invention has been made in view of the above-mentioned problems, and when the input data is zero for a certain period of time, it is determined that the input is zero and the PWM output is fixed to O or I. The object of the present invention is to provide a 1-bit digital/analog converter that can reduce noise.

Means for Solving the Problem In order to achieve this object, the 1-bit Φ digital/analog converter of the present invention converts an input digital signal into a 1-bit signal having a mutually complementary relationship. a converting means, a zero detecting means that outputs a zero detection signal when it detects that the input signal is zero for a certain period of time, and an output of the two digital signal converting means according to the signal output from the zero detecting means. two signal selection means for fixing to data 0 or 1, respectively; two filters for removing high-frequency components of the respective outputs of the two signal selection means; and a difference for differentially adding the outputs of the two filters. Dynamic addition means.

Effect The present invention has the above configuration, and by fixing the PWM waveform to 0 or 1 when it is detected that there is no signal,
It is possible to reduce noise when there is no signal.

EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings.

FIG. 1 shows a block diagram of a 1-bit digital/analog converter according to an embodiment of the present invention.

In Figure 1, l is the input terminal and 2 is the input PC.
A noise shaper that reduces the number of bits of the M signal by noise shaving technology, 3 a first signal converter that performs PWM conversion on the output of the noise shaper 2, and 4 complements the output of the noise shaper 2 with the first signal converter 3. 9 is a zero detector that generates a zero detection signal when input data is zero for a certain period of time; 10 is a zero detection signal from zero detector 9; 11 is a first data selector that outputs O (or 1) when the signal is output, and otherwise outputs the output signal of the first signal converter 3; A second data selector outputs O (or 1) when the signal is being output, and otherwise outputs the output signal of the second signal converter 4; 6 is a second low-pass filter that removes high-frequency components of the PWM signal output from the second signal converter 4; 7 is a first low-pass filter; A differential adder 8 differentially adds the output of the filter 5 and the output of the second low-pass filter 6, and 8 is an output terminal from which the output of the differential adder 7 is taken out. Here, since the operations of the noise shaper 2 and the first and second signal converters 3 and 4 are the same as in the conventional example, a description of the operations will be omitted.

When zero data is input for a certain period of time, the zero detector 9 outputs a zero detection signal. The zero detector 9 has a configuration as shown in FIG. 2, for example. In Figure 2,
21 is a sampling clock input terminal, 22 is a data input terminal, and 23 is N.

R gate, 24 is a counter with asynchronous clear and count enable, and 25 is a zero detection signal output terminal. When the data input from the data input terminal 22 is other than zero, the output of the NOR gate 23 becomes O, and the counter 24 remains reset. When the input data becomes zero, the reset is released and the counter 74 starts counting at the sampling clock cycle input from the sampling clock input terminal 21. In the initial state, the ripple carry output (RC) is zero, and since this ripple carry output is connected to the enable terminal, counting continues. Assuming that the counter 24 has 8 bits, if non-zero data is input before the count reaches 255, the counter 24 will be reset and no zero detection signal will be output. If zero input continues until the count reaches 255, the ripple carry output of the counter 24 becomes 1, and the counter 24 enters the disabled state, so the state of the count 255 remains until the next non-zero data is input and reset. The zero detection signal continues to be output.

When there is no signal, a zero detection signal is output from the zero detector 9, and the first and second data selectors 10 and 11 output 0 (or 1). At this time, the output DC levels of the first and second low-pass filters 5 and 6 change, but
Due to the differential addition performed by the differential adder 7, the final output level does not change.

At this time, the input signals of the first and second low-pass filters 5.6 do not change even in the alternating current manner, and therefore the noise level when there is no signal is also at a very low level.

Effects of the Invention The 1-bit 0 digital/analog converter of the present invention can reduce the noise level when there is no signal by stopping the PWM output when there is no signal at the input.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a 1-bit digital/analog converter in an embodiment of the present invention, FIG. 2 is a block diagram showing the configuration of a zero detector which is a component of the embodiment, and FIG. The figure is a block diagram showing the configuration of a conventional 1-bit digital/analog converter, Figure 4 is a waveform diagram showing the output waveform of the noise shaver when sine wave data is input, and Figure 5 is the first signal. A waveform diagram showing the output waveform for the input data of the converter, FIG. 6 is a waveform diagram showing the output waveform for the input data of the second signal converter, and FIG. 7 is a waveform diagram showing the output waveform of the noise shaver at zero input. It is a diagram. 1...Input terminal, 2...Noise shaper,
3... First signal converter, 4... Second signal converter, 5... First low-pass filter, 6...
second low-pass filter, 7... differential adder,
8... Output terminal, 9... Zero detector, 10.
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Claims (1)

[Claims] Two digital signal conversion means that convert an input digital signal into a 1-bit signal having a mutually complementary relationship; a zero detection means for outputting; two signal selection means for fixing the outputs of the two digital signal conversion means to data 0 or 1, respectively, depending on the signal output from the zero detection means; and the two signal selection means. A 1-bit digital/analog converter comprising: two filters for removing high-frequency components of respective outputs; and differential addition means for differentially adding the outputs of the two filters.