JPH0435534A - Transmitting terminal equipment for isdn - Google Patents

Abstract

PURPOSE:To simplify the configuration of a receiving equipment by changing an array of a bit pattern corresponding to a synchronizing pattern inserted into a data train of communication data in accordance with the contents of the communication data existing between its synchronizing pattern and the next synchronizing pattern. CONSTITUTION:The above equipment is configured by a communication terminal connecting port 1, an interface device 2, a voice/data coupling device 3, a network interface control circuit 4, a driver/receiver circuit 5, a DSU connecting port 6, a PCM/ADPCM converter 7, a PCM CODEC 8, and an analog circuit 9. In such a state, an information channel is divided into the upper bit and the lower bit and allocated so that voice data and communication data are inserted into one of them and the other, respectively, a bit pattern corresponding to a synchronizing pattern is inserted into a data train of the communication data allocated to the upper 4 bits, and also, an array of the bit pattern is changed in accordance with the contents of the communication data existing between the synchronizing pattern. In such a way, whether existence data of the communication data is command data or not can be decided, and the configuration of the receiving equipment can be simplified.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is based on the μ law ( 64KbpsPCM
code), therefore, during a call, one of the two B channels allocated as information channels is occupied. On the other hand, even when accommodating existing data terminals such as personal computers into rsDN, the currently standardized standards require information channels (B
channel). For this reason, even if the communication speed of the data terminal is low, it occupies one information channel, making it impossible to take advantage of the high speed of TSDN communication, and if you want to make a call at the same time, you need to use one more information channel. This is not only uneconomical but also reduces line usage efficiency.

To address this problem, a technique for multiplexing voice data and communication data onto one information channel has been proposed in Japanese Patent Laid-Open No. 157442/1983.

Although the communication speed of 15DN is high, the communication speed of data terminals varies from low speed to high speed.

If the communication speed of the l5DN and the communication speed of the data terminal are different, especially if the data terminal is slow, some measures should be taken such as matching the communication speed with the l5DN or controlling the data. means does not mention it.

A commonly considered method is to insert dummy data between the communication data sent from the data terminal and send it to the 15DN information channel. In this way, even if the communication data is at a low speed, it is possible to match the communication speed with the communication speed of the 15DN using the dummy data and send the communication data.

However, by simply inserting dummy data,
Since the receiving side does not know whether the data being sent is dummy data or communication data, it has to take in each data piece by piece and determine whether it is communication data or dummy data, which makes the device configuration very complicated. There are issues such as:

In view of these points, the present invention allows voice data and communication data to be transmitted through a single information channel, and even low-speed communication data can be easily combined with communication data and dummy data without using a complicated configuration on the receiving side. It is an object of the present invention to provide an I5DN transmitting terminal device that is devised so that data can be distinguished.

In order to achieve the above object, the I5DN transmitting terminal device of the present invention divides the via configuration of the information channel into upper bits and lower bits, and transmits audio data to one and communication data to the other. a synchronization pattern insertion means for inserting a bit pattern corresponding to a synchronization pattern into a data string of communication data to be inserted into the assigned bits, and a bit pattern corresponding to the synchronization pattern. The present invention is characterized by comprising a bead pattern arrangement changing means for changing the pattern arrangement according to the content of communication data between the synchronization pattern and the next synchronization pattern.

According to the present invention, an information channel is divided into upper bits and lower bits, and one is assigned to insert audio data and the other is assigned to insert communication data. According to the I5DN, 8 bits are given as one information channel, so it is divided into 4 bits each, and the upper 4 bits are assigned communication data, and the lower 4 bits are assigned audio data. and,
A bit pattern corresponding to the IJtJJ pattern is inserted into the data string of the communication data assigned to the lower 4 bits, and the arrangement of this bit pattern is adjusted according to the content of the communication data between the synchronization pattern and the next synchronization pattern. change. Here, the content of the communication data refers to information about the presence or absence of communication data and whether the communication data is command data or general data.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of an l5DN transmitting terminal, in which 1 is a boat connected to a communication terminal, 2 is an interface device with the communication terminal, 3 is an audio/data coupling device, and 4
is the network interface control circuit, 5 is the driver/receiver circuit, 6 is the port connected to the DSU, and 7 is the PCM/A
A DPCM converter, 8 a PCM cord, and 9 an analog circuit including a hand sensor, a speaker, and the like.

The analog circuit 9 is a circuit that generates an audio signal such as a transmitter,
It is made up of parts. PCM Cody, 7ri8 is a circuit that converts audio signals to PCM data, PCM/ADPC
The M converter 7 is a circuit that converts PCM data into 4-bit ADPCM data, and the audio/data combiner 3 converts the upper 4 bits of the 8-bit information channel from the communication terminal connection board 1 through the communication terminal interface device 2. A part that performs operations such as inserting incoming communication data, inserting 4 bits of ADPCM data (audio data) into the lower 4 bits, and further inserting a synchronization pattern into the upper 4 bits, and is configured by, for example, a computer. has been done. The details of the operation of this coupling device 3 are shown in FIG. 2 (described later).

The network interface control circuit 4 is a driver/receiver circuit that processes the B channel information output from the audio/data coupling device so that it can be sent to a network termination device where it is multiplexed with other B channel information and D channel data. 5 is a circuit that sends data output from the network interface control circuit 4 to the 15DN through the DSU port 6.

Next, the operation of the I5DN transmitting terminal device having the above configuration will be explained.

The audio signal from the analog circuit 9 is sent to the PCM code 8
is converted to PCM data by
The M conversion device 7 converts it into 4-bit ADPCM data, and the audio data combining device 3 inserts it into the lower bit position of the information channel (hereinafter, this lower bit position is referred to as the audio data section). On the other hand, the communication data received from the communication terminal connection board 1 is converted into 3-bit parallel data by the communication terminal interface device 2, and the audio/data combination device 3 converts the synchronization pattern, the upper 4 bits of the communication data, and the lower 4 bits of the communication data. They are inserted into the upper bit position of the information channel (hereinafter, this upper focused part will be referred to as the communication data part).

Here, at the start of communication, as shown in Figure 3.4,
Synchronization pattern is “0001”, communication data is “1111”
" is transmitted as a fixed pattern. In this way, by receiving this fixed pattern on the receiving side, the position of the synchronization pattern in the bit string of the communication data part can be determined (synchronization establishment ).and,
After that, the communication data is decoded with the data that follows the synchronization pattern as the upper 4 bits of the communication data, and the data that comes after that as the lower 4 bits of the communication data.

During data communication after synchronization is established, if there is communication data from the communication terminal, the bit array of the synchronization pattern is changed to “
0000" and the communication data is the upper 4 bits and the lower 4 bits.
It is the upper 4 bits and the lower 4 bits following the synchronization pattern.
Transmit in bit order. Also, if there is no communication data from the communication terminal, change the bit array of the synchronization pattern to “1000”.
”, and then insert dummy data (any data is fine) into the communication data section for two frames immediately after that and send it.For example, as shown in Figure 4, the communication terminal sends A (ASCII code 41H) as communication data. ), the bit array of the synchronization pattern is "0000", and the communication data section of the next two frames contains "0100" (4) as the upper bit of the communication data and "00" as the lower bit.
01" (1) in that order. Similarly, when transmitting B (ASCII code 42H) as communication data, the bit array of the synchronization pattern is "0000" and the upper part is inserted in the communication data section of the next two frames. 0100 as bit
” (4) is inserted as the lower bit, and 0010” (2) is inserted in that order. Thereafter, if no data is received from the data communication terminal, the synchronization pattern is changed to "1000", a dummy is inserted into the communication data, and transmission continues. Also, when the data from the communication terminal changes to a command, change the bit array of the synchronization pattern to "0100", and use the upper 4 bits and lower 4 bits of the command code as when transmitting data.
Insert in the order of t. For example, as shown in Figure 4, a command RT (ring tone, ASCII code 52
H854H), the bit array of the synchronization pattern is set to "0100", and the communication data section of the next two frames is set with "0101" (5) as the upper bit of the command and "0010" (2) as the lower bit. Then, change the bit array of the synchronization pattern to the same “010” as before.
0", the communication data section of the next two frames contains "0101" (5) as the upper bit of the command, and the lower bit
"0100" (4) is inserted as t in that order. Immediately after command transmission is completed, the synchronization pattern is set to “100”.
0” or “0000” and transition to data communication state.

By displaying the contents of the communication data section for the next two frames depending on the bit alignment of the synchronization pattern, the receiving side can always monitor the focus alignment of the synchronization pattern. If it is "1000", the communication data is invalidated and not sent to the communication terminal, and if it is "0000", the communication data is returned to 8 focus and sent to the communication terminal, and further "
0100", the communication data can be converted back to 8 bits and treated as a command to control the communication terminal. This means that the receiving side only needs to monitor the bit arrangement of the synchronization pattern. There is no need to detect data in the communication data section one by one and make a complicated judgment as to whether it is dummy data or communication data, and the device configuration is greatly simplified.

FIG. 2 is a flowchart of the voice/data combination device for carrying out the control operations described above. When communication starts, the counter is reset in #1.

This counter counts up every time one frame of the information channel is sent, and when the count value reaches 3 (#
13) Reset again. When the count value of this counter is O, a synchronization pattern is inserted into the communication data section,
Communication data is inserted when the count value is 1 or 2.

Next, the CPU timer is started at #2.

The CPU timer is set to the time required to insert data into all 8 bits of the information channel at a communication rate of 64 kbit/s.

#3 performs processing to store audio data in register 1.

Register l has 3 bits, audio data is the lower 4 bits
is stored in In addition to register 1, there is register 2 as a register. Register 2 is CPU timer 125μ
Each time sec is counted, either command data, communication data, or synchronization pattern is stored. The synchronization pattern is created by the communication terminal interface device 2.

In #4 it is determined whether the command flag is set, and in #5 it is determined whether the data flag is set. This determination is necessary because the data input from the communication terminal connection port 1 includes command data and communication data. While receiving command data, the command flag is set (flag=1), and while receiving communication data, the data flag is set.

When both the command data and the communication data are completely received, they are stored in the register 2. At the same time as storage, the flag is changed to 0.

Therefore, while receiving communication data, the program advances from #5 to #6, and if the counter is O here, the program advances to #7, where the synchronization pattern "0000" (ASCII code 0OH
) is stored in register 2.

On the other hand, if the counter is 1 or 2 in #6, the process advances to #14 and the communication data being received is stored in the upper pin H2 of register 2. Then, mask the lower bits (#15), mask the upper bits of register 1 (#8), add up the data in registers 1 and 2, and use this as the data stored in register 1 (#9). . If register 2 stores a synchronization pattern, the lower bits are not masked,
The total value of registers 1 and 2 is set as the data stored in register 1 (#9). After that, the data stored in register 1 is output as a serial signal (#10), and the counter is amplified by 1 (#11). Then, wait for the set time of the counter timer to elapse (#12), proceed to #13, and if the count value of the counter is 3, reset it to 0 again (#1), otherwise the counter Set the timer to T=O and repeat #4. Determine whether the command flag and data flag of #5 are 1 or 0.

If both the command flag and the data flag are 0, the program advances from #5 to #16--, stores a synchronization pattern of bit array "1000" indicating the existence of dummy data in register 2 (#17), and immediately after that, the counter becomes 1. Or when 2, store dummy data (ASCII code FOH) (
#18).

Also, if the command flag is 1, the program is #4
Proceed to #19 and enter the bit array “
0010'' synchronization pattern should be stored in register 2 #2
0), and immediately after that, when the counter reaches 1 or 2, the command data is stored in register 4-2 (#21).

A detailed explanation of the flowchart in FIG. 2 will be omitted since it overlaps with the explanation of the operation already described.

As explained above, according to the 15DN transmission terminal device of the present invention, voice data and communication data can be transmitted through one information channel, and a synchronization pattern can be inserted into the communication data section. At the same time, since the bit arrangement of this synchronization pattern is changed depending on the content of the communication data, on the receiving side, by detecting only the bit arrangement of the synchronization pattern, it is possible to determine the presence or absence of communication data and whether the communication data is command data. This simplifies the configuration of the receiving device.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an I5DN transmitting terminal device as an embodiment of the present invention, FIG. 2 is a flowchart explaining the operation of the voice/data combining device, and FIG. 3 is a diagram showing the bit configuration of the information channel. The figure shown in FIG. 4 is a diagram explaining the communication procedure of the information channel. 1...Communication terminal connection port, 2...Communication terminal interface device, 3...Audio/data coupling measures, 4.
...Network interface control circuit, 5...Driver/
Receiver circuit, 6...DSU connection board, 7...P
CM/ADPCM conversion device, 8...PCM copier, 9...analog circuit. Patent applicant: Sanyo Electric Co., Ltd. Figure 3 (iv) Ii wo city (command 8!T)

Claims (1)

[Claims] (1) A data allocation means that divides the bit configuration of an information channel into upper bits and lower bits and allocates audio data to one and communication data to the other, and a data allocation means for inserting communication data into the allocated bits. A synchronization pattern insertion means for inserting a bit pattern corresponding to a synchronization pattern into a data string, and an arrangement of bit patterns corresponding to the synchronization pattern according to the content of communication data between the synchronization pattern and the next synchronization pattern. A transmitting terminal device for ISDN, comprising: bit pattern arrangement changing means for changing the bit pattern arrangement.