JPH04355809A - Initial value setting circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention]

0001

[Industrial Field of Application] The present invention relates to an initial value setting circuit for an apparatus that includes a plurality of blocks supplied with the same power, and each block is equipped with an initial value setting circuit that generates a signal to initialize the internal state when a power failure is detected. Regarding the value setting method.

[0002] Devices such as electronic exchanges and computers that perform processing based on programs (central control units, memory, peripheral devices, input/output control units, etc.) are required to initialize the devices when the power is turned on after a power outage. A reset signal is generated. This sets the device to its initial state and allows it to start normal operation. However, if power is interrupted for a short period of time, such as a momentary power outage, the power outage cannot be automatically detected, resulting in a situation where no reset signal is generated.

0003

2. Description of the Related Art FIG. 3 is a block diagram of a conventional example. As a power source for various devices constituting conventional exchanges and computers, power is distributed from a main power supply device 30 to a plurality of blocks 31 constituting a processing device, and each block generates the necessary power supply voltage. A power supply circuit 32 is provided. Such blocks are not provided with a reset function (externally operated reset button, etc.). Instead, each block is provided with a reset circuit (initial setting circuit) 33 that generates a reset signal to a circuit that needs to initialize (reset) the circuit state within the block when power is turned on.

This reset circuit 33 (referred to as a power-on reset circuit) is composed of a circuit that combines a resistor, a capacitor, and a diode as shown in the figure, and monitors the voltage of the power supply circuit 32 to determine the power-off state. When the power changes from to on, a pulse signal is generated. This pulse signal is supplied as a reset signal to the initial value setting terminal (reset terminal R in the illustrated example) of each circuit in the block 31 to initialize each circuit. The circuits to be initialized include memories (including registers) that hold various data and addresses, and circuits that represent the status of programs and devices.

[0005] With such a configuration, when the power is turned on, the state of the control device of the exchange device is first automatically reset, and the exchange device can be started from the initial state. If the power is cut off due to a power outage after the system is in operation,
The device stops operating. After that, when the power supply is resumed, the reset circuit 33 generates a reset signal again to reset each part of the block and restart the operation from the beginning.

According to the conventional technology shown in FIG. 3, in the event of a power outage, the reset circuit reliably generates a reset signal, but a momentary power outage (instantaneous interruption) may occur due to a momentary abnormality in the power supply circuit. If this occurred, the reset circuit 33 could not detect it because the disconnection time was short and could not generate a reset signal. In this case, the state of the circuits that store data in each block may change due to a momentary power outage. In other words, when the power is restored after an instantaneous power cut, the contents of registers, etc. may change depending on how the voltage level changes due to feedback from surrounding devices or lines (each having a predetermined capacity) connected to each circuit. The problem was that it changed.

[0007] If the unit continues to operate in this state,
Operating based on erroneous data may result in faults such as incorrect control operations or runaway programs. In order to deal with this, a reset monitoring circuit has been proposed that monitors instantaneous power interruptions and autonomously initializes when an instantaneous interruption occurs. -51307).

[0008]

[Problem to be solved by the invention] The reset monitoring circuit that monitors the above instantaneous power interruption is provided in each block to which the same power is supplied, as shown in Figure 3, and the effect on the circuit due to the instantaneous power interruption appears. The monitor circuit is configured to generate an initial setting signal when the monitoring circuit detects this. However, because multiple blocks that are supplied with the same power operate their own reset monitoring circuits, if the duration of a momentary power outage is short, some blocks may be able to detect a momentary power outage and some blocks may not be able to detect it. be. In that case, there was a problem that the blocks had a bad influence on each other via the signal line 35 connected between them, and the system did not operate normally.

For example, a certain block (block #
It is assumed that the block (denoted as block #1) detects a momentary interruption and is reset (initialized), while another block (denoted as block #2) does not detect a momentary interruption. In this state, each block is normally connected by a signal line that transfers data, control signals, etc., so block #1 starts the state from the beginning, while block #2 is in another state (previously Therefore, data supplied from block #2 to block #1 via the signal line 35 (also data in the opposite direction) becomes erroneous data, resulting in an abnormal state. The only way to resolve this situation was to turn off the power.

The present invention provides an initialization system that can prevent a situation in which some blocks are initialized and other blocks are not initialized when a momentary power failure occurs in a plurality of blocks that share a common power source. The purpose is to provide a configuration circuit.

[0011]

[Means for Solving the Problems] FIG. 1 is a basic configuration diagram of the present invention. In Figure 1, 1 is a power supply, 2 is a plurality of power supplies (
#1, #2...) blocks, 3 is an initial setting circuit, 4 is a reset circuit, 5 is a monitoring circuit, 50 is a flip-flop circuit group (represented as an FF group), 51 is a fault detection circuit, 6 represents an OR circuit, and 7 represents an electronic circuit within each block.

The present invention is based on the logical sum of a reset signal generated from a reset circuit that detects a power outage, a detection signal generated from a monitoring circuit that detects an abnormality such as a momentary power outage, and an initialization signal generated from other blocks. The output is outputted as an initial setting signal within each block, and is also supplied to other blocks receiving the same power supply.

[0013]

[Operation] Initial setting circuit 3 of block 2 (for example, #1)
A reset circuit 4 provided in the block generates a reset signal when the power supply 1 is turned on, and supplies an initial setting signal to each part of the electronic circuit 7 in the block via the OR circuit 6. At this time, the reset signal generated from the reset circuit 4 is supplied to the monitoring circuit 5 and sets each flip-flop circuit of the flip-flop circuit group 50 to a predetermined specific state. When the flip-flop circuit group 50 generates an output in a preset state, the fault detection circuit 51 does not generate any output.

Even if a momentary power interruption occurs, the reset circuit 4
If this cannot be detected, the flip-flop circuit group 5
If any one of the flip-flop circuits 0 changes its state due to the influence of a momentary power interruption, the failure detection circuit 51 detects that the pattern differs from a preset pattern and generates a detection signal. This detection signal is supplied as an initial setting signal to each necessary part of the electronic circuit of the block 2 via the OR circuit 6, and is initialized. At the same time, this initial setting signal is input to the OR circuit 6 in another block 2 (for example #2) to initialize the electronic circuit 7 in that block.

On the other hand, when a momentary power interruption occurs, the reset circuit 4 of block 2 (#1)
does not operate (does not generate a reset signal) and the monitoring circuit 5 also does not generate a fault detection signal, and if an initial setting signal is generated in another block 2 (#2) to which the same power supply 1 is supplied. , that signal is input to the OR circuit 6 of each other block, so block 2 (#1)
Also, the electronic circuit 7 of the own block is initialized from the OR circuit 6.

[0016]

Embodiment FIG. 2 is a block diagram of an embodiment. In Figure 2, 1 to 7 are the same as in Figure 1 above, 1 is a power supply, 2 is a block (only block #1 and block #2 are shown in the figure), 3 is an initial setting circuit, and 4 is a reset circuit. Circuit (RS
5 is a monitoring circuit, 50 is a group of flip-flop circuits (represented by FF1 to FFn), and 51 is a fault detection circuit (represented by FF1 to FFn).
52 is an OR circuit (corresponding to 6 in FIG. 1), and 7 is an electronic circuit.

To explain the operation, in block #1, when the power is turned on after being turned off, a reset signal is generated from the reset circuit 4, and each flip-flop circuit of the flip-flop circuit group 50 is output via the OR circuit 52. FF1~
Input to FFn. Each flip-flop circuit FF1~F
Fn connects the reset signal to the set terminal S and reset terminal R.
, and which one is input is set in advance. In the case of the figure, it is an example in which FF1, FF2, . . . are input alternately to the reset terminal S and the set terminal R in this order. A clock signal is supplied to the clock terminal CP of each flip-flop circuit, and when a reset signal is generated, "0", "1"..."0" is output from the output terminal Q of each flip-flop circuit FF1 to FFn. Output occurs. These outputs are detected by a fault detection circuit 51 to see if a predetermined output pattern has occurred, and in the case of a predetermined output pattern, the fault detection circuit 51 does not generate an output.

When a failure such as an instantaneous power interruption occurs and the reset signal is not generated from the reset circuit 4, the state of any one of the flip-flop circuits FF1 to FFn is affected by the instantaneous power interruption and one of the states changes. When the state of one flip-flop circuit changes, a "1" output is generated from the fault detection circuit 51. This "1" signal is supplied to the OR circuit 52, and its output is supplied to the electronic circuit 7 and other block #2 as an initial setting signal, and is also input to each flip-flop circuit FF1 to FFn via the OR circuit 52. is set to the initial output pattern state.

Another block #2 also has the configuration of block #1, and the output of the OR circuit 52 of block #2 is supplied as one of the inputs of the OR circuit 52 of block #1. The output of the OR circuit 52 is input to the OR circuit 52 of block #2. In this embodiment, initial setting signals are supplied to each other between block #1 and block #2, but when many blocks operate on the same power supply, they each supply initial setting signals to other blocks. The initial setting unit can be changed by changing the connection relationship of the setting signals.

[0020]

[Effects of the Invention] According to the present invention, even if there is a temporary power outage (momentary power outage), the own block and other blocks are initialized autonomously, thereby preventing runaway programs or malfunctions. Can be done. Further, by supplying initial setting signals to other blocks, the operations of the blocks to which signals are mutually transferred are synchronized, so that malfunctions can be prevented. Furthermore, reliability can be improved by increasing the number of flip-flop circuits in the monitoring circuit. This makes it possible to improve the reliability of various devices such as exchanges and computers that do not have an external reset function.

[Brief explanation of drawings]

FIG. 1 is a basic configuration diagram of the invention.

FIG. 2 is a configuration diagram of an embodiment.

FIG. 3 is a configuration diagram of a conventional example.

[Explanation of symbols]

1 Power supply 2 Block 3 Initial setting circuit 4 Reset circuit 5 Monitoring circuit 50 Flip-flop circuit group 51
Fault detection circuit 6 OR circuit

Claims (1)

[Claims] 1. An initial value setting circuit for an apparatus comprising a plurality of blocks supplied with the same power, each block including a reset circuit that generates an output when a power outage is detected, wherein each block a monitoring circuit comprising a group of flip-flop circuits in which a specific pattern is set by the output of the circuit, and generating an output if the group of flip-flop circuits does not generate a specific pattern; and an output of the reset circuit;
an OR circuit that inputs the output of the monitoring circuit and an initial setting signal from another block; the output of the OR circuit is supplied as an initial setting signal within the own block; and the initial setting signal is transmitted to the other block. An initial value setting circuit comprising an output connection.