JPH0435693U - - Google Patents
Info
- Publication number
- JPH0435693U JPH0435693U JP1990076758U JP7675890U JPH0435693U JP H0435693 U JPH0435693 U JP H0435693U JP 1990076758 U JP1990076758 U JP 1990076758U JP 7675890 U JP7675890 U JP 7675890U JP H0435693 U JPH0435693 U JP H0435693U
- Authority
- JP
- Japan
- Prior art keywords
- output
- circuit
- differential amplifier
- control device
- secondary filter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Control Of Electric Motors In General (AREA)
Description
第１図、第２図はこの考案の一実施例に係り、
第１図は回路のブロツク図、第２図は各部動作波
形図、第３図は従来の回路ブロツク図である。
図において、１は位置指令、２は加算回路、３
は増幅回路、４は加算回路、５は補償回路、６は
加算回路、７は増幅回路、９はサーボモータ、１
５は符号反転回路である。なお、図中、同一符号
は同一、または相当部分を示す。
Figures 1 and 2 relate to an embodiment of this invention,
FIG. 1 is a block diagram of the circuit, FIG. 2 is a waveform diagram of the operation of each part, and FIG. 3 is a conventional circuit block diagram. In the figure, 1 is a position command, 2 is an addition circuit, and 3
is an amplifier circuit, 4 is an addition circuit, 5 is a compensation circuit, 6 is an addition circuit, 7 is an amplifier circuit, 9 is a servo motor, 1
5 is a sign inversion circuit. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
ボ制御装置において、位置指令を積分する１次遅
れ回路と、１次遅れ回路出力と速度検出器出力と
の差分を取り出す差動増幅器と、更に差動増幅器
出力を周波数選別し特定周波数のみ通過させる２
次フイルターと、２次フイルター出力を符号反転
させる符号反転回路を備えたことを特徴とするサ
ーボ制御装置の振動低減回路。 A servo control device having a position control loop and a speed control loop includes a first-order lag circuit that integrates a position command, a differential amplifier that extracts the difference between the first-order lag circuit output and the speed detector output, and a differential amplifier output. Frequency screening and passing only specific frequencies 2
A vibration reduction circuit for a servo control device, comprising a secondary filter and a sign inversion circuit for inverting the sign of the output of the secondary filter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990076758U JPH0435693U (en) | 1990-07-19 | 1990-07-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990076758U JPH0435693U (en) | 1990-07-19 | 1990-07-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0435693U true JPH0435693U (en) | 1992-03-25 |
Family
ID=31618517
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990076758U Pending JPH0435693U (en) | 1990-07-19 | 1990-07-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0435693U (en) |
-
1990
- 1990-07-19 JP JP1990076758U patent/JPH0435693U/ja active Pending
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