JPH043596Y2 - - Google Patents

Description

[Detailed description of the invention] <Industrial application field> The present invention relates to a synchronous rectifier circuit that converts an AC input signal into a DC signal whose phase is inverted depending on the direction of deviation and whose amplitude changes depending on the magnitude of the deviation. In particular, it relates to improvements in synchronous rectifier circuits aimed at improving output characteristics.

<Conventional technology> The conventional technology will be explained below with reference to the drawings.

FIG. 4 is a circuit diagram of a conventional synchronous rectifier circuit.
In Fig. 4, 1 is a synchronizer that outputs an AC input signal ω whose phase is reversed depending on the direction of the deviation α and whose amplitude changes depending on the magnitude of the deviation α. It is used when detecting the deviation from the azimuth angle. The rotor windings R ₁ and R ₂ of synchro 1 are
AC for exciting R ₁ and R ₂ is supplied from an AC synchronous signal generation circuit in a synchronous rectifier circuit, which will be described later.
When the synchro shaft rotates by a predetermined angle due to the deviation α, the synchro 1 generates an AC waveform shown by I between the stator windings S ₁ and S ₂ (the phase changes between the rotor windings R ₁ and R ₂
An alternating current input signal ω is generated having a phase difference determined by a comparison result with the phase of an alternating current supplied in between. 2 inputs the AC input signal ω from synchro 1 and outputs the DC signal μ
This synchronous rectifier circuit 2 has voltage dividing resistors R〓, R〓 whose resistance values are adjusted according to the value of the AC input signal ω, a transformer T, and the primary side of this transformer T. an AC synchronizing signal generating circuit E which is connected to output an AC synchronizing signal synchronized with the waveform of the AC input signal ω; It consists of switch elements Q ₁ and Q ₂ that perform switching operations alternately by the synchronization signal generation circuit E, and synchro 1 is connected from the midpoint A of voltage dividing resistors R〓 and R〓 and the midpoint B of switch elements Q ₁ and Q ₂ . It is configured to output a pulsating DC signal μ as shown by a solid line or a broken line, which is proportional to the magnitude of the input deviation α and whose polarity is reversed by the deviation α.

<Problems to be solved by the invention> The problem with the invention of the conventional synchronous rectifier circuit described above is that the output is a DC signal with many pulsations, so a complicated ripple filter is required to extract the DC component. is necessary. When synchro/periodic rectification is used to detect deviations in a servo system, it is desirable to increase the delay time of the ripple filter to obtain a DC signal with less pulsation in order to improve the S/N ratio of the system. However, this method is difficult to implement in practice because the stability of the system deteriorates.
When adjusting the gain of a servo system, a circuit that divides the DC signal is required, but since voltage dividing circuits are difficult to digitize, other extra circuits must be provided when considering connection to the CPU. This makes the product expensive. etc.

<Purpose of the invention> The present invention was made in view of the above-mentioned problems, and an object of the invention is to provide a synchronous rectifier circuit that is free from pulsation and delay and whose gain can be easily adjusted at a low cost.

<Means for Solving the Problems> In order to achieve the above-mentioned object, the means of the present invention provides an AC input whose phase is inverted depending on the direction of the deviation, whose phase is inverted depending on the direction, and whose amplitude changes depending on the magnitude of the deviation. In a synchronous rectifier circuit that inputs a signal and outputs a DC signal by rectifying the AC input signal based on an AC synchronization signal synchronized with the waveform of the AC input signal, the configuration of the synchronous rectification circuit is based on the AC synchronization signal. 1
A sample pulse generator that generates a sample pulse with a constant phase within a period, and a sample hold circuit that samples and holds an AC input signal based on the sample pulse.

<Example> Hereinafter, specific examples of the present invention will be described in detail using the drawings. In the following drawings, parts that overlap with those in FIG. 4 are given the same numbers, and their explanations will be omitted.

FIG. 1 is a block diagram of the synchronous rectifier circuit of the present invention.

In FIG. 1, 3 is a synchronous rectifier circuit of the present invention. The synchronous rectifier circuit 3 includes an AC synchronous signal generation circuit E, a transformer T, and a sample pulse generator 4 that generates sample pulses of a constant phase within one cycle of the AC synchronous signal inputted via the transformer T. AC input signal ω based on the sample pulse
and a sample and hold circuit 5 that samples and holds the DC signal δ and outputs a DC signal δ. In the configuration of the sample pulse generator 4 shown in FIG.
Rectifier circuit 4 consisting of diode D and resistor Rψ
1a, and a waveform shaping circuit 41b that shapes the waveform of the AC synchronizing signal rectified by the rectifying circuit 41a, and a waveform rectifying/shaping circuit 41 consisting of a waveform rectifying/shaping circuit 41 which shapes the waveform of the AC synchronizing signal rectified by the rectifying circuit 41a. The pulse generating means 42 is composed of, for example, a first monostable multivibrator (hereinafter referred to as "MM") 42a and a second MM 42b that generate sample pulses.

FIG. 2 is a time chart of the synchronous rectifier circuit 3 shown in FIG.

In FIG. 2, a is an AC synchronizing signal generating circuit E
b is the rectified waveform rectified by the rectifier circuit 41a, c is the shaped waveform shaped by the waveform shaping circuit 41b, and d is the first waveform.
Output pulse of MM42a, e is 1 of AC synchronization signal
The output pulse of the second MM 42b outputs a sample pulse with a constant phase θ during the period τ, f is the waveform of the AC input signal ω, and g is the waveform when the AC input signal ω is sampled by the sample hold circuit 5. .
As is clear from Figure 2, the sample pulse is 1
Since the signal is generated at a constant phase θ within the period τ, the output of the sample and hold circuit 5 is a non-pulsating DC signal δ.
It can be seen that even if the AC input signal ω changes, it follows every cycle, so no response delay occurs.

<Modification of Embodiment> In FIG. 1, if the configuration is such that the pulse width of the first MM 42a can be changed, the output of the sample and hold circuit 5 can be changed even when the AC input signal ω is constant, that is, Gain adjustment can be easily achieved. FIG. 3 is a concrete block diagram that makes it possible to realize digitalization of this gain control.

In FIG. 3, 42a' is a first modified MM composed of a clock generator _42a1 and a preset counter _42a2 ;
The pulse generation time width can be controlled by inputting digital data η from the CPU etc. to _2a2 .

Note that the sample pulse generator 4 is not limited to the circuit configuration shown in FIG. For example, the configuration of the waveform rectification/shaping circuit 41 is set to one side with a reference value (=
The waveform shown in FIG. 2c can also be obtained by constructing a comparator in which one terminal 0) is connected and an AC synchronizing signal is input to the other.
In short, the configuration of the sample pulse generator 4 is sufficient as long as it can generate sample pulses with a constant phase within one period.

<Effects of the invention> As described above in detail with specific examples of the invention, a sample pulse of a constant phase within one cycle of an AC synchronizing signal synchronized with the waveform of an AC input signal is generated, and this sample pulse is synchronized with the waveform of an AC input signal. The synchronous rectifier circuit of this invention, which samples and holds AC input signals based on pulses, can obtain DC signals without pulsation without using complex ripple filters, improving controllability when used in servo systems. do. or,
Digitization is easy. There are other effects.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram of the synchronous rectifier circuit of the present invention, Figure 2
The figure is a time chart of Fig. 1, Fig. 3 is a block diagram showing another embodiment of the present invention (in which digitalization of gain control can be realized), and Fig. 4 is a block diagram of a conventional synchronous rectifier circuit. It is a diagram. 1... Synchronous, 2, 3... Synchronous rectifier circuit, 4
...Sample pulse generator, 5...Sample hold circuit.

Claims (1)

[Claims for Utility Model Registration] A synchronizer that outputs an AC input signal of an AC waveform whose phase is reversed depending on the direction of deviation and whose amplitude changes depending on the magnitude of the deviation from between stator windings, and which excites the rotor winding of the synchro. A synchronizer comprising an AC synchronizing signal generation circuit that supplies an AC synchronizing signal synchronized with the waveform of the AC input signal, inputting the AC input signal from the synchronizer, rectifying it based on the AC synchronizing signal, and outputting a DC signal. In the rectifier circuit, a waveform rectification/shaping circuit that rectifies and shapes the waveform of the AC synchronization signal, and a pulse generator that generates sample pulses of a constant phase within one cycle of the AC synchronization signal based on the waveform rectification and shaped signal. A synchronous rectifier comprising: a sample pulse generator comprising a means for generating a pulse; and a sample hold circuit that samples and holds an AC input signal from the synchronizer based on the sample pulse and outputs a DC signal without pulsation. circuit.