JPH04365331A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH04365331A
JPH04365331A JP3140563A JP14056391A JPH04365331A JP H04365331 A JPH04365331 A JP H04365331A JP 3140563 A JP3140563 A JP 3140563A JP 14056391 A JP14056391 A JP 14056391A JP H04365331 A JPH04365331 A JP H04365331A
Authority
JP
Japan
Prior art keywords
pad
gate pad
semiconductor device
earth
drain pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3140563A
Other languages
Japanese (ja)
Inventor
Junichi Urabe
ト部 純一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3140563A priority Critical patent/JPH04365331A/en
Publication of JPH04365331A publication Critical patent/JPH04365331A/en
Pending legal-status Critical Current

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  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To reduce the occurrence of short inferiority by forming a metallic part for earth so that the top may be in the position lower than the respective tops of a drain pad and a gate pad. CONSTITUTION:A drain pad 1 and a gate pad 2 are made on one main surface of a semiconductor substrate 6 such as GaAs, etc., and it has a metallic part 4 for earth which surrounds a drain pad 1 and a gate pad 2 around the substrate 6 being processed lower than that face. Accordingly, the metallic part 4 for earth is made in the position lower than the drain pad 1 and the gate pad 2. Hereby, when connecting the drain pad 1 and the gate pad 2 to the outside terminal such as the strip lies, etc., on a package by a bonding wire, the interval between the bonding wire and the metallic part 4 for earth can be secured enough, and the occurrence of the short inferiority by the contact with the metallic part for earth can be reduced.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は半導体装置に関し、特に
高周波電力増幅用のガリウム砒素FET等のようにドレ
インパッドとゲートパッドの周囲に接地用金属部が形成
される半導体基板を有する半導体装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a semiconductor substrate in which a grounding metal portion is formed around a drain pad and a gate pad, such as a gallium arsenide FET for high frequency power amplification. .

【0002】0002

【従来の技術】高周波電力増幅用のガリウム砒素FET
等の半導体装置は、ガリウム砒素等の半導体の基板に金
属層を裏打ちしてヒートシンクとするPHS構造を有し
ている。
[Prior art] Gallium arsenide FET for high frequency power amplification
These semiconductor devices have a PHS structure in which a substrate of a semiconductor such as gallium arsenide is lined with a metal layer to serve as a heat sink.

【0003】従来のこの種の半導体装置は、図2に示す
ように、ガリウム砒素等の半導体の基板6の一主面にド
レインパッド1と、ゲートパッド2とを形成し、基板6
の周囲にドレインパッド1とゲートパッド2を囲む接地
用金属部4を有していた。そして、基板6の上面から接
地用金属部4の上面までの高さは、ドレインパッド1お
よびゲートパッド2のそれぞれの上面までの高さとほぼ
同一であった。また、ソース接地で使用するので、ソー
スパッド3は接地用金属部4に接続されていた。
As shown in FIG. 2, a conventional semiconductor device of this type has a drain pad 1 and a gate pad 2 formed on one main surface of a substrate 6 made of a semiconductor such as gallium arsenide.
It had a grounding metal part 4 surrounding the drain pad 1 and the gate pad 2. The height from the top surface of the substrate 6 to the top surface of the grounding metal part 4 was approximately the same as the height to the top surfaces of the drain pad 1 and gate pad 2, respectively. Further, since the source pad 3 is used with a grounded source, the source pad 3 is connected to a grounding metal part 4.

【0004】ドレインパッド1およびゲートパッド2に
は、ボンデイングワイヤ7により、接地用金属部4の上
面をまたいでパッケージ上のストリップライン等の外部
端子と接続していた。一般に、この種の半導体装置は高
周波特性を向上するため、不用インピーダンスとなるボ
ンデイングワイヤ7は可能な限り短くすることが要求さ
れる。また、パッケージも高周波特性を優先するととも
に、生産性やユーザ側における回路への適合性を考慮し
て、ストリップライン等の外部端子の高さがドレインパ
ッド1およびゲートパッド2よりも低い位置となる設計
がしばしば採用されていた。
[0004] The drain pad 1 and the gate pad 2 are connected to external terminals such as strip lines on the package by bonding wires 7 across the upper surface of the grounding metal part 4. Generally, in order to improve the high frequency characteristics of this type of semiconductor device, it is required that the bonding wire 7, which serves as unnecessary impedance, be made as short as possible. In addition, in addition to prioritizing high-frequency characteristics for the package, the height of external terminals such as strip lines is set lower than drain pad 1 and gate pad 2, considering productivity and compatibility with the user's circuit. design was often adopted.

【0005】[0005]

【発明が解決しようとする課題】上述した従来の半導体
装置は、ドレインパッドおよびゲートパッドをボンデイ
ングワイヤによりパッケージ上のストリップライン等の
外部端子と接続するときに、ボンデイングワイヤを可能
な限り短くする必要があり、また、ストリップライン等
の外部端子の位置が低い場合には、しばしば中間の接地
用金属部に接触し短絡不良を発生するという欠点を有し
ている。
[Problems to be Solved by the Invention] In the conventional semiconductor device described above, when connecting the drain pad and gate pad to external terminals such as strip lines on the package using bonding wires, it is necessary to make the bonding wires as short as possible. Furthermore, when the external terminal of a strip line or the like is located at a low position, it often comes into contact with an intermediate grounding metal part, resulting in a short circuit failure.

【0006】[0006]

【課題を解決するための手段】本発明の半導体装置は、
ドレインパッドとゲートパッドの周囲に接地用金属部が
形成される半導体基板を有する半導体装置において、こ
の接地用金属部の上面を前記ドレインパッドおよび前記
ゲートパッドのそれぞれの上面よりも低い位置となるよ
うに形成するものである。
[Means for Solving the Problems] A semiconductor device of the present invention includes:
In a semiconductor device having a semiconductor substrate in which a grounding metal portion is formed around a drain pad and a gate pad, the top surface of the grounding metal portion is located at a position lower than the respective top surfaces of the drain pad and the gate pad. It is to be formed.

【0007】[0007]

【実施例】次に、本発明の実施例について図面を参照し
て説明する。
Embodiments Next, embodiments of the present invention will be described with reference to the drawings.

【0008】図1は本発明の半導体装置の一実施例を示
す(A)は平面図および(B)はA−B線における模式
断面図である。
FIG. 1 shows an embodiment of the semiconductor device of the present invention, in which (A) is a plan view and (B) is a schematic cross-sectional view taken along the line AB.

【0009】本実施例の半導体装置は、図1に示すよう
に、ガリウム砒素等の半導体の基板6の一主面にドレイ
ンパッド1と、ゲートパッド2とを形成し、その面より
低く加工された基板6の周囲にドレインパッド1とゲー
トパッド2を囲む接地用金属部4を有している。したが
って、接地金属部4は、ドレインパッド1およびゲート
パッド2より低い位置に形成される。また、ソース接地
で使用するので、ソースパッド3は接地用金属部4に接
続されている。
As shown in FIG. 1, the semiconductor device of this embodiment has a drain pad 1 and a gate pad 2 formed on one main surface of a semiconductor substrate 6 made of gallium arsenide or the like, and is processed to be lower than that surface. A grounding metal portion 4 surrounding the drain pad 1 and gate pad 2 is provided around the substrate 6 . Therefore, ground metal portion 4 is formed at a lower position than drain pad 1 and gate pad 2. Further, since the source pad 3 is used with a grounded source, the source pad 3 is connected to a grounding metal part 4.

【0010】次に、本実施例の半導体装置の構造の形成
法について説明する。
Next, a method for forming the structure of the semiconductor device of this embodiment will be explained.

【0011】図3(A)〜(D)は、本実施例の半導体
装置の製造プロセスの一例を示すウエーハの一部の模式
部分断面図である。まず、(A)では、チップの境界6
1となる基板6の周辺部を約50μm残してソースパッ
ド3を含む基板6の全体をフォトレジスト5でマスキン
グする。次に、(B)に示すように、約10μmの深さ
でエッチングする。次に、(C)に示すように、フォト
レジスト5を除去し、再び第二のフォトレジスト51で
接地用金属部4を形成する周辺部以外の基板6の全体と
境界61の部分とをフォトレジスト5でマスキングする
。このとき、ソースパッド3の先端部の約5μmの部分
は接地用金属部4と接続するためマスキングを行なわな
いようにする。次に、(D)に示すように、金等の金属
層を厚さ約2μmになるように成長させる。フォトレジ
スト51を除去後、ウエーハを石英板に貼り付け、裏面
よりスクライブ部をエッチングし、裏面に金属層を成長
させるという裏面加工を行なう。裏面加工後、それぞれ
のチップごとに分離する。
FIGS. 3A to 3D are schematic partial cross-sectional views of a part of a wafer showing an example of the manufacturing process of the semiconductor device of this embodiment. First, in (A), the chip boundary 6
The entire substrate 6, including the source pad 3, is masked with a photoresist 5, leaving about 50 μm around the periphery of the substrate 6, which will become the source pad 3. Next, as shown in (B), etching is performed to a depth of approximately 10 μm. Next, as shown in (C), the photoresist 5 is removed, and the entire substrate 6 other than the peripheral area where the grounding metal part 4 is formed and the boundary 61 are covered with a second photoresist 51. Mask with resist 5. At this time, a portion of about 5 μm at the tip of the source pad 3 is not masked because it is connected to the grounding metal portion 4. Next, as shown in (D), a metal layer such as gold is grown to a thickness of about 2 μm. After removing the photoresist 51, the wafer is attached to a quartz plate, the scribe portion is etched from the back surface, and a metal layer is grown on the back surface, thereby processing the back surface. After processing the back side, separate each chip.

【0012】以上のようにして、ドレインパッド1とゲ
ートパッド2がある面より約約10μm低い位置に接地
用金属部4が形成される。
As described above, the grounding metal portion 4 is formed at a position approximately 10 μm lower than the surface where the drain pad 1 and gate pad 2 are located.

【0013】[0013]

【発明の効果】以上説明したように、本発明の半導体装
置は、接地用金属部の上面をドレインパッドおよびゲー
トパッドのそれぞれの上面よりも低い位置になるように
形成することにより、ドレインパッドおよびゲートパッ
ドをボンデイングワイヤによりパッケージ上のストリッ
プライン等の外部端子と接続するときに、ボンデイング
ワイヤと接地用金属部との間隔が十分確保されるので、
接地用金属部に接触し短絡不良を発生するという危険性
を大幅に低減できるという効果を有している。
As explained above, in the semiconductor device of the present invention, the upper surface of the grounding metal part is formed at a lower position than the upper surfaces of the drain pad and the gate pad, so that the drain pad and the gate pad are lower than each other. When connecting the gate pad to an external terminal such as a strip line on the package using a bonding wire, a sufficient distance is secured between the bonding wire and the grounding metal part.
This has the effect of greatly reducing the risk of contact with a grounding metal part and causing a short circuit.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】本発明の半導体装置の一実施例を示す平面図お
よび模式断面図である。
FIG. 1 is a plan view and a schematic cross-sectional view showing an embodiment of a semiconductor device of the present invention.

【図2】従来の半導体装置の一例を示す平面図および模
式断面図である。
FIG. 2 is a plan view and a schematic cross-sectional view showing an example of a conventional semiconductor device.

【図3】本実施例の半導体装置の製造プロセスの一例を
示すウエーハの一部の模式部分断面図である。
FIG. 3 is a schematic partial cross-sectional view of a part of a wafer showing an example of the manufacturing process of the semiconductor device of this example.

【符号の説明】[Explanation of symbols]

1    ドレインパッド 2    ゲートパッド 3    ソースパッド 4    接地用金属部 5,51    フォトレジスト 6    基板 61    境界 1 Drain pad 2 Gate pad 3 Source pad 4 Metal part for grounding 5,51 Photoresist 6 Board 61 Boundary

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  ドレインパッドとゲートパッドの周囲
に接地用金属部が形成される半導体基板を有する半導体
装置において、この接地用金属部の上面を前記ドレイン
パッドおよび前記ゲートパッドのそれぞれの上面よりも
低い位置となるように形成することを特徴とする半導体
装置。
1. In a semiconductor device having a semiconductor substrate in which a grounding metal portion is formed around a drain pad and a gate pad, the upper surface of the grounding metal portion is higher than the respective upper surfaces of the drain pad and the gate pad. A semiconductor device characterized in that it is formed at a low position.
JP3140563A 1991-06-13 1991-06-13 Semiconductor device Pending JPH04365331A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3140563A JPH04365331A (en) 1991-06-13 1991-06-13 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3140563A JPH04365331A (en) 1991-06-13 1991-06-13 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH04365331A true JPH04365331A (en) 1992-12-17

Family

ID=15271595

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3140563A Pending JPH04365331A (en) 1991-06-13 1991-06-13 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH04365331A (en)

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