JPH04366A - Lead frame material for semiconductor and production thereof - Google Patents
Lead frame material for semiconductor and production thereofInfo
- Publication number
- JPH04366A JPH04366A JP2287333A JP28733390A JPH04366A JP H04366 A JPH04366 A JP H04366A JP 2287333 A JP2287333 A JP 2287333A JP 28733390 A JP28733390 A JP 28733390A JP H04366 A JPH04366 A JP H04366A
- Authority
- JP
- Japan
- Prior art keywords
- plating
- base material
- lead frame
- copper alloy
- base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/456—Materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/04—Manufacture or treatment of leadframes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/456—Materials
- H10W70/457—Materials of metallic layers on leadframes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5525—Materials of bond wires comprising metals or metalloids, e.g. silver comprising copper [Cu]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
- H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S205/00—Electrolysis: processes, compositions used therein, and methods of preparing the compositions
- Y10S205/92—Electrolytic coating of circuit board or printed circuit, other than selected area coating
Landscapes
- Electroplating Methods And Accessories (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Solid-Phase Diffusion Into Metallic Material Surfaces (AREA)
Abstract
Description
【発明の詳細な説明】
[産業上の利用分野コ
本発明は半導体に使用されるリードフレーム材料及びそ
の製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a lead frame material used in semiconductors and a method for manufacturing the same.
[従来の技術]
従来より、導電性及び熱放散性の良さから各種銅合金材
料が半導体リードフレーム材料として使用されている。[Prior Art] Various copper alloy materials have been used as semiconductor lead frame materials due to their good conductivity and heat dissipation properties.
第1図はリードフレームを示す斜視図であり、第1図に
おいてリードフレーム(1)は半導体チップが載せられ
るグイバット部(2)、半導体チップとワイヤー(Au
線またはCu線)で結ばれるインナーリード部(3)、
及びプリント基板に接合されているアウターリード部(
4)からなる。FIG. 1 is a perspective view showing a lead frame. In FIG.
inner lead part (3) connected with wire or Cu wire),
and the outer lead part (
4).
この中で、通常インナーリード部(3)及びダイパッド
部(2)の半導体チップを載せる側の表面には厚さ4μ
m以上のAgめっき(5)が施されている。Among these, the surface of the inner lead part (3) and die pad part (2) on the side where the semiconductor chip is usually placed has a thickness of 4 μm.
Ag plating (5) of m or more is applied.
これは半導体チップとインナーリード部(3)とをAu
線またはCu1lで接続する、いわゆるワイヤーボンデ
ィングを行う場合、インナーリード部(3)にAgめっ
き(5)がないと接合強度のバラツキが大きく、信頼性
に欠けるからである。ダイパッド部(2)はAgめっき
(5)の必要はないが、インナーリード部(3)にだけ
Agめつき(5)を施すことが困難なため、グイバット
部(2)にもAgめつき(5)が施される。This is the case where the semiconductor chip and the inner lead part (3) are made of Au.
This is because when so-called wire bonding, which is a connection using a wire or Cu11, is performed, if the inner lead portion (3) does not have the Ag plating (5), the bonding strength will vary greatly and reliability will be lacking. The die pad part (2) does not need to be plated with Ag (5), but since it is difficult to apply Ag plating (5) only to the inner lead part (3), the die pad part (2) is also plated with Ag (5). 5) is applied.
[発明が解決しようとする課題]
しかし、上記のAgめっき加工には以下のような問題点
がある:
■高価なAgを4μ論以上の厚さでめっきするためにコ
ストが高くなる。[Problems to be Solved by the Invention] However, the above-mentioned Ag plating process has the following problems: ■ The cost increases because expensive Ag is plated to a thickness of 4 μm or more.
■Agめっきを行う場合、母材とAgめっきとの密着性
を高めるため、CuまたはNi下地めっきが施されるが
、この下地めっきはリードフレーム(1)の成形後全面
に施されるため、モールド後アウターリード部(4〉の
下地めっきをはがす必要がある。これはアウターリード
部(4)にはSnまたははんだめっきが行われるが、下
地めっきを施した上にSnまたははんだめっきを行うと
、下地めっきとの界面で剥離し易くなり、めっき信頼性
が低下するためである。■When performing Ag plating, a Cu or Ni base plating is applied to improve the adhesion between the base material and the Ag plating, but since this base plating is applied to the entire surface after the lead frame (1) is formed, After molding, it is necessary to peel off the base plating on the outer lead part (4). This is because Sn or solder plating is applied to the outer lead part (4), but if Sn or solder plating is applied on top of the base plating, This is because it becomes easy to peel off at the interface with the underlying plating, reducing plating reliability.
このため、厚いAgめつきを行わず、母材表面のインナ
ーリード部に直接Au線またはCu線を接合する、いわ
ゆるタイレフトワイヤーボンディング可能な材料が求め
られている。現在、一部ではCu線を直接リードフレー
ムに接続することが実施されているが、現状では信頼性
があまり要求されない半導体に限定されており、高い信
頼性が要求される大部分の半導体については、まだ実施
されていない。Therefore, there is a need for a material that allows so-called tie-left wire bonding, in which Au or Cu wires are bonded directly to the inner lead portions on the surface of the base material without thick Ag plating. Currently, in some cases, Cu wires are connected directly to lead frames, but this is currently limited to semiconductors that do not require high reliability, and is not applicable to most semiconductors that require high reliability. , has not yet been implemented.
本発明は、上記のような問題点を解決するため、高信頼
性のダイレクトワイヤーボンディングが可能なリードフ
レーム材料を安価に提供することを目的としている。In order to solve the above-mentioned problems, the present invention aims to provide a lead frame material capable of highly reliable direct wire bonding at low cost.
[課題を解決するための手段]
本発明の半導体リードフレーム材料は、銅合金母材表面
にAgを0.005〜0.5μ輪の厚さにめっきした後
、熱処理によりAgを銅合金母材中に拡散させることに
より得られる層を該母材表面に有することを特徴とする
。[Means for Solving the Problems] The semiconductor lead frame material of the present invention is produced by plating Ag on the surface of a copper alloy base material to a thickness of 0.005 to 0.5 μm, and then heat-treating the surface of the copper alloy base material to plate Ag. It is characterized by having a layer on the surface of the base material obtained by diffusion into the base material.
また、本発明の半導体リードフレーム材料の製造方法は
、最終圧延後の銅合金母材の表面に厚さ0.005〜0
.5μ論のAgめつきを施した後、熱処理によりAgを
銅合金母材中に拡散させることにより得られる層を該銅
合金母材表面に形成することを特徴とする。In addition, the method for manufacturing a semiconductor lead frame material of the present invention provides that the surface of the copper alloy base material after final rolling has a thickness of 0.005 to 0.
.. The method is characterized in that after 5 μm Ag plating is applied, a layer obtained by diffusing Ag into the copper alloy base material by heat treatment is formed on the surface of the copper alloy base material.
更に、本発明の半導体リードフレーム材料の製造方法は
、最終圧延後の銅合金母材の表面を電解研磨し、次に、
該表面に厚さ0.005〜0.5μ論のAgめっきを施
した後、熱処理によりAgを銅合金母材中に拡散させる
ことにより得られる層を該銅合金母材表面に形成するこ
とを特徴とする。Furthermore, the method for manufacturing a semiconductor lead frame material of the present invention includes electrolytically polishing the surface of the copper alloy base material after final rolling, and then
After applying Ag plating to a thickness of 0.005 to 0.5μ on the surface, a layer obtained by diffusing Ag into the copper alloy base material by heat treatment is formed on the surface of the copper alloy base material. Features.
Agは導電性が最も高く、貴金属として酸化しにくい金
属として知られており、前記のようにワイヤーボンディ
ングにおけるリードフレーム側の接合金属として広く使
用されているが、Agめつきのように単独層を造らなく
ても、銅合金中にある濃度以上含有されていれば、酸化
を抑制し、表面の清浄度を改善する効果がある。Ag is known to have the highest electrical conductivity and is a precious metal that is resistant to oxidation.As mentioned above, it is widely used as a bonding metal on the lead frame side in wire bonding, but it is not possible to create a single layer as in Ag plating. Even if it is not present, if it is contained in the copper alloy at a certain concentration or more, it has the effect of suppressing oxidation and improving surface cleanliness.
また、銅合金は製造工程において、最終焼鈍後にパフ研
磨などの機械的研磨を行う場合もあるが、これは、焼鈍
中に非酸化雰囲気が完全でない場合に、焼鈍により形成
される表面の厚い酸化物を機械的に削り取るためである
。しかし、この機械的研磨を行うと、第2図(a)に示
すように、銅合金(6)の表面にはパリ(7)が形成さ
れる。このパリ(7)は圧延ににより押し潰されて、第
2図(b)に示すように、材料表面に微細な隙間(8)
を形成する。In addition, during the manufacturing process, copper alloys are sometimes subjected to mechanical polishing such as puff polishing after final annealing, but this is because the thick oxidation on the surface formed by annealing occurs when the non-oxidizing atmosphere is not completely formed during annealing. This is for mechanically scraping things off. However, when this mechanical polishing is performed, as shown in FIG. 2(a), holes (7) are formed on the surface of the copper alloy (6). This gap (7) is crushed by rolling, and as shown in Figure 2 (b), minute gaps (8) are formed on the material surface.
form.
この表面の隙間(8)は、機械的研磨の方法及び最終圧
延の加工率により大きく変わる。その中で、隙間(8)
が大きい場合、油・脱脂液などの処理液が隙間(8)に
残存するため、ワイヤーボンディングを行った場合の接
合部の強度や、めっきを行った場合のめっき密着性に悪
影響を及ぼす。This surface gap (8) varies greatly depending on the mechanical polishing method and the processing rate of the final rolling. Among them, the gap (8)
If this is large, treatment liquids such as oil and degreasing liquid remain in the gap (8), which adversely affects the strength of the joint when wire bonding is performed and the plating adhesion when plating is performed.
ところが電解研磨はパリ(7)を優先的に溶かす作用が
あるため、本発明では銅合金母材が第2図(b)のよう
な表面状態の場合には、最終圧延後の銅合金(6)の表
面を電解研磨することにより、表面の1μm程度の微細
なパリ(7)を除去し、材料表面の改善を行うことも可
能である。最終圧延後の電解研磨により、銅合金(6)
の表面は第2図(c)に示すように、パリ(7)が取り
除かれ、平滑な表面(9)が形成される。However, since electrolytic polishing has the effect of preferentially melting the Paris (7), in the present invention, when the copper alloy base material has a surface condition as shown in Figure 2(b), the copper alloy (6) after the final rolling is ) By electrolytically polishing the surface of the material, it is also possible to remove minute particles (7) of about 1 μm on the surface and improve the material surface. Copper alloy (6) is produced by electrolytic polishing after final rolling.
As shown in FIG. 2(c), the surface (7) is removed and a smooth surface (9) is formed.
次に、本発明では銅合金の表面に、厚さ0.005〜0
.5μmのAgめっきを施し、熱処理してAgを母材中
に拡散させる。このとき銅合金母材表面に、0.005
〜0.5μ顛のAgめっきを施すだけでは、ピンホール
も多く、機械的にも簡単に削り取られて母材が現れるが
、熱処理により母材中に拡散させることにより、均質な
Agを含む層が母材表面に形成される。熱処理の温度、
時間等の条件は、銅合金の種類などによって相違するが
、Agが母材中に拡散する範囲であればよい。Agめっ
きの厚さは、下限を0.005μ繭とし、上限は厚いと
コストが高くなるため0.5μ預とじた。Next, in the present invention, the surface of the copper alloy is coated with a thickness of 0.005 to 0.
.. 5 μm Ag plating is applied and heat treated to diffuse Ag into the base material. At this time, 0.005
If only ~0.5 μm of Ag plating is applied, there will be many pinholes and it will be easily scraped off mechanically to reveal the base material, but by diffusing it into the base material through heat treatment, a homogeneous Ag-containing layer will be created. is formed on the surface of the base material. heat treatment temperature,
Conditions such as time vary depending on the type of copper alloy, etc., but may be within a range where Ag can be diffused into the base material. The lower limit of the thickness of the Ag plating was set at 0.005 μm, and the upper limit was set at 0.5 μm because the thicker the layer, the higher the cost.
また、母材表面に機械的研磨に起因する隙間がある場合
には、Agめつきを施す前に、電解研磨を行い表面を平
滑にする。Furthermore, if there are gaps on the surface of the base material due to mechanical polishing, electrolytic polishing is performed to smooth the surface before applying Ag plating.
このように銅合金表面にAgめつきを行った後、熱処理
によりAgを母材中に拡散させることにより、ダイレク
トワイヤーボンディング性に優れ、且つ安価なリードフ
レーム材料を提供できる。After the copper alloy surface is plated with Ag in this manner, Ag is diffused into the base material by heat treatment, thereby providing an inexpensive lead frame material with excellent direct wire bonding properties.
[作 用]
Agめっき後、熱拡散を行った層は、従来の銅合金に比
較してAgを含有するため酸化されにくく、清浄な表面
を形成する。このため、ダイレクトワイヤーボンディン
グを行った場合でも、厚さ4μm以上の厚いAgめつき
と同等のボンディング信頼性を示す。また、通常のめっ
きと異なり、母材中にAgを拡散させるため、めっき層
の剥離を心配する必要がない。このため下地めっきをす
る必要がなく、モールド後の下地めっき剥離工程を省略
することができる。さらに、素材の段階でめっき加工が
でき、且つ極薄いAgめっきを施すだけなので、材料及
び加工費が安く、低コストである。[Function] The layer subjected to thermal diffusion after Ag plating contains more Ag than conventional copper alloys, so it is less likely to be oxidized and forms a clean surface. Therefore, even when direct wire bonding is performed, the bonding reliability is equivalent to that of thick Ag plating with a thickness of 4 μm or more. Also, unlike normal plating, since Ag is diffused into the base material, there is no need to worry about peeling of the plating layer. Therefore, there is no need to perform base plating, and the process of peeling off the base plating after molding can be omitted. Furthermore, since plating can be performed at the raw material stage and only an extremely thin Ag plating is applied, material and processing costs are low, resulting in low costs.
また、電解研磨は機械的研磨に起因する母材表面のパリ
、隙間を取り除き平滑な表面を形成することも可能であ
り、このため、電解研磨をAgめつき前に行うことによ
り、母材の表面状態に拘わらず、信頼性の高いダイレク
トワイヤーボンディングを行うことができる。In addition, electrolytic polishing can remove the cracks and gaps on the base material surface caused by mechanical polishing and form a smooth surface. Therefore, by performing electrolytic polishing before Ag plating, the base material can be polished. Highly reliable direct wire bonding can be performed regardless of the surface condition.
[実 施 例]
以下、本発明の実施例について説明する。実施例中、銅
合金の組成の%は重量%である。[Examples] Examples of the present invention will be described below. In the examples, percentages of copper alloy compositions are percentages by weight.
代表的なリードフレーム用銅合金であるCA151(0
,1%Zr、残部不可避不純物及びCu)
CA195(2,5%Fe、02%Zr、残部不可避不
純物及びCu)
MP202(2,0%Sn、0.2%Ni、残部不可避
不純物及びCu)
を母材とし、これを厚さ0.25mmとなるように仕上
圧延して脱脂し、厚さ0.005μmまたは0.1μm
のAgめっきを施し、300℃で2時間加熱処理し、プ
レスにより成形加工したものを試料(実施例1〜4)と
した。CA151 (0) is a typical copper alloy for lead frames.
, 1% Zr, remainder unavoidable impurities and Cu) CA195 (2.5% Fe, 0.2% Zr, remainder unavoidable impurities and Cu) MP202 (2.0% Sn, 0.2% Ni, remainder unavoidable impurities and Cu) This is used as a base material, finish rolled and degreased to a thickness of 0.25 mm, and the thickness is 0.005 μm or 0.1 μm.
Samples (Examples 1 to 4) were prepared by applying Ag plating, heat treating at 300° C. for 2 hours, and molding by pressing.
比較例として、上J己工程のうちAgめつき及び熱処理
を行わない素材そのままのもの(比較例1〜3)、熱処
理を行わないもの(比較例4)、仕上圧延、脱脂、成形
加工後厚さ0.3μ論のCu下地めっき及び厚さ5μm
のAgめっきを施した従来品(比較例5〜7)を同様に
作成した。As comparative examples, materials as they are without Ag plating and heat treatment (Comparative Examples 1 to 3), materials without heat treatment (Comparative Example 4), and thickness after finishing rolling, degreasing, and forming processing. Cu underplating with a thickness of 0.3 μm and a thickness of 5 μm
Conventional products (Comparative Examples 5 to 7) with Ag plating were similarly prepared.
上記により作成した実施例と比較例の試料について、下
記試験条件でワイヤーボンディングの信頼性比較試験を
行った。A wire bonding reliability comparison test was conducted on the samples of Examples and Comparative Examples prepared above under the following test conditions.
試験条件
■ボンディング条件
接合荷重: 50gf
ステージ温度=250℃
超音波比カニ0.2W
超音波印加時間:50m5ec
雰囲気二N2
ワイヤー φ25μm
■評価
ボンディング直後及びヒートサイクル試験後のプル試験
による破断強度及び次式に示すワイヤー破断率をもって
評価した。N=20実施した。Test conditions ■Bonding conditions Bonding load: 50gf Stage temperature = 250℃ Ultrasonic ratio 0.2W Ultrasonic application time: 50m5ec Atmosphere 2N2 Wire φ25μm ■Evaluation Breaking strength by pull test immediately after bonding and after heat cycle test and the following formula Evaluation was made using the wire breakage rate shown in . N=20 tests were conducted.
■ビートサイクル試験 サイクル条件、−30℃×30分←→80℃×30分 サイクル回数=500回 試験結果を第1表に示す。■Beat cycle test Cycle conditions: -30°C x 30 minutes ←→80°C x 30 minutes Number of cycles = 500 times The test results are shown in Table 1.
第1表の結果より、実施例1〜4のものは、破断強度で
はボンディング直後及びヒートサイクル試験後ともに比
較例5〜7の厚Agめっき材と同等の値を示し、比較例
1〜3の素材に比較して大幅な改善が認められた。また
、ワイヤー破断率では実施例1〜4のものは、ボンディ
ング直後及びヒートサイクル試験後ともに100%と、
比較例1〜3の素材の5〜20%に比較して大幅な改善
が認められた。実施例5の電解研磨を施したものは、母
材の表面状態に拘わらず、実施例1〜4と同等の信頼性
を示し、電解研磨の効果を実証した。From the results in Table 1, Examples 1 to 4 showed values equivalent to the thick Ag plating materials of Comparative Examples 5 to 7 in terms of breaking strength both immediately after bonding and after the heat cycle test, and that of Comparative Examples 1 to 3. A significant improvement was observed compared to the original material. In addition, the wire breakage rate of Examples 1 to 4 was 100% both immediately after bonding and after the heat cycle test.
A significant improvement was observed compared to the 5 to 20% of the materials of Comparative Examples 1 to 3. The electrolytically polished sample of Example 5 showed the same reliability as Examples 1 to 4 regardless of the surface condition of the base material, demonstrating the effect of electrolytic polishing.
比較例4の熱処理を行わないものは、ボンディング直後
では実施例と同等の信頼性を示したが、ヒートサイクル
試験後ては信頼性の低下が認められた。Comparative Example 4, which was not subjected to heat treatment, showed the same reliability as the Example immediately after bonding, but a decrease in reliability was observed after the heat cycle test.
以上の結果より、本発明のように0.005μ釦以上の
Agめっきを行い、めっき後Agを母材中に拡散させる
熱処理が必要であることがわかる。From the above results, it can be seen that it is necessary to perform Ag plating with a thickness of 0.005μ or more as in the present invention, and to perform heat treatment to diffuse Ag into the base material after plating.
また、母材の表面状態によっては、Agめつきの前に電
解研磨を行うことが効果的であることがわかる。Furthermore, it can be seen that it is effective to perform electrolytic polishing before Ag plating depending on the surface condition of the base material.
[発明の効果]
以上のように、本発明によれば、銅合金の表面に所定の
厚さのAgめつきを施した後、熱処理によりAgを母材
中に拡散させ、また、母材の表面状況によってはその製
造工程に電解研磨を施すことにより、信頼性に優れ、且
つ安価なリードフレーム材料を製造することができる。[Effects of the Invention] As described above, according to the present invention, after the surface of a copper alloy is plated with Ag to a predetermined thickness, Ag is diffused into the base material by heat treatment, and the base material is Depending on the surface condition, by applying electrolytic polishing to the manufacturing process, a highly reliable and inexpensive lead frame material can be manufactured.
第1図はリードフレームの斜視図であり、第2図(a)
〜(c)は銅合金の表面を模式的に示す断面図である。
図中、1・・・リードフレーム、2・・ダイパッド、3
・・・インナーリード部、4・・・アウターリード部、
5・・・Agめっき、6・・・銅合金、7・・パリ、8
・・・隙間。
なお、各図中、同一符号は同一または相当部分を示す。Fig. 1 is a perspective view of the lead frame, and Fig. 2(a)
~(c) is a cross-sectional view schematically showing the surface of a copper alloy. In the figure, 1...Lead frame, 2...Die pad, 3
... Inner lead part, 4... Outer lead part,
5...Ag plating, 6...Copper alloy, 7...Paris, 8
···gap. In each figure, the same reference numerals indicate the same or corresponding parts.
Claims (1)
銅合金母材表面にAgを0.005〜0.5μmの厚さ
にめっきした後、熱処理によりAgを銅合金母材中に拡
散させることにより得られる層を該母材表面に有するこ
とを特徴とする半導体リードフレーム材料。2.半導体
に使用されるリードフレーム材料の製造方法において、
最終圧延後の銅合金母材の表面に厚さ0.005〜0.
5μmのAgめっきを施した後、熱処理によりAgを銅
合金母材中に拡散させることにより得られる層を該銅合
金母材表面に形成することを特徴とする半導体リードフ
レームの製造方法。 3.半導体に使用されるリードフレーム材料の製造方法
において、最終圧延後の銅合金母材の表面を電解研磨し
、次に、該表面に厚さ0.005〜0.5μmのAgめ
っきを施した後、熱処理によりAgを銅合金母材中に拡
散させることにより得られる層を該銅合金母材表面に形
成することを特徴とする半導体リードフレームの製造方
法。[Claims] 1. In lead frame materials used in semiconductors,
It is characterized by having a layer on the surface of the copper alloy base material obtained by plating Ag to a thickness of 0.005 to 0.5 μm on the surface of the copper alloy base material and then diffusing Ag into the copper alloy base material through heat treatment. Semiconductor lead frame materials. 2. In the manufacturing method of lead frame materials used in semiconductors,
The surface of the copper alloy base material after final rolling has a thickness of 0.005 to 0.
A method for manufacturing a semiconductor lead frame, which comprises applying 5 μm Ag plating and then forming a layer obtained by diffusing Ag into the copper alloy base material through heat treatment on the surface of the copper alloy base material. 3. In a method for manufacturing lead frame materials used in semiconductors, the surface of a copper alloy base material after final rolling is electrolytically polished, and then Ag plating with a thickness of 0.005 to 0.5 μm is applied to the surface. A method for manufacturing a semiconductor lead frame, which comprises forming a layer obtained by diffusing Ag into a copper alloy base material through heat treatment on the surface of the copper alloy base material.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019910004698A KR950002746B1 (en) | 1990-04-16 | 1991-03-25 | Method of producing lead frame material |
| US07/680,835 US5167794A (en) | 1990-04-16 | 1991-04-05 | Method for producing lead frame material |
| DE4112416A DE4112416A1 (en) | 1990-04-16 | 1991-04-16 | LADDER FRAME MATERIAL FOR A SEMICONDUCTOR AND METHOD FOR PRODUCING THE LADDER FRAME MATERIAL |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2-97626 | 1990-04-16 | ||
| JP9762690 | 1990-04-16 | ||
| JP2-106215 | 1990-04-21 | ||
| JP10621590 | 1990-04-21 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04366A true JPH04366A (en) | 1992-01-06 |
| JP2542735B2 JP2542735B2 (en) | 1996-10-09 |
Family
ID=26438792
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2287333A Expired - Fee Related JP2542735B2 (en) | 1990-04-16 | 1990-10-26 | Semiconductor lead frame material and manufacturing method thereof |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP2542735B2 (en) |
| KR (1) | KR950002746B1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20030070657A (en) * | 2002-02-26 | 2003-09-02 | 주식회사 하이닉스반도체 | leadframe and method for manufacturing semiconductor package using it |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5916965A (en) * | 1982-07-20 | 1984-01-28 | Hitachi Cable Ltd | Preparation of heat resistant plating material |
| JPS60105259A (en) * | 1983-11-11 | 1985-06-10 | Hitachi Cable Ltd | Lead frame material for semiconductor apparatus |
| JPS62118554A (en) * | 1985-11-19 | 1987-05-29 | Mitsubishi Electric Corp | Manufacture of semiconductor frame |
| JPS6417841A (en) * | 1987-07-13 | 1989-01-20 | Kobe Steel Ltd | Lead frame material for semiconductor |
| JPH0254956A (en) * | 1988-08-19 | 1990-02-23 | Mitsubishi Electric Corp | Lead frame manufacturing method |
-
1990
- 1990-10-26 JP JP2287333A patent/JP2542735B2/en not_active Expired - Fee Related
-
1991
- 1991-03-25 KR KR1019910004698A patent/KR950002746B1/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5916965A (en) * | 1982-07-20 | 1984-01-28 | Hitachi Cable Ltd | Preparation of heat resistant plating material |
| JPS60105259A (en) * | 1983-11-11 | 1985-06-10 | Hitachi Cable Ltd | Lead frame material for semiconductor apparatus |
| JPS62118554A (en) * | 1985-11-19 | 1987-05-29 | Mitsubishi Electric Corp | Manufacture of semiconductor frame |
| JPS6417841A (en) * | 1987-07-13 | 1989-01-20 | Kobe Steel Ltd | Lead frame material for semiconductor |
| JPH0254956A (en) * | 1988-08-19 | 1990-02-23 | Mitsubishi Electric Corp | Lead frame manufacturing method |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20030070657A (en) * | 2002-02-26 | 2003-09-02 | 주식회사 하이닉스반도체 | leadframe and method for manufacturing semiconductor package using it |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2542735B2 (en) | 1996-10-09 |
| KR950002746B1 (en) | 1995-03-24 |
| KR910019191A (en) | 1991-11-30 |
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| LAPS | Cancellation because of no payment of annual fees |