JPH04367231A - Manufacture of thin-film semiconductor device - Google Patents

Abstract

PURPOSE:To provide a thin-film semiconductor device such as a thin-film transistor or the like wherein it is stable from the viewpoint of its manufacturing process, the resistance value of a source and a drain is small and a leakage current between the source and the drain is small by a method wherein a high- concentration impurity region, for the source and the drain, which has been formed by an ion implantation operation is recrystallized quickly. CONSTITUTION:In the manufacturing method of a thin-film semiconductor device, impurity atoms are ion-implanted into a single-crystal semiconductor 120 formed to be an island shape on an insulating substrate, a heat treatment is then executed, and a source region and a drain region 121, 122 are formed on the whole of the film thickness of the single-crystal semiconductor. The manufacturing method of the thin-film semiconductor device is featured in such a way that ions are implanted excluding a definite region 122-2 including the side face of the island-shaped single crystal 120 surrounding the source and the drain 121, 122.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to thin film semiconductor devices, and more particularly to a method for manufacturing a thin film transistor in which a single crystal semiconductor layer is formed in the form of an island on an insulating substrate.

0002

2. Description of the Related Art Thin film transistors are latch-up free, have small parasitic capacitance, and have high processing speed. In particular, thin film transistors with a semiconductor layer of about 1000 Å or less have characteristics such as a large current driving ability, and therefore semiconductor-related companies have been actively researching and developing them.

[0003] In recent years, as the capacity of active matrix displays has increased, there has been a desire for device technology that allows not only switching elements in pixel sections but also peripheral drive circuits to be fabricated monolithically. There is a demand for high-performance thin film transistors based on

0004

[Problems to be Solved by the Invention] Conventionally, however, when forming the high concentration impurity regions constituting the source and drain in the above-mentioned thin film transistor by ion implantation, compared to the process for transistors formed in bulk semiconductors, ion implantation is required. There is a problem in that it is difficult to recrystallize the highly concentrated impurity region that has become amorphous by heat treatment.

Furthermore, for application to the active matrix display, a lower temperature manufacturing process has been desired in order to avoid destruction of the substrate due to thermal stress and to reduce substrate cost. Recrystallization by the heat treatment has become increasingly difficult due to lower temperatures.

[0006] This is because, in bulk semiconductors, recovery of crystallinity is achieved by solid phase epitaxy occurring due to atomic arrangement information in crystal regions that have not undergone ion implantation on the bottom and side surfaces of high concentration impurity regions. On the other hand, since the thickness of the semiconductor layer in a thin film transistor is extremely thin, recovery of crystallinity is performed using atomic arrangement information of the crystalline region that has not undergone ion implantation on the side surface with a small cross-sectional area of the high concentration impurity region in contact with the channel region. This is because it takes a very long time for crystal recovery.

[0007] For this reason, crystal nuclei spontaneously generate and grow in areas far from the crystalline region, so in many cases,
The implanted impurities become polycrystals that are segregated in large quantities at grain boundaries, increasing the resistance of the source and drain.
There is a problem in that the blocking ability for minority carriers decreases, resulting in an increase in leakage current.

[0008] Particularly in low-temperature processes, the rate of recovery of crystallinity due to the solid-phase epitaxy is slow, so the portion that recovers as a single crystal is limited to the vicinity of the junction between the channel portion and the high-concentration impurity region, and the rest is multi-crystalline. It remained as a crystalline region.

For this reason, minority carriers generated in the polycrystalline region pass through the region recovered as a single crystal as a diffusion current, increasing leakage current.

Alternatively, the metal electrodes of the source and drain electrodes diffuse into the high concentration impurity region through the grain boundaries of the polycrystal, and the minority carriers thermally released from the diffused metal diffuse the region recovered as the single crystal. passed as a diffusion current, which also increased the leakage current.

Furthermore, the diffusion of the metal electrode as described above is
This caused deterioration of the surface properties of the source and drain electrodes and caused disconnection.

[0012] Furthermore, due to polycrystalization of the source and drain portions, the resistance values of the source and drain become large, resulting in a problem that the current driving ability of the thin film transistor cannot be sufficiently increased.

[0013]

OBJECTS OF THE INVENTION In view of the above-mentioned problems, an object of the present invention is to quickly recrystallize high concentration impurity regions of sources and drains formed by ion implantation.
It is an object of the present invention to provide a thin film semiconductor device such as a thin film transistor that is stable in a manufacturing process, has a low resistance value of a source and a drain, and has a low leakage current between the source and drain.

[0014]

[Means for Solving the Problems] As a means for solving the above-mentioned problems, the present invention provides a method of ion-implanting impurity atoms into a single crystal semiconductor formed in an island shape on an insulating substrate, and then subjecting it to heat treatment. In the method for manufacturing a thin film semiconductor device in which source and drain regions are formed over the entire film thickness of the single crystal semiconductor, the ion implantation is performed in a region other than a certain region including a side surface of the island-shaped single crystal surrounding the source and drain. The present invention provides a method for manufacturing a thin film semiconductor device characterized by performing the following steps.

[0015] Furthermore, the source without the ion implantation,
The shape of the interface between a certain region including the side surface of the island-shaped single crystal surrounding the drain and the region to which ions are implanted is uneven, and the island-shaped region surrounding the source and drain is A certain region on the side surface of the single crystal and a channel region are separated by a blocking region where the ion implantation is performed, and the region where the ion implantation is performed separates a certain region on the side surface of the single crystal and the channel region, and the region where the ion implantation is performed surrounds the source and the drain. A thin film semiconductor device characterized in that a distance between a certain region on a side surface of an island-shaped single crystal and a channel region is larger than a diffusion length of minority carriers that the region where the ion implantation is performed has due to a subsequent activation treatment. The manufacturing method is used as a means.

[0016]

[Operation] According to the structure of the semiconductor device of the present invention, since the ion-implanted amorphous region is surrounded by the crystalline region, when the drain region and the source region are recrystallized by heat treatment, the amorphous region is recrystallized from all sides. , recrystallization can be performed in a shorter time than conventional methods.

This is because the recrystallization rate is almost constant with respect to time, so in the conventional structure where the amorphous region is in contact with the crystalline region only in one direction, the recrystallization rate is only the first power of the heat treatment time. This is because, while the amorphous region does not decrease, according to the means of the present invention, the area of the region remaining in an amorphous state decreases as the square of the heat treatment time.

[0018] Further, during heat treatment, a large number of crystal nuclei are generated in the amorphous region, and the polycrystalline region grows only after a kind of ripening time, and the region remaining in the amorphous state Since the area of the polycrystalline region is proportional to the area of the crystalline region, the probability that a polycrystalline region will grow into the crystalline region decreases dramatically as the time for crystallizing the amorphous region decreases.

As described above, according to the recrystallization method according to the present invention, the heat treatment time can be significantly shortened, and the crystallinity of the drain region and source region can be dramatically improved.

Furthermore, the heat treatment time can be further shortened by making the ion-implanted amorphous region have an uneven shape and increasing the contact area with the non-ion-implanted crystalline region. In addition, the amorphous region into which impurities are ion-implanted at a high concentration is extended in the channel width direction to the side surface of the island-shaped semiconductor layer at the portion in contact with the channel region, so that the crystalline region and the channel region are not in direct contact with each other. To,
By forming the blocking region, leakage current between the source and drain due to thermally generated current can be reduced.

Further, the width of the blocking region needs to be larger than the diffusion length of minority carriers that the region into which the ion implantation is performed will have due to subsequent activation processing.

[0022]Thereby, the thermally generated current generated in the depletion layer at the junction between the high concentration impurity region constituting the source and drain regions and the crystal region is transferred within the crystal region by the high concentration impurity region and the blocking region. becomes trapped and disappears.

As described above, according to the present invention, it is possible to construct source and drain regions that have low leakage current, good crystallinity, sufficiently low resistance, and are stable even in the manufacturing process of thin film transistors.

(Embodiment Example 1) An embodiment example of the present invention will be described below. FIG. 1A is a schematic perspective view showing the schematic structure of a thin film transistor as a semiconductor device of the present invention. In the figure, 110 is an insulating substrate, 120
is a semiconductor layer formed in an island shape, 121 and 122 are source or drain regions, respectively, 123 is a channel region,
130 is a gate insulating layer, and 140 is a gate electrode.

A glass substrate such as fused silica glass or a crystalline insulating substrate such as sapphire is used for the insulating substrate 110, and the semiconductor layer 120 is made of Si, SiC, SiGe, etc.
, GaAs, CdS, CdSe, etc. are used.

FIG. 1(b) is a detailed view of the drain region or source region, where 122-1 is an amorphous region into which impurity ions have been implanted, and 122-1 is an amorphous region.
Reference numeral 2 denotes a crystal region that was covered with a resist and was not reached by impurity ions during the ion implantation.

When the drain region and source region in such a state are recrystallized by heat treatment, the amorphous region 122-1 is surrounded by the crystalline region 122-2, so it is recrystallized from all sides, and the recrystallization rate is Since it is approximately constant with respect to time, the area of the region remaining in an amorphous state decreases as the square of the heat treatment time. On the other hand, in the conventional recrystallization method, the amorphous region 122-1 contacts the crystal region 122-2 only in one direction.
It decreases only by the first power of the heat treatment time.

[0028] Furthermore, during heat treatment, a large number of crystal nuclei are generated in the amorphous region and a polycrystalline region grows after a kind of ripening time, and the region remaining in the amorphous state Since the area of the polycrystalline region is proportional to the area of the crystalline region, the probability that a polycrystalline region will grow into the crystalline region decreases dramatically as the time for crystallizing the amorphous region decreases.

As described above, according to the recrystallization method according to the present invention, the heat treatment time can be significantly shortened, and the crystallinity of the drain region and the source region can be dramatically improved.

(Embodiment 2) FIG. 2 is a schematic perspective view of a source or drain portion showing another embodiment of the present invention. In this embodiment, the crystal region 222-2 has a comb-like uneven shape, and the contact area with the amorphous region 222-1 is larger than in the first embodiment. Therefore, the above-described heat treatment time can be further shortened.

In the embodiment shown in FIGS. 1 and 2, the amorphous regions 122-1, 222-
High concentration impurity regions 122-1, 222- where 1 is crystallized
1 and a crystal region 122- surrounding the high concentration impurity region.
2, 222-2, a depletion layer mainly extends in the crystal region. In this depletion layer, holes and electrons are thermally generated, and one charge is transferred to the high concentration impurity region 1.
22-1, 222-1, the other charge moves by diffusion to the channel region and constitutes a heat-generating current.

(Embodiment 3) FIG. 3 shows another embodiment of the present invention for reducing the leakage current between the source and drain due to the heat-generated current.

In this embodiment, the amorphous region 322-1 into which impurities are ion-implanted at a high concentration extends in the channel width direction at the portion in contact with the channel region, reaches the side surface of the island-shaped semiconductor layer 320, and forms the crystalline The region 322-2 and the channel region 323 are not in direct contact with each other.

The thin film transistor according to the present invention is obtained by heat-treating and crystallizing such source and drain regions.
A portion of the high concentration impurity region 322-1 constituting the source and drain regions that protrudes so that the crystal region 322-2 and the channel region 323 are not in direct contact is hereinafter referred to as a blocking region 322-3. .

The thermally generated current generated in the depletion layer at the junction between the high concentration impurity region constituting the source and drain regions and the crystal region is caused by the high concentration impurity region 322-1 and the blocking region 322-3. It is confined within the crystal region 322-2 and disappears. At this time, in order to effectively confine and eliminate the heat-generated current, the width 322-4 of the blocking region needs to be sufficiently wide. More specifically,
Although a depletion layer is spread in the blocking region 322-3 due to the drain voltage, the remaining neutral region needs to be sufficiently longer than the diffusion length of minority carriers.

Therefore, the required blocking region width 322-
4 varies depending on the operating conditions of the thin film transistor, but when the impurity concentration of the blocking region is about 1020 cm-3 and the drain voltage is several tens of V or less, the width of the blocking region 322-4 is approximately 0. It is desirable that the thickness is .5 to 3 μm.

As described above, in the embodiment shown in FIG. 3, source and drain regions can be constructed that have low leakage current, good crystallinity, and sufficiently low resistance values, and are stable even in the manufacturing process of thin film transistors.

[0038]

【Example】

(Example 1) Hereinafter, an example of the present invention will be described according to the manufacturing process with reference to FIG.

First, a silicon thin film with a thickness of about 2000 Å obtained by a method (SIMOX) in which a large amount of oxygen ions are implanted into the surface of a silicon wafer to form an insulating layer within the wafer and create an SOI structure on the silicon wafer is used. By repeating sacrificial oxidation and etching, the film was thinned to a thickness of approximately 300 Å.

[0040] After that, the semiconductor layer was formed to have a length of 10 μm and a width of 6 μm.
m islands, and then a thin film transistor having the structure shown in FIG. 1(a) was formed by a normal n-MOS process.

At this time, the source and drain regions have a certain peripheral region (crystalline region 12) as shown in FIG.
2-2), RP is 200 Å, dose is 3 × 1
Phosphorus ions were implanted to give a concentration of 0.015 cm -2 . Further, annealing after implantation was performed at 850° C. in a nitrogen atmosphere for about 1 hour.

The width of the crystalline region is 1 μm, the length of the amorphous region 122-1 into which ions have been implanted is 3 μm,
The width was 4 μm (sample A).

As a comparison sample, ions were implanted into the entire source and drain regions, and the crystal region 122
A thin film transistor without -2 was also created in the same process (Sample B).

The channel length and channel width of Sample A and Sample B were 2 μm and 4 μm, respectively, and the source and drain electrodes were formed of aluminum.

As a result of cross-sectional TEM observation, the source of sample A,
The drain region was single crystal except for a small part in the center, whereas in sample B, the drain region was 1 μm in contact with the channel part.
Most of the parts were in a polycrystalline state, with the exception of a small area, and diffusion of electrode metal was observed in the grain boundaries.

[0046] Also, the gate voltage is 0V, the drain voltage is 3V
The leakage current for sample A is 3×10-13 A when
, for sample B it was 2×10 −12 A.

In addition, when the sheet resistance of the source and drain monitor pads created at the same time as the formation of the thin film transistor was measured, it was found that sample A had a sheet resistance of 300Ω/□.
In sample B, it was 5Ω/□.

(Example 2) As another example, source,
A thin film transistor was fabricated (sample C) that was the same as sample A of Example 1 except that the drain region had a configuration having a blocking region as shown in FIG. 3.

The width 322-4 of the blocking region is approximately 1.5 μm.
And so.

As a result of cross-sectional TEM observation, sample C of this example
The source and drain regions were single crystal except for the central part.

[0051] Also, the gate voltage is 0V, the drain voltage is 3V
The leakage current at this time was 8×10 −14 A, which was about one order of magnitude smaller than that of sample A.

[0052]

As explained above, according to the method of manufacturing a semiconductor device of the present invention, since the ion-implanted amorphous region is surrounded by the crystalline region, the drain region and the source region can be recrystallized by heat treatment. In this case, recrystallization can be performed from all sides, and recrystallization can be performed in a shorter time than conventionally.

Furthermore, the shorter the time for crystallizing the amorphous region, the greater the probability that a polycrystalline region will grow into the crystalline region.

As described above, according to the recrystallization method according to the present invention, the heat treatment time can be significantly shortened, and the crystallinity of the drain region and source region can be dramatically improved.

Furthermore, the heat treatment time can be further shortened by making the ion-implanted amorphous region have an uneven shape and increasing the contact area with the non-ion-implanted crystal region. Furthermore, by forming a blocking region so that the crystal region and the channel region do not come into direct contact with each other, leakage current between the source and drain due to thermally generated current can be reduced.

Furthermore, the width of the blocking region is made larger than the diffusion length of minority carriers that the ion-implanted region has due to the subsequent activation treatment, so that the width of the blocking region can be made larger than the diffusion length of the minority carriers that the ion-implanted region has due to the subsequent activation treatment. The thermally generated current generated in the depletion layer at the junction with the crystal region is confined within the crystal region by the high concentration impurity region and the blocking region and disappears.

As described above, according to the present invention, leakage current between the source and drain is small, crystallinity is good,
It is possible to realize a method for manufacturing a thin film semiconductor device in which the resistance values of the source and drain portions are sufficiently small and the manufacturing process is stable.

[Brief explanation of the drawing]

FIG. 1 is a diagram illustrating a first embodiment of a method for manufacturing a thin film transistor according to the present invention.

FIG. 2 is a diagram illustrating a second embodiment of the method for manufacturing a thin film transistor according to the present invention.

FIG. 3 is a diagram illustrating a third embodiment of the method for manufacturing a thin film transistor according to the present invention.

[Explanation of symbols]

110 Insulating substrate 120, 220, 320 Island-shaped semiconductor layer (island-shaped single crystal) 121 Source region 122 Drain region 122-1, 222-1, 322-1 Amorphous region (region into which impurities are ion-implanted), (crystallized 122-2, 222-1, 322-1 Crystal region (region where no impurity is implanted) 123, 323 Channel region 322-3 Generation current blocking region 322-4
Inhibition area width

Claims (4)

[Claims] 1. Impurity atoms are ion-implanted into a single-crystal semiconductor formed in an island shape on an insulating substrate, and then heat-treated to form a source and a source over the entire thickness of the single-crystal semiconductor.
A method of manufacturing a thin film semiconductor device forming a drain region, wherein the ion implantation is performed except for a certain region including a side surface of the island-shaped single crystal surrounding the source and drain. . 2. A certain region including a side surface of the island-shaped single crystal surrounding the source and drain where the ion implantation is not performed;
2. The method of manufacturing a thin film semiconductor device according to claim 1, wherein the shape of the interface with the region to which ion implantation is performed is uneven. 3. A certain region of the side surface of the island-shaped single crystal surrounding the source and drain and a channel region are separated by a blocking region in which the ion implantation is performed. A method for manufacturing a thin film semiconductor device. 4. The area where the ion implantation is performed is such that the distance between the channel region and a certain area of the side surface of the island-shaped single crystal surrounding the source and drain is determined by the area where the ion implantation is performed. 4. The method of manufacturing a thin film semiconductor device according to claim 3, wherein the diffusion length is longer than the diffusion length of minority carriers obtained by subsequent activation treatment.