JPH04368166A - Resin sealed type semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to a resin-sealed semiconductor device, particularly a resin-sealed semiconductor device that can improve noise resistance without unnecessarily increasing the number of ground potential external leads or power supply potential external leads. Regarding.

0002

6(A) and 6(B) show conventional examples of resin-sealed semiconductor devices, in which (A) shows the upper half of the encapsulating resin (the part above the semiconductor element). (B) is a cutaway plan view, and (B) is a sectional view taken along line BB of (A). In the figure, a denotes a die pad of a lead frame, and a semiconductor element c is bonded onto the die pad a via an adhesive b. d is an electrode pad of the semiconductor element c, which is connected to the inner end of the lead e of the lead frame via a wire f. g is a sealing resin.

0003

By the way, in resin-sealed semiconductor devices, there has been a remarkable trend toward higher integration of semiconductor elements, multilayer wiring, faster circuits, more terminals, larger chips, and lower power supply voltages. When input/output signals turn on/off (level up/level down) at multiple terminals at the same time, the ground level (or power supply voltage level) fluctuates due to the bounce of the power supply voltage, causing noise, which causes damage to the circuit. There was a risk that a malfunction would occur. One reason for this is that the resistance (impedance) on the ground side of the power supply voltage supply path is large, for example. That is, I
This is because the wiring film used for transmitting the ground potential within the C chip tends to become thinner and narrower in width. Therefore, it is conceivable to increase the number of ground electrodes. This is because the potential on the ground side of the power supply voltage is transmitted in parallel through multiple wires and multiple ground electrodes, so the resistance (impedance) on the ground side of the power supply voltage supply path becomes small, causing bounce of the power supply voltage and lower ground level. This is because fluctuations can be reduced.

However, the conventional method shown in FIGS.
According to the resin-sealed semiconductor device having the structure shown in FIG. 1, if the number of ground electrodes is increased, the number of ground leads e, which serve as external terminals connected to the ground electrodes via wires f, must be increased accordingly. This is an undesirable factor that hinders miniaturization and high integration of resin-sealed semiconductor devices. Moreover, such a multi-terminal system inevitably tends to increase the wire length, and there is also the problem that high speed performance has to be sacrificed.

The present invention has been made to solve these problems, and its purpose is to improve noise resistance without increasing the number of terminals.

[0006]

[Means for Solving the Problems] The resin-sealed semiconductor device of the present invention has a plurality of one of a power supply potential electrode and a ground potential electrode of a semiconductor element, for example, a plurality of ground potential electrodes, and a ring is provided outside the semiconductor element. The present invention is characterized in that a ring-shaped power plane is provided, and the ring-shaped power plane and each of the electrodes, for example, each ground potential electrode, are connected by wires.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The resin-sealed semiconductor device of the present invention will be explained in detail below according to the illustrated embodiments. 1A and 1B show one embodiment of the resin-sealed semiconductor device of the present invention, in which FIG. 1A is a sectional view and FIG. 1B is a partially cutaway perspective view. FIG. 2 is a perspective view of the power plane.

In the drawings, reference numeral 1 denotes a die pad, which has a rectangular planar shape (for example, a square shape), and when it is in a lead frame state, it is connected to the frame by die pad suspension leads 1a, 1a, 1a, 1a at four corners. It was integrated. Note that only one die pad hanging lead 1a appears in the drawing.

A semiconductor element 3 is die-bonded to the die pad 1 using an adhesive 2. Reference numeral 4 denotes a rectangular ring-shaped power supply plane provided outside the semiconductor element 3, and is made of, for example, a copper alloy. In this embodiment, the power plane 4 plays a role as a relay means for transmitting the ground potential.

Reference numeral 5 denotes a rectangular ring-shaped insulating film bonded to the upper surface of the power plane 4, and is made of polyimide, for example. The insulating film 5 has an L-shaped cross section with a wire receiving protrusion 6 integrally formed on the inner peripheral edge thereof and protruding upward. The inner circumferential edge of this wire receiving protrusion 6 is located a suitable amount inward than the inner circumferential edge of the power supply plane 4, and therefore,
A portion of the power supply plane 4 inside the wire receiving protrusion 6 is exposed (this means that it is exposed before resin sealing). 4a is the exposed portion of the power plane 4. In addition, in FIG. 1(B), the exposed portion 4 of this power supply plate 4 is
A has been hatched to make it easier to understand.

The wire receiving protrusion 6 of the insulating film 5 has four notches 6a that allow the die pad suspension leads 1a to escape, corresponding to the four die pad suspension leads 1a, 1a, 1a, 1a.
6a, 6a, 6a, 6a are formed. The lower portion of the insulating film 5 where the cutouts 6a, 6a, 6a, and 6a are formed extends slightly inward to cover the exposed portion 4a inside the power supply plane 4. This is done in order to prevent a short circuit between the die pad suspension leads 1a, 1a, 1a, 1a and (the exposed portion 4a of) the power plane 4. 5a, 5a, 5a, 5a are portions extending inward at the notches 6a, 6a, 6a, 6a of the wire receiving protrusion 6 of the insulating film 5.

7, 7, . . . are leads, of which 7e is an earth lead (VSS lead). Each lead 7, 7,
The inner lead portions of . and,
All leads 7 except earth lead (VSS lead) 7e,
7, . . . are connected to corresponding electrodes 8, 8, . . . via wires 9, 9, .

By the way, the earth lead (VSS lead)
The inner lead portion of 7e is connected to the portion 4a of the power plane 4 exposed from the insulating film via the wire 9. The many ground potential electrodes 8e, 8e, . . . of the semiconductor element 3 are connected to the exposed portion 4a of the power supply plane 4 via wires 9, 9, . 10 is a sealing resin.

This resin-sealed semiconductor device receives a ground potential from the outside through a ground lead (VSS lead) 7e. This ground potential is transmitted to the power plane 4 via the wire 9, and is transmitted in parallel from the power plane 4 to each ground potential electrode 8e, 8e, . . . via the wires 9, 9, . Therefore, the resistance (impedance) of the path for supplying the ground potential can be significantly reduced compared to the conventional case in which the ground potential was supplied by only one ground electrode.

[0015] Therefore, it is possible to prevent fluctuations in the ground level caused by a large number of input/output signals turning on/off (level up/down) at the same time, thereby making it possible to reduce noise. Malfunctions can be prevented.

Even if the number of ground electrodes 8e is increased to reduce the impedance of the ground potential supply path, it is not possible to apply the ground potential to each of the ground electrodes 8e, 8e, . . . using one power plane 4 as a relay means. Therefore, it is not necessary to increase the number of earth leads 7e. That is, it is possible to reduce noise by increasing the number of ground electrodes without increasing the number of leads. Furthermore, since the number of ground electrodes can be increased, the number and position of the ground electrodes can be selected arbitrarily, increasing the degree of freedom in design.

Furthermore, since the wires 9, 9, . . . can be received by the wire receiving protrusions 6 provided on the insulating film 5, sagging or sagging of the wires 9, 9, . The incidence of defects caused by short circuits with edges can be reduced. Furthermore, since the inner lead portions of the leads 7, 7, ..., 7e can be fixed to the insulating film 5 and wire bonding can be performed in that state, wire bonding can be performed with each inner lead portion accurately positioned. can. Therefore, the defective rate of wire bonding can be reduced, and the time required for position detection during wire bonding can be shortened.

In the above embodiment, the ground potential is transmitted from the ground lead 7e to the power plane 4 via the wire 9. However, it is not necessary to do so, and as shown in FIG. 3, a wire 9 is connected to the semiconductor element 3 from the ground lead 7e.
The ground potential is transmitted to one ground potential electrode 8e of
The signal may be transmitted to the adjacent electrode 8e, and then transmitted from the electrode 8e to the power plane 4 via the wire 9. Of course, it goes without saying that the ground potential is transmitted from the power plane 4 to the remaining many ground potential electrodes 8e, 8e, . . . via wires 9, 9, .

FIG. 4 is a plan view showing a modification of the power supply plane. Modification 4 of the power supply plane is characterized in that it has stress relaxation slits 12, 12. That is, as the power plane 4 becomes larger due to higher integration, larger chips, and multi-terminals, the larger the power plane 4 becomes, the more pressure may be generated at the corners.
Slits 12 were provided at each corner. However, only one corner portion is shown in the drawing.

For convenience, insulating film 5 (
(including the wire receiving protrusion 6) are diagonally hatched. Reference numeral 13 indicates a depression of the die pad suspension lead 1a, and by providing slits 12, 12 at the corners of the power supply plane 4, the die pad suspension lead 1a can be depressed.

FIG. 5 is a perspective view showing a modification of the insulating film. The present insulating film 5 has wire receiving recesses 14, 14, . Short circuit between 9 and 9 can be prevented.

The insulating film 5 can be formed as follows. First, the wire receiving protrusion 6 is formed by light etching the insulating film. Of course, the light etching depth at this time is equal to the thickness of the wire receiving protrusion 6. Next, masking is performed so that only the portion that will become the recess of the wire receiving protrusion 6 is exposed, and etching is performed again. As a result, recesses 14, 14, . . . are formed.

Note that the recesses 14, 14, ... may have a rounded shape due to side etching, but since the cross-sectional shape of the wire itself is circular (25 to 30 μm in diameter), there is no difference in the way the wire fits into it. There is nothing wrong with that. In the above embodiment, the power plane 4 was used for transmitting the ground potential. However, instead, it may be used for transmitting the power supply potential.

[0024]

Effects of the Invention In the resin-sealed semiconductor device of the present invention, the semiconductor element has a plurality of at least one of a power supply potential electrode and a ground potential electrode, and a power supply plane is provided outside the semiconductor element, and The power source plane is characterized in that each of the plurality of power source potential electrodes and ground potential electrodes is connected to the power source plane using a wire. Therefore, according to the resin-sealed semiconductor device of the present invention, the presence of the power supply plane makes it possible to apply a power supply potential or ground potential in parallel to a plurality of power supply potential electrodes or ground potential electrodes of the semiconductor element, and thus potential transmission. The resistance of the path can be reduced. Therefore, generation of noise due to bounce of the power supply voltage can be prevented, and malfunctions due to noise can be prevented. Even if the number of power supply potential electrodes or ground potential electrodes is increased, the power plane can be used as a relay means to apply a potential to them, and there is no need to increase the number of leads in accordance with the number of electrodes. Therefore, noise can be reduced without increasing the number of leads and thereby increasing the size of the device.

[Brief explanation of drawings]

[Fig. 1] (A) and (B) show one embodiment of the resin-sealed semiconductor device of the present invention, (A) is a cross-sectional view, and (B) is a cross-sectional view.
is a partially cutaway perspective view.

FIG. 2 is a perspective view of a power supply plane (with an insulating film) used in the above embodiment.

FIG. 3 is a perspective view showing a modification of the potential transmission path.

FIG. 4 is a plan view showing a modified example of the power plane.

FIG. 5 is a perspective view showing a modification of the insulating film.

[Fig. 6] (A) and (B) show conventional examples;
2 is a plan view showing a portion of the sealing resin above the semiconductor element, and FIG.

[Explanation of symbols]

3 Semiconductor element 4 Power plane 5 Insulating film 7 Lead 7e Earth lead 8 Electrode 8e Ground potential electrode 9 Wire

Claims (1)

[Claims] 1. A semiconductor element has a plurality of at least one of a power supply potential electrode and a ground potential electrode, a ring-shaped power supply plane is provided outside the semiconductor element, and a ring-shaped power supply plane is provided outside the semiconductor element, and the power supply potential electrode and the ground potential electrode of the semiconductor element A resin-sealed semiconductor device characterized in that each of the plurality of electrodes and the power plane are connected by a wire.