JPH0437145A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH0437145A
JPH0437145A JP2141673A JP14167390A JPH0437145A JP H0437145 A JPH0437145 A JP H0437145A JP 2141673 A JP2141673 A JP 2141673A JP 14167390 A JP14167390 A JP 14167390A JP H0437145 A JPH0437145 A JP H0437145A
Authority
JP
Japan
Prior art keywords
resin film
chip
organic resin
insulating organic
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2141673A
Other languages
Japanese (ja)
Inventor
Tadashi Fukuda
福田 匡志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2141673A priority Critical patent/JPH0437145A/en
Publication of JPH0437145A publication Critical patent/JPH0437145A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To realize simplified manufacture without giving any damage on a resin film or to a chip in the discrimination pattern forming process by forming an insulating organic resin film to a chip mounting position of a tape carrier, forming a discrimination pattern at the surface thereof and softening an organic resin film by the heat treatment in the assembling process causing the resin film to be closely adhered to the chip. CONSTITUTION:In a semiconductor device assembled by the TAB system, an insulating organic resin film 11 is formed on a chip mounting position 10 of a tape carrier 3, a discrimination pattern 12 is formed on the surface thereof and the organic resin film 11 is softened by the heat treatment in the assembling process to cause the film to be closely adhered to a chip 6. For example, a copper foil 4 is attached to the carrier tape 3 forming window holes 2 and a lead 5 is formed by the etching to the part of window hole 2. Next, an insulating organic resin film 11 is arranged at the chip mounting position 10, it is attached to the end part of lead 5 by the thermal pressurizing method and a discrimination pattern 12 is formed on the surface thereof. Next, a chip 6 is bonded to the lead 5 by the heat treatment through a solder bump 7. With the heat generated at this time, the insulating organic resin film 11 is softened and closely adhered to the chip 6.

Description

【発明の詳細な説明】 〔概 要〕 半導体装置の製造方法に関し、 製造が簡単で、且つ識別パターン形成工程で樹脂膜又は
チップに損傷を与えないようにすることを目的とし、 テープオートメイテッドボンディング方式で組立を行う
半導体装置において、テープキャリアのチップ搭載位置
に絶縁性有機樹脂膜を形成し、その表面に識別用のパタ
ーンを形成しておき、組立工程での熱処理によって有機
樹脂膜を軟化させチップに密着させるように構成する。
[Detailed Description of the Invention] [Summary] Concerning a method for manufacturing a semiconductor device, tape automated bonding is used for the purpose of simplifying manufacturing and preventing damage to the resin film or chip during the identification pattern forming process. In semiconductor devices that are assembled using this method, an insulating organic resin film is formed at the chip mounting position of the tape carrier, an identification pattern is formed on its surface, and the organic resin film is softened by heat treatment during the assembly process. It is configured to be in close contact with the chip.

〔産業上の利用分野〕[Industrial application field]

本発明は半導体装置の製造方法に関する。 The present invention relates to a method for manufacturing a semiconductor device.

半導体装置には、その使用上からどの様な集積回路であ
るのかを表示する識別記号を見易い位置に表示しておく
必要がある。本発明はテープオートメイテッドボンディ
ング方式(以下TAB方式という)で組立てられる識別
記号入り半導体装置の製造方法に関する。
In order to use the semiconductor device, it is necessary to display an identification symbol in an easily visible position to indicate what kind of integrated circuit it is. The present invention relates to a method for manufacturing a semiconductor device with an identification symbol assembled by a tape automated bonding method (hereinafter referred to as the TAB method).

〔従来の技術〕[Conventional technology]

第2図は従来のテープオートメイテッド方式により組立
てられる識別記号入り半導体装置の製造方法を示す図で
ある。
FIG. 2 is a diagram showing a method of manufacturing a semiconductor device with an identification symbol assembled by the conventional tape automated method.

この方法は先ず(a)図に示すように、スプロケット孔
1を有し、窓孔2があけられたポリイミドよりなるキャ
リアテープ3に(b)図に示すように銅箔4をはり付け
、この銅箔4をエツチングして(C)図に示すようにリ
ード5を窓孔部に形成し、このリード5に(d)図に示
すようにチップ6を該チップ上に設けられたバンプ7を
介して接続したのち、リード5をA−A線$よびB−B
線から切断し、その後(e)図に示すチップ6上に絶縁
性有機樹脂8を塗布し硬化させたのちその表面に識別パ
ターン9をレーザ等で凹状に形成するのである。
In this method, first, as shown in Fig. (b), a copper foil 4 is pasted onto a carrier tape 3 made of polyimide having sprocket holes 1 and window holes 2, as shown in Fig. (b). The copper foil 4 is etched to form a lead 5 in the window hole as shown in figure (C), and a chip 6 is attached to the lead 5 as shown in figure (d). After connecting lead 5 to A-A wire $ and B-B
After cutting from the wire, an insulating organic resin 8 is coated on the chip 6 shown in FIG. 6(e) and cured, and then an identification pattern 9 is formed in a concave shape on the surface using a laser or the like.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上記従来の半導体装置の製造方法では、■TAB方式に
て組立終了後、樹脂の塗布工程、識別パターン逸成工程
との2工程が必要となる。■樹脂の膜厚、材質等のバラ
ツキによって、その後の識別パターン形成工程において
、樹脂の損傷、チップの損傷等が生ずる場合がある。等
の問題があった。
In the above-mentioned conventional method for manufacturing a semiconductor device, two steps are required: (1) after assembly is completed using the TAB method, a resin application step and an identification pattern generation step. (2) Due to variations in resin film thickness, material, etc., damage to the resin, damage to the chip, etc. may occur in the subsequent identification pattern forming process. There were other problems.

本発明は上記従来の問題点に鑑み、製造が簡単で、且つ
識別パターン形成工程で樹脂膜又はチップへ損傷を与え
ない半導体装置の製造方法を提供することを目的とする
SUMMARY OF THE INVENTION In view of the above conventional problems, it is an object of the present invention to provide a method for manufacturing a semiconductor device that is easy to manufacture and does not damage a resin film or a chip in the process of forming an identification pattern.

〔課題を解決するための、手段〕[Means for solving problems]

上記目的を達成するために本発明の半導体装置の製造方
法では、TAB方式で組立を行う半導体装置において、
テープキャリア3のチップ搭載位置に絶縁性有機樹脂膜
11を形成し、その表面に識別用のパターン12を形成
しておき、組立工程での熱処理によって前記有機樹脂膜
11を軟化させチップ6に密着させることを特徴とする
In order to achieve the above object, in the semiconductor device manufacturing method of the present invention, in a semiconductor device assembled by the TAB method,
An insulating organic resin film 11 is formed at the chip mounting position of the tape carrier 3, and an identification pattern 12 is formed on its surface.The organic resin film 11 is softened by heat treatment in the assembly process and adheres to the chip 6. It is characterized by causing

〔作 用〕[For production]

テープキャリア3上に絶縁性樹脂膜11を形成し、その
上に識別パターン12を形成しておくことにより、テー
プキャリア3にチップ6を搭載後に識別パターンを形成
するためのレーザ照射を必要としないため、絶縁+11
:樹脂膜11又はチップ6へ摺傷を与えることはない。
By forming the insulating resin film 11 on the tape carrier 3 and forming the identification pattern 12 thereon, laser irradiation is not required to form the identification pattern after the chip 6 is mounted on the tape carrier 3. Therefore, insulation +11
: No scratches are caused to the resin film 11 or the chip 6.

〔実施例〕〔Example〕

第1図は本発明の詳細な説明するための図である。 FIG. 1 is a diagram for explaining the present invention in detail.

本実施例は、先ず(a)図に示すようにスプロケット孔
1を有するキャリアテープ(ポリイミドテープ)3に窓
孔2を形成する。次に(b)図に示すようにキャリアテ
ープ3に銅箔4をはり付ける。次に(C)図に示すよう
に窓孔2の部分にリード5をエツチングにより形成する
。次に点線10で示すチップ搭載位置に(d)図、及び
d図のe−e線における断面図(e)に示す如くポリイ
ミド、エポキシ等の絶縁性有機樹脂膜11を配置し、リ
ード5の先端に熱圧着等によりはり付け、その表面に識
別パターン12を形成する。なおこの識別パターン12
は耐熱性インクのスクリーン印刷が好ましい。次に(f
)図に示すように熱処理によりリード5にチップ6を該
チップ上に形成されている半田バンプ7を介してボンデ
ィングする。このときの加熱により絶縁性有機樹脂膜1
1は軟化してチップ6に密着する。このあと、リード5
をA−A線及びB−B線から切断し、完成するのである
In this embodiment, first, as shown in Figure (a), a window hole 2 is formed in a carrier tape (polyimide tape) 3 having a sprocket hole 1. Next, a copper foil 4 is attached to the carrier tape 3 as shown in FIG. Next, as shown in Figure (C), leads 5 are formed in the window holes 2 by etching. Next, an insulating organic resin film 11 made of polyimide, epoxy, etc. is placed at the chip mounting position indicated by the dotted line 10 as shown in FIG. It is attached to the tip by thermocompression bonding or the like, and an identification pattern 12 is formed on its surface. Furthermore, this identification pattern 12
Screen printing with heat-resistant ink is preferred. Then (f
) As shown in the figure, the chip 6 is bonded to the leads 5 through the solder bumps 7 formed on the chip by heat treatment. Due to the heating at this time, the insulating organic resin film 1
1 softens and adheres closely to the chip 6. After this, lead 5
is completed by cutting it from the A-A line and the B-B line.

〔効 果〕〔effect〕

以上のように本発明によれば、TAB方式を用いて半導
体装置を製造するとき、チップ搭載前のテープキャリア
上に絶縁性有機樹脂膜を設け、その樹脂膜に予め識別パ
ターンを形成しておくことにより、識別パターン形成時
にチップへ損傷を与えることがなく、従来のレーザ等で
識別パターンを形成する際の樹脂膜及びチップへの損傷
の恐れは全くなくなる。また識別パターン形成も簡単容
易となる。
As described above, according to the present invention, when manufacturing a semiconductor device using the TAB method, an insulating organic resin film is provided on a tape carrier before a chip is mounted, and an identification pattern is formed on the resin film in advance. As a result, no damage is caused to the chip when forming the identification pattern, and there is no fear of damage to the resin film and the chip when forming the identification pattern using a conventional laser or the like. In addition, formation of identification patterns becomes simple and easy.

4、  ′fl!J面の簡単な説明 第1図は本発明の詳細な説明するための図、図2図は従
来の識別記号入り半導体装置の製造方法を示す図である
4, 'fl! BRIEF DESCRIPTION OF THE J-SIDE FIG. 1 is a diagram for explaining the present invention in detail, and FIG. 2 is a diagram showing a conventional manufacturing method of a semiconductor device with an identification symbol.

図において、 1はスプロケット孔、 2は窓孔、 3はキャリアテープ、 4は銅箔、 5はリード、 6はチップ、 7は半田バンプ、 10はチップ搭載位置、 11は絶縁性有機樹脂膜、 12は識別パターン を示す。In the figure, 1 is the sprocket hole, 2 is a window hole, 3 is carrier tape, 4 is copper foil, 5 is lead, 6 is a chip, 7 is solder bump, 10 is the chip mounting position; 11 is an insulating organic resin film; 12 is the identification pattern shows.

Claims (1)

【特許請求の範囲】 1、テープオートメイテッドボンディング方式で組立を
行う半導体装置において、 テープキャリア(3)のチップ搭載位置に絶縁性有機樹
脂膜(11)を形成し、その表面に識別用のパターン(
12)を形成しておき、組立工程での熱処理によって前
記有機樹脂膜(11)を軟化させチップ(6)に密着さ
せることを特徴とする半導体装置の製造方法。
[Claims] 1. In a semiconductor device assembled using a tape automated bonding method, an insulating organic resin film (11) is formed at the chip mounting position of the tape carrier (3), and an identification pattern is formed on the surface of the insulating organic resin film (11). (
12) is formed in advance, and the organic resin film (11) is softened by heat treatment in the assembly process and brought into close contact with the chip (6).
JP2141673A 1990-06-01 1990-06-01 Manufacture of semiconductor device Pending JPH0437145A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2141673A JPH0437145A (en) 1990-06-01 1990-06-01 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2141673A JPH0437145A (en) 1990-06-01 1990-06-01 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH0437145A true JPH0437145A (en) 1992-02-07

Family

ID=15297538

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2141673A Pending JPH0437145A (en) 1990-06-01 1990-06-01 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH0437145A (en)

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