JPH04372009A - Control system for reacdtive power compensator - Google Patents

Abstract

PURPOSE:To improve the average force rate of a distribution system by detecting the period where the amount of generation of the lagging reactive power of a load is less than the set value and performing the phase control of a thyristor control reactor during this period. CONSTITUTION:A TCR(thyristor control reactor)4 generating controllable lagging reactive power QTCR and a filter 7 generating a constant advancing reactive power are connected to a bus bar 3 connected to a power source. The lagging reactive power QI of a fluctuation load 2 connected to the bus bar 3 is detected, the phase of the TCR4 is controlled to reduce the lagging reactive power QTCR to be generated by the TCR 4 by this amount from the maximum value. In this case, the period less than the setting value Qs with the small generation amount of the reactive power QI of a load 2 is detected, the TCR4 is phase- controlled assuming that the lagging reactive power Qs is generated in the load 2 by taking a bias.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to power factor improvement of a reactive power compensator (hereinafter referred to as SVC) installed in a power distribution system with high line impedance, such as a power distribution system for railway loads.

0002

2. Description of the Related Art As shown in FIG. 3, an SVC is a thyristor controlled reactor (hereinafter referred to as TCR) that generates adjustable delayed reactive power QTCR on a bus 3 connected to a power source 1 and connected to a variable load 2. and constant advanced reactive power Q
A filter FL that generates C is installed in parallel, and the TCR is phase-controlled so that the delayed reactive power QTCR generated in the TCR is reduced according to the amount of delayed reactive power QL generated by the load, and the TCR is controlled in phase so that the delayed reactive power QTCR generated in the TCR is reduced. Voltage fluctuation ΔV≒%X·(QL+QTCR−QC) due to impedance %Z≒%X is suppressed.

[0003] As shown in FIG. 4, this phase control applies a maximum current (100
%) and performs standby operation to maximize the generated reactive power QTCR, and when reactive power QL is generated in the load, the reactive power QTCR of the TCR is generally reduced by the generated amount. Reactive power QL+QTC seen from
R is made constant to suppress voltage fluctuations.

0004

[Problems to be Solved by the Invention] In electric railway power distribution systems, many L loads are generally connected, resulting in a lagging power factor when viewed from the power supply side, and therefore it is necessary to improve the power factor. In particular, the capacity of TCR is larger than that of filter FL (QTCR>QC)
Therefore, if the maximum delayed reactive power QTCR is generated in the TCR as described above, the entire SVC will supply delayed reactive power to the bus, further worsening this delayed power factor.

By the way, when looking at the electric railway load from the power receiving point of the busbar where the SVC is installed, the load amount has a peak value when a train passes, and is characterized by being extremely small at other times. This means that when a train approaches, large amounts of power are supplied through the distribution system that feeds this power receiving point, whereas when the train is far away, power is supplied from another distribution system, and the power from that distribution system is supplied. This is because the amount will decrease. That is, the SVC spends a lot of standby time under low load, during which the maximum current is passed through the TCR.

[0006] Therefore, the present invention focuses on the power factor and TCR operating status in the above-mentioned electric railway load distribution system, and aims to provide a TCR phase control method that can improve the average power factor of the distribution system. shall be.

[0007]

[Means for Solving the Problems] The present invention connects a TCR that generates a controllable lagging reactive power QTCR and a filter FL that generates a constant leading reactive power QC in parallel to a bus connected to a power source, The lagged reactive power QL of the fluctuating load connected to the bus is detected, and the phase of the TCR is controlled so that the lagged reactive power QTCR generated by the TCR is reduced from the maximum value by this magnitude, thereby suppressing voltage fluctuations on the bus. The suppression device detects a period in which the amount of generated reactive power QL of the load is less than the set value QS, and during this period, by applying a bias, the phase of the TCR is assumed to be that the reactive power QS is generated behind the load. A control method for a reactive power compensator is provided, which is characterized by performing control and improving the power factor during this period.

[0008]

[Operation] The phase control of the present invention detects the reactive power QL of the load, and sets this reactive power QL to a set value QS (for example, TCR
10% of the capacity of T) or less, as shown in Figure 2, T
The delayed reactive power QTCR generated by CR is set to the maximum value (100
%) by a uniform amount of QS (90% in this case) to improve the power factor during this period.

[0009]

[Example] The present invention will be explained with reference to an example. 1 is the power source at a substation, etc., and is the impedance% of the distribution line and power source.
Power is supplied to the customer bus 3 through Z≒%X. 2 is a variable load such as a train connected to the bus bar 3; 4 is a TCR, which is composed of a high impedance transformer 5 connected in series to the bus bar 3 and a thyristor 6 connected in anti-parallel. This high impedance
The dance transformer 5 may be composed of a normal transformer and a reactor. 7 is a filter FL connected in parallel to the TCR, and is composed of a phase advance capacitor 8 that provides a constant leading reactive power QC to the bus 3, and a series reactor 9 that absorbs harmonics of the bus 3 with this capacitor 8. Ru. This TCR and FL constitute an SVC.

Reference numeral 10 denotes a reactive power Q detection circuit, which is connected to the secondary side of the CT 12 which is connected to the PT 11 connected to the bus 3 and the variable load 2 circuit. 13 is a low-pass filter having a time constant of about 0.1 seconds, which removes harmonic noise contained in the reactive power signal. 14 is a setter for simulated reactive power QS, which sets QS to 1p. u (power unit = T
VREF (reference capacity of CR) converted to voltage (for example, when QS is 10%, Vref = 0.1 p.u/TCR
= 1V). 15 is the first adder, setter 1
The output of the low-pass filter 14 is subtracted from the output Vref of 4 and output. 16 is a diode which allows the adder 15 to pass only when the output is positive. 17 is a second adder that receives the reactive power signal output from the Q detection circuit 10;
Add the adder outputs that have passed through the diodes. These low-pass filter 13, first and second adders 15 and 17, and diode 16 constitute a lower limiter 18.

This lower limiter 18 is connected to the Q detection circuit 10.
When the output QL is smaller than the simulated reactive power QS, it is uniformly increased to QS, and at other times, it is output as it is. When the output QL is smaller than the simulated reactive power QS, it is outputted as it is. Signal QL is less than simulated reactive power QS (
QS-QL) is extracted and added to QL by the second adder 17.
By adding it to , the output is set as QS. When the output of the Q detection circuit 10 is equal to or higher than the simulated reactive power QS, the first
Since the output of the adder 15 becomes less than 0 potential and does not pass through the diode 16, no heightening is performed.

19 is a PL connected to the secondary side of PT11.
The L circuit detects and outputs the accurate zero-crossing timing of the synchronous voltage. 20 is a function circuit that linearly converts the reactive power signal output from the second adder 17 into the firing phase angle of the thyristor, and the reactive power generated by the TCR is increased by the magnitude of the reactive power represented by the input reactive power signal. QT
Outputs the firing phase angle of the thyristor that reduces CR from its maximum value. 21 is a pulse generator, which outputs the output of the function circuit 20 with reference to the phase signal of the PLL circuit 19;
Outputs the gate firing pulse signal of the thyristor 6 of the TCR.

The configuration shown in FIG. 1 improves the power factor by uniformly reducing the reactive power QTCR generated by the TCR by QS from the total capacity when the reactive power of the load 2 is equal to or less than the simulated reactive power QS. In other cases, the reactive power generated by the TCR is reduced by the amount of reactive power generated in the load, as in the normal case.

[0014]

According to the present invention, it is possible to improve the power factor during the standby time of an SVC in which the reactive power of the load is small. Therefore, a great effect can be obtained in improving the power factor of a system with high line impedance, such as a distribution system for electric railway loads. In particular, this effect is such that the greater the capacity of the SVC relative to the power distribution system, the greater the improvement rate of the power factor and the lower the running cost.

[Brief explanation of drawings]

[Fig. 1] A diagram showing an example of the configuration of a control circuit that implements the control method of the present invention.

[Fig. 2] A diagram showing the relationship between the reactive power of the load and the TCR current in the control method of the present invention.

[Figure 3] Diagram showing the schematic configuration of SVC

[Figure 4] Reactive power and TC of load in conventional control method
Diagram showing the relationship between R and current

[Explanation of symbols]

10 Q detection circuit 13 Low pass filter 14 Setting device 15 First adder 16 Diode 17 Second adder 18 Lower limiter

Claims (1)

[Claims] Claim 1: A thyristor control reactor that generates a controllable lagging reactive power QTCR and a filter that generates a constant leading reactive power QC are connected in parallel to a bus bar connected to a power supply, and a variable load connected to the bus bar. In a device that detects the delayed reactive power QL of the load and controls the phase of the thyristor-controlled reactor so that the delayed reactive power QTCR generated by the thyristor-controlled reactor is reduced by this amount, the voltage fluctuation of the bus is suppressed. delayed reactive power Q
A reactive power compensator characterized in that a period in which the amount of generated L is less than a set value QS is detected, and during this period, phase control of a thyristor-controlled reactor is performed on the assumption that reactive power QS is generated behind the load. control method.