JPH04390B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an etching method, and more particularly to an etching method that can accurately form a groove having a Y-shaped cross section in a silicon substrate.

The dry etching method has come to be used for microfabrication of semiconductor materials, and it has become possible to process the material 2 to be etched according to the dimensions of the mask 1 to obtain grooves 3 with a rectangular cross section, as shown in FIG. Ta. However, in the manufacturing process of semiconductor integrated circuits, such rectangular grooves are disadvantageous for surface planarization. In particular, since the shoulder portion 4 of the groove tends to remain as a steep step even after the groove is filled and flattened, an etching method is required to round this portion in advance. Conventionally, as a method of rounding the shoulders of the groove, a method has been used in which the undercut 5 is first formed by an etching method that causes side etching, and then anisotropic etching is performed according to the mask dimensions, as shown in FIG. There is. However, in such a method, the width of the groove becomes wider than the mask dimension, so it is not suitable for forming fine grooves.

The present invention has been made to solve the above-mentioned conventional problems, and by creating a slope at the top of the groove without increasing the width of the groove beyond the mask dimension, it is possible to use fine silicon that is advantageous for planarization. The main objective is to provide an etching method that can form grooves.

Hereinafter, the present invention will be explained in detail with reference to Examples.

Example 1 The etching process of the present invention will be explained with reference to FIG.

After forming an etching mask 12 made of SiO ₂ or Si ₃ N ₄ on a Si (100) substrate 11, wet etching or etching using a hydrazine solution is performed.
Plasma etching using CCl ₄ gas is performed to form an etched groove in which the (111) plane 13 remains unetched and is inclined inward from the edge of the mask. Next, CVD (Chemical Vapor
A SiO ₂ film 14 is deposited on the entire surface using the
Obtain the shape shown in Figure 2A. When the deposited SiO ₂ film 14 is etched by the film thickness using the sputter etching method, the film thickness decreases by the film thickness in the depth direction due to etching, so that the film becomes sloped as shown in FIG. The SiO ₂ deposited on the portion is not completely removed, leaving an etching residue 15. (111)
Since the plane is inclined at 55° to the (100) plane,
The SiO ₂ film deposited on the (111) surface has a depth of 1.74
It has a film thickness that is twice as thick (1/cos 55゜ times), and is equal to the film thickness.
Even after SiO ₂ etching, the film can be left with a thickness 0.74 times the original thickness in the depth direction. bottom of the ditch 1
6, the Si surface is exposed and the remaining SiO ₂ film 15
When reactive sputter etching of Si is performed using as a mask, only the exposed bottom of the groove 16 is etched, forming a Y-shaped groove 17, as shown in FIG. 2C. The reactive sputter etching conditions for Si used at this time were an etching gas of 20% O ₂ mixed with CCl ₄ , a gas pressure of 5 Pa, and a high frequency power density of 0.4 W/cm ² . It can be etched with a selectivity of 20 times that of SiO ₂ and side etching does not occur.

In addition, in this etching process, the material of the deposited film left as an etching mask is other than SiO ₂ .
Si ₃ N 4, Al, etc. may be used, and Si 3 N ₄ or Al may also be used without depositing a film.
may be thermally oxidized to form SiO ₂ . In other words,
Any film that is isotropically formed on Si and serves as an etching mask for Si may be used. Further, as an etching method for this film, any etching that proceeds only in the depth direction (for example, sputter etching using Ar gas or reactive sputter etching using Freon gas) may be used.

FIG. 3 shows a SiO ₂ film 18 formed on the surface of a Y-shaped cross-sectional groove formed according to the present invention, and then a filler 19 is filled in the groove to form an insulating isolation region of a Si element. Since the groove is Y-shaped, filling 1
Even if the height of the groove 9 fluctuates somewhat, a steep step does not occur in the shoulder 20 of the groove, and the surface can be kept smooth. The method for forming the filling 19 is as follows:
It is possible to use a method in which SiO ₂ or polycrystalline Si is deposited and filled into the trench using the CVD method, and then the deposited film other than the trench is removed by photoetching, or a method in which polycrystalline Si is selectively grown into the trench. can.

Embodiment 2 FIG. 4 shows an embodiment in which grooves of different depths are formed according to the present invention. As shown in FIG. 4A, in the fine groove 21, when etching is performed to leave the Si (111) plane, the bases of the etched side surfaces connect to form a V-shaped groove, so that the film 21 remaining after etching the deposited film is removed.
Cover the entire surface of the groove with. In the wide groove 23, only the side surfaces are covered with the film 24 remaining after etching, and the bottom surface 2
5 is exposed. When Si reactive sputter etching is performed in this state, the fine grooves 21 remain as V-shaped grooves 26 as shown in FIG. Become.

As described above, according to the present invention, grooves having different depths can be simultaneously formed depending on the groove width.

When reactive sputter etching using chloride gas such as CCl ₄ , PCl ₃ , or SiCl ₄ is used as an etching method to create a slope on the etching side surface while leaving the (111) plane, the (111) plane is not completely left. Therefore, the slope becomes more vertical. Since the angle of inclination is variable within the range of 55° to 90°, the width of the groove that can be formed according to the present invention can be made as fine as shown in FIG. 5A. If the depth of the shallow groove 31 is D, then the shallow groove 3
The possible width L of 1 is in the range 0<L<1.4D.
The possible widths of the deep grooves 32 are in a range greater than L. Therefore, according to the present invention, fine grooves of different depths can be simultaneously formed with almost no lower limit in width.

FIG. 5B shows a CN isolation structure (a structure in which a region for contacting the collector is insulated and isolated) of a bipolar LSI formed using the above-mentioned method of forming grooves of different depths. This structure consists of N ⁺ buried layer 3
After etching is performed on the p-type substrate 34 on which 3 is formed, the etching mask is removed, a thin thermal oxide film 35 is formed, and the trench is filled with SiO ₂ (or PolySi) 36. Here, the deep groove 37 has a depth that penetrates the N ⁺ layer in order to be used for insulation isolation between elements, and the shallow groove 38 is used to insulate and isolate a region 39 that forms an emitter and a base from a region 40 that makes contact with the collector. ⁺ The depth to reach the layer.

When insulation isolation is performed in this manner, insulation isolation regions having different depths can be formed using one mask, and the insulation isolation regions can be made finer, making it possible to increase the integration of elements. In addition, since the upper part of the insulation isolation groove is sloped, it is possible to alleviate a steep step difference caused by excessive or insufficient filling of the groove.

As is clear from the above description, according to the present invention, not only can a groove with a Y-shaped cross section be easily formed with high precision, but also a shallow V-shaped groove and a deep Y-shaped groove can be simultaneously formed. It is extremely useful for insulation isolation of various semiconductor devices.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an example of a conventional groove forming method, and FIGS. 2 to 5 are diagrams each showing an embodiment of the present invention. 1, 12, 14... Insulating film, 2, 11... Substrate, 1
5, 22, 24... Insulating film remaining after etching, 19
...Polycrystalline silicon.

Claims (1)

[Claims] 1. A step of forming an etching mask having a predetermined pattern on a single crystal semiconductor substrate, and anisotropically etching the exposed region of the surface of the substrate so that the side surface is inclined from the edge of the mask toward the inside of the groove, and , forming an upper groove whose bottom surface is substantially parallel to the main surface of the substrate; depositing an insulating film on the etching mask and the substrate on which the upper groove is formed; a step of performing directional etching to leave the insulating film on the inclined side surfaces of the upper groove, and removing the insulating film formed on the bottom surface of the upper groove and the surface of the etching mask, and exposing the bottom of the upper groove; 1. A method of etching a trench for insulation isolation in a semiconductor device, comprising the step of anisotropically etching the etched substrate to form a lower trench whose side surfaces are substantially perpendicular to the main surface of the substrate.