JPH0440005A - oscillation circuit - Google Patents

oscillation circuit

Info

Publication number
JPH0440005A
JPH0440005A JP14678090A JP14678090A JPH0440005A JP H0440005 A JPH0440005 A JP H0440005A JP 14678090 A JP14678090 A JP 14678090A JP 14678090 A JP14678090 A JP 14678090A JP H0440005 A JPH0440005 A JP H0440005A
Authority
JP
Japan
Prior art keywords
transistor
oscillation
amplification
waveform
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14678090A
Other languages
Japanese (ja)
Inventor
Kazuhito Fujisawa
一仁 藤沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP14678090A priority Critical patent/JPH0440005A/en
Publication of JPH0440005A publication Critical patent/JPH0440005A/en
Pending legal-status Critical Current

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  • Manipulation Of Pulses (AREA)
  • Oscillators With Electromechanical Resonators (AREA)

Abstract

PURPOSE:To more exactly control symmetricity between the upper and lower waveforms of an oscillation waveform in an output by finely adjusting the ratio of amplification capability between the p-ch transistor and the N-ch transistor of a transistor amplifying an oscillation signal. CONSTITUTION:In the oscillation circuit composed of complementary MOS transistors 9 and 10 and equipped with an amplification part, a detecting means 5 is provided to detect the symmetricity between the upper and lower waveforms of the oscillation waveforms to an input voltage level in the initial state of the transistors in the amplification part. Then, the output of this detecting means 5 controls the amplification capability of the p-ch transistor 9 in the amplification part, the amplification ability of the N-ch transistor 10 or the amplification ability of the both transistors 9 and 10. Thus, the symmetricity can be corrected between the upper and lower waveforms of the oscillation output waveforms.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、相補型MO9(以下0M08))う〔従来の
技術〕 従来第2図に示すように、発振回路の増幅部のP −c
 h トランジスタ及びN−chトランジスタともトラ
ンジスタサイズの固定した、CMO3発振回路が知られ
ていた。
[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a complementary MO9 (hereinafter referred to as 0M08) [Prior Art] As shown in FIG.
CMO3 oscillation circuits in which transistor sizes are fixed for both h transistors and N-ch transistors have been known.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかし従来のC!MO3発振回路では、製造上のばらつ
きや、動作温度の変化等により、発振波形の上下の波形
対称性が崩れるため、デジタル回路のクロックとして用
いた場合、パルス幅が変化し回路動作に支障をきたすと
いう問題を有していたそこで本発明においては、上記の
問題を解決するため、製造上のばらつきや動作温度の変
化によらず、常に波形対称性のよい発振波形を得ること
のできる発振回路を提供することを目的とする。
However, the conventional C! In MO3 oscillation circuits, the vertical symmetry of the oscillation waveform is disrupted due to manufacturing variations, changes in operating temperature, etc., so when used as a clock in a digital circuit, the pulse width changes, causing problems in circuit operation. Therefore, in order to solve the above problem, the present invention has developed an oscillation circuit that can always obtain an oscillation waveform with good waveform symmetry regardless of manufacturing variations or changes in operating temperature. The purpose is to provide.

〔課題を解決するための手段〕[Means to solve the problem]

以上のような問題点を解決するため、本発明における発
振回路は、P = c h トランジスタとN −ch
トランジスタとからなる相補型MO8トランジスタによ
り構成された、増幅部をもつ発振回路において、増幅部
のトランジスタの初期状態における入力電圧レベルに対
する、発振波形の上下の波形対称性を検出する検出手段
を有し、前記検出手段の出力により、増幅部のP−cl
lトランジスタの増幅能力、又はN −c h トラン
ジスタの増幅能力、又はP −c h 、 N −c 
h両方のトランジスタの増幅能力を制御することを特徴
とする。
In order to solve the above problems, the oscillation circuit according to the present invention includes a P = ch transistor and an N -ch transistor.
An oscillation circuit having an amplification section configured of complementary MO8 transistors, including a detection means for detecting vertical waveform symmetry of the oscillation waveform with respect to an input voltage level in an initial state of the transistor of the amplification section. , P-cl of the amplification section is detected by the output of the detection means.
Amplification ability of l transistor, or amplification ability of N-ch transistor, or P-ch, N-c
h The feature is that the amplification capacity of both transistors is controlled.

〔作用〕[Effect]

上記のよ5に構成された発振回路において、発振波形を
積分回路を用いて波形対称性に応じた直流電圧に変換し
、比較器によりあらかじめ設定した基準電圧源の電位と
比較し、その結果によって、発振信号を増幅するトラン
ジスタのP−chトランジスタとN−chトランジスタ
の増幅能力比を変え、発振出力波形の上下の波形対称性
を補正することが出来るのである。
In the oscillation circuit configured as described in 5 above, the oscillation waveform is converted into a DC voltage according to the waveform symmetry using an integrating circuit, and compared with the potential of a reference voltage source set in advance using a comparator. By changing the amplification capability ratio of the P-ch transistor and the N-ch transistor, which are the transistors that amplify the oscillation signal, it is possible to correct the vertical symmetry of the oscillation output waveform.

〔実施例〕〔Example〕

以下に本発明の実施例を図面にもとづいて説明する。第
1図は本発明による実施例を示したもので、1は発振用
トランジスタ、2は振動子、5は発振用コンデンサ、4
は帰還抵抗、5は発振波形の波形対称性検出回路用トラ
ンジスタ、6は発振信号をその波形対称性に応じた直流
電圧に変えるための積分器、7は基準電圧源、8は積分
器6の出力と、基準電圧源7の電位とを比較し、基準電
圧源7の電位に対する発振波形の上下の波形対称性が変
化し、積分器の出力電位が基準電圧源7の電位より高(
なったときに信号を出力する比較器である。また比較器
8の出力により、基準電圧源7の制御を行なうことで、
積分器6の出力変化と比較器8の出力変化との間にヒス
テリシス特性をもたせ、比較器8に判定境界レベルの入
力があったとき、比較器8の出力が不安定にならないよ
うにしている。9はP−chトランジスタ、10はN 
−c h トランジスタであり、11は発振信号の出力
端子である。ここで発振波形の上下の波形対称性が崩れ
下側に比べ上側の波形が大きくなって積分器乙の出力が
上がり、基準電圧源7の電位より高くなった場合、比較
器8の出力がローレベルからハイレベルとなる。これに
より増幅部の直列に接続されたP−chトランジスタの
電源側のトランジスタが導通状態となり、直列に接続さ
れたもう一方のP−chトランジスタが動作状態となる
。このため常時動作しているトランジスタの増幅能力に
加え、新たに動作状態となったトランジスタの分だけP
 −c h側の増幅能力が増すことで、増幅部の出力波
形の上側の波形を下側の波形より太き(増幅することに
なり、上下の波形対称性を回復することができる。
Embodiments of the present invention will be described below based on the drawings. FIG. 1 shows an embodiment according to the present invention, in which 1 is an oscillation transistor, 2 is an oscillator, 5 is an oscillation capacitor, and 4 is an oscillation transistor.
5 is a feedback resistor, 5 is a transistor for the waveform symmetry detection circuit of the oscillation waveform, 6 is an integrator for converting the oscillation signal into a DC voltage according to its waveform symmetry, 7 is a reference voltage source, and 8 is the integrator 6. The output is compared with the potential of the reference voltage source 7, and the vertical symmetry of the oscillation waveform with respect to the potential of the reference voltage source 7 changes, and the output potential of the integrator is higher than the potential of the reference voltage source 7 (
This is a comparator that outputs a signal when the Also, by controlling the reference voltage source 7 using the output of the comparator 8,
A hysteresis characteristic is provided between the output change of the integrator 6 and the output change of the comparator 8 to prevent the output of the comparator 8 from becoming unstable when the comparator 8 receives an input at the judgment boundary level. . 9 is a P-ch transistor, 10 is an N
-ch is a transistor, and 11 is an output terminal for an oscillation signal. Here, the waveform symmetry between the upper and lower sides of the oscillation waveform collapses, and the upper waveform becomes larger than the lower one, causing the output of the integrator B to rise and become higher than the potential of the reference voltage source 7. When this happens, the output of the comparator 8 goes low. From level to high level. As a result, the transistor on the power supply side of the P-ch transistors connected in series in the amplifier section becomes conductive, and the other P-ch transistor connected in series becomes in an operating state. Therefore, in addition to the amplification capacity of transistors that are constantly operating, P
-ch By increasing the amplification capacity on the h side, the upper waveform of the output waveform of the amplification section is made thicker (amplified) than the lower waveform, and the vertical waveform symmetry can be restored.

第5図は第1図の実施例における信号波形を示したもの
で、12は発振用トランジスタ1の出力波形、16は比
較器8の出力がハイレベルのときの出力端子110波形
、14は同じくローレベルのときの出力端子110波形
である。
5 shows signal waveforms in the embodiment shown in FIG. 1, 12 is the output waveform of the oscillation transistor 1, 16 is the output terminal 110 waveform when the output of the comparator 8 is at high level, and 14 is the same. This is the waveform of the output terminal 110 at low level.

また第1図における積分器6と比較器8の代わりにAD
コンバーターを用い、増幅用トランジスタのP −c 
h側、N −c h側にAII)コアバーターの出力に
より制御する複数のトランジスタを設けることで、発振
波形の上下の波形対称性に対し、て増幅用トランジスタ
のp −c h側とN −Q、 h 側の増幅能力を細
かく調整することができ、出力におビる発振波形の上下
の波形対称性をより正確にコントロールすることが可能
となる。
Also, instead of the integrator 6 and comparator 8 in FIG.
Using a converter, the P-c of the amplification transistor
By providing a plurality of transistors controlled by the output of the AII) core inverter on the h side and N-ch side, the amplification transistor's p-ch side and N-Q , h side amplification ability can be finely adjusted, and the vertical waveform symmetry of the oscillation waveform applied to the output can be controlled more accurately.

〔発明の効果〕〔Effect of the invention〕

本発明の発振回路により、半導体装置の製造上のばらつ
きや、動作温度の変化によって生じる、発振波形の上下
の波形対称性の崩れを補正することができ、常に狙った
上下の波形対称性を持つ発振波形を得ることが出来る。
With the oscillation circuit of the present invention, it is possible to correct the collapse of the vertical waveform symmetry of the oscillation waveform caused by manufacturing variations in semiconductor devices and changes in operating temperature, and it is possible to always maintain the desired vertical waveform symmetry. An oscillation waveform can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による発振回路の実施例を示した図、第
2図は従来例による発振回路、第3図は第1図の実施例
における信号波形を示した図。 i ・−−・−・発振用トランジスタ 2・−・・・−振動子 5−−−・−・・発振用コンデンサ 4・・・・・・・−・帰還抵抗 5−− ・−・、−・検出回路用トランジスタ6−−・
・−・−・積分器 7−、−−・基準電圧源 8−− ・−−−−比較器 9・−・・・・・・−p−chトランジスタ10・・・
−−−−・N −c h トランジスタ11−・・・・
・・−・出力端子
FIG. 1 is a diagram showing an embodiment of an oscillation circuit according to the present invention, FIG. 2 is a diagram showing an oscillation circuit according to a conventional example, and FIG. 3 is a diagram showing signal waveforms in the embodiment of FIG. i ・---・−・Oscillation transistor 2・−・・Vibrator 5−−・・・Oscillation capacitor 4・・・・・・・・・・Feedback resistor 5−− ・−・, −・Detection circuit transistor 6--・
・--Integrator 7-, ---Reference voltage source 8-- ・--Comparator 9--P-ch transistor 10...
-----・N -ch Transistor 11-...
・・・−・Output terminal

Claims (1)

【特許請求の範囲】[Claims] P−chトランジスタとN−chトランジスタとからな
る相補型MOSトランジスタにより構成された、増幅部
をもつ発振回路において、増幅部のトランジスタの初期
状態における入力電圧レベルに対する、発振波形の上下
の波形対称性を検出する検出手段を有し、前記検出手段
の出力により、増幅部のP−chトランジスタの増幅能
力、又はN−chトランジスタの増幅能力、又はP−c
h、N−ch両方のトランジスタの増幅能力を制御する
ことを特徴とする発振回路。
In an oscillation circuit with an amplification section configured by complementary MOS transistors consisting of a P-ch transistor and an N-ch transistor, the vertical symmetry of the oscillation waveform with respect to the input voltage level in the initial state of the transistor in the amplification section. The output of the detection means detects the amplification ability of the P-ch transistor, the amplification ability of the N-ch transistor, or the P-c
An oscillation circuit characterized by controlling the amplification capabilities of both h- and N-ch transistors.
JP14678090A 1990-06-05 1990-06-05 oscillation circuit Pending JPH0440005A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14678090A JPH0440005A (en) 1990-06-05 1990-06-05 oscillation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14678090A JPH0440005A (en) 1990-06-05 1990-06-05 oscillation circuit

Publications (1)

Publication Number Publication Date
JPH0440005A true JPH0440005A (en) 1992-02-10

Family

ID=15415369

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14678090A Pending JPH0440005A (en) 1990-06-05 1990-06-05 oscillation circuit

Country Status (1)

Country Link
JP (1) JPH0440005A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5719517A (en) * 1993-06-29 1998-02-17 Mitsubishi Denki Kabushiki Kaisha Clock generating circuit for digital circuit operating in synchronism with clock, semiconductor integrated circuit including them, and logical gate used for them

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5719517A (en) * 1993-06-29 1998-02-17 Mitsubishi Denki Kabushiki Kaisha Clock generating circuit for digital circuit operating in synchronism with clock, semiconductor integrated circuit including them, and logical gate used for them

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