JPH0440080A - Video title preparing device - Google Patents

Abstract

PURPOSE:To extract a title signal binarized accurately regardless of the height of the luminance level of a subject and the strength of the contrast by controlling the binarization level of a title extracting means by the output signal of an average luminance level detecting means. CONSTITUTION:This device is equipped with a title extracting means 81 which extracts a title signal from a video signal from a television camera and so on, and a title storing means 50 which stores a signal obtained by the title extracting means 81. Moreover, this device is equipped with an average luminance level detecting means 80 which detects the average luminance level of the video signal, and the binarization reference level of the title extracting means 81 is controlled by an average luminance level obtained by the average luminance level detecting means 80. Thus, the title signal binarized accurately can be obtained regardless of the height of the luminance level of the inputted video signal or the strength of the contrast.

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention is installed in a magnetic recording/reproducing device that stores and plays back video signals on a storage medium, and superimposes pattern signals such as characters on the original video signal. The present invention relates to a video title creation device for recording video titles, and in particular to improvements in pattern extraction means for extracting pattern signals such as characters from video signals obtained from a camera or the like.

[Conventional technology]

Hereinafter, a conventional video title creation device provided in a camera-integrated VTR will be described as an example.

FIG. 4 is a block circuit diagram showing the configuration of a conventional camera-integrated VTR 100. In the figure, 1 is a system control unit, 2 is an imaging device unit that images a subject, converts the captured subject image into an electrical signal and outputs it, and 3 is a unit that converts the video signal output from the imaging device unit 2 onto a magnetic tape. A rotary head type magnetic recording/reproducing unit (hereinafter referred to as rVTR) that records and reproduces data.
).

The system control unit 1 is a circuit block that controls the operation of the entire system, and receives information from various sensors 11 and various operation switches 12 such as a start/stop switch and a playback key, and controls the system by various system control signals 14. In addition to putting it into operation, various display devices 13
Various operation displays are performed.

The imaging device section 2 also includes an imaging section 21, an electrical signal processing circuit 22, a synchronization signal generation circuit 23, a title creation circuit 24,
and an addition circuit 25, and the title creation circuit 24 and addition circuit 25 constitute a title insertion circuit 20.

When performing normal photography, the imaging section 21 forms an image of the subject through a lens on a charge storage section of an imaging device such as a CCD. The object image formed on this charge storage section is scanned by a signal from the synchronization signal generation circuit 23 and read out in the form of a temporally continuous electrical signal. This read electrical signal is converted into a normal television signal by the electrical signal processing circuit 22, and this television signal is output from the imaging device section 2 via the adding circuit 25.

When it is desired to superimpose characters or the like on a subject image, the characters or the like to be superimposed are first imaged through a lens, and this image is converted into an electrical signal and then stored in the memory within the title creation circuit 24. Next, while photographing the subject you actually want to photograph,
An information signal such as a previously stored character is read out from the memory in the title creation circuit 24 using a signal from the synchronization signal generator 23 that is synchronized with the scanning of the charge storage section, and this read information signal is sent to the adder 25. The information signal such as characters is superimposed on the signal obtained from the electrical signal processing circuit 22, and the superimposed signal is output from the signal imaging device section 2.

On the other hand, the VTR section 3 includes a video signal recording circuit 31, a video signal reproducing circuit 32. Drum control circuit 33. The television signal outputted from the imaging device section 2 is converted into an FM modulation signal by the video signal recording circuit 31, and then sent to the recording/reproducing switch 35 and a rotary transformer (not shown). The signal is inputted to the rotating magnetic head 36 via the rotary magnetic head 36, and is recorded on the magnetic tape by the head 36. The drum control circuit 33 is connected to the drum motor 3
The capstan control circuit 34 drives the capstan motor 38 to control the magnetic tape speed to a predetermined speed.

FIG. 5 is a block circuit diagram showing an example of the configuration of the title creation circuit 24. In the figure, 50 is a memory into which binarized image data is written, 51 is an oscillation circuit, 52 is a write/read circuit, and the oscillation circuit 51 It generates various clocks and timing signals from a reference clock input from the memory 50, and also controls writing of data to the memory 50 and reading of data from the memory 50. 54 is a binarization circuit, 55.60 is a shift register, and 56 is a latch circuit.

Next, the operation of the title insertion circuit 20 will be explained using FIGS. 4 and 5.

The luminance signal Y of the subject image is input to the input terminal 53 from the electrical signal processing circuit 22 . This luminance signal Y is binarized by a binarization circuit 54 and sent to a shift register 55. The shift register 55 performs serial/parallel conversion on the binarized data in units of 8 bits, and this parallel output is sent from the write/read circuit 52 and latched into the latch circuit 56 using a timing signal every 8 bits. , are sent to the memory 50.

The write/read circuit 52 receives a control signal 14 from the system control unit 1 through an input terminal 57, receives a write command or a read command based on the control signal 14, and controls writing or reading of the memory 50. Further, synchronization signals corresponding to the vertical synchronization signal VS and the horizontal synchronization signal HS are inputted from the synchronization signal generation circuit 23 via the input terminal 58 and the input terminal 59, and the address of the memory 50 is specified by these synchronization signals. The vertical and horizontal counters are reset, and the vertical and horizontal addresses of the memory 50 are controlled. are sequentially written in 8-bit units.

Next, when a read command is given to the write/read circuit 52 by the control signal 14 input from the input terminal 57, the image data written in the memory 50 under address control from the write/read circuit 52 is read out. The output signal is output, parallel-to-serial converted by the shift register 60, and sent to the adder 25 via the output terminal 61.

FIG. 6 shows an example of the configuration of the binarization circuit 54.

In the same figure, 71 is an input terminal for a luminance signal for obtaining a title signal, that is, the signal Y shown in FIG. A comparator for binarization, 73 an output terminal for outputting a binarized title signal, and 75 a bias circuit section.

Further, R,, RZ, R,, R,, R,, R are fixed resistors, TRI, TR2, and TR3 are transistors, and C is a capacitor.

As shown in FIG. 6, the binarization circuit (pattern extraction means) of the conventional video title creation device uses an LPF 72 to extract a low frequency component of a luminance signal to obtain a title signal, and a capacitor C to extract this low frequency component. A fixed bias is applied to the generated signal, and a binarized title signal is obtained by comparing it with a fixed reference voltage value obtained from the bias circuit section 75 using a comparator ICI.

[Problem to be solved by the invention]

Conventional video title creation devices are configured as described above, so when storing a title, a binary signal cannot be accurately obtained depending on the contrast brightness level of the subject image (video signal for obtaining the title). There was a drawback that there was no

This invention was made to solve the above problems, and provides a video title creation device that can accurately extract a binarized title signal regardless of the brightness level and contrast strength of the subject image. It is an object.

[Means to solve the problem]

A video title creation device according to the present invention includes a title extraction means for extracting a title signal from a video signal, and a title storage means for storing a signal obtained from the title extraction means, wherein the average luminance of the video signal is This device is characterized by being provided with a level detection means.

[Effect]

The present invention has nine components as described above, and the binarization level of the title extracting means is controlled by the output signal of the average brightness level detecting means.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a block diagram of a video title creation device according to an embodiment of the present invention. In the figure, the same components as those in FIG.

81 is a title creation circuit according to this embodiment, and an adder 25
Together, they constitute a title insertion circuit 20. 80 is an average brightness level detection circuit, and electrical signal processing circuit 22
From this average brightness level detection circuit 80, the low frequency component of the brightness signal and the detected average brightness level signal are input to the title creation circuit 81.
will be sent to. Moreover, this average brightness level detection circuit 80,
The title creation circuit 81 includes a synchronization signal generation circuit 2.
3, a vertical synchronization signal and a horizontal synchronization signal are sent out.

Further, a clock signal is sent from the title creation circuit 81 to the average brightness level detection circuit 80.

FIG. 2 is a block circuit diagram showing an example of the configuration of the average brightness level detection circuit 80 and the title creation circuit 81. Components that are the same as those in FIG.

In the figure, 82.83 is an input terminal for the horizontal synchronization signal H3 and vertical synchronization signal VS output from the synchronization signal generation circuit 23, and 85.86 is an input terminal for the signal sent from the average brightness level detection circuit 80 to the title creation circuit 81. Output terminal, 8
4 is an input terminal for the luminance signal output from the electrical signal processing circuit 22, 87 is a low-pass filter (LPF), 88 is an integration circuit, 89 is an average value calculation circuit, 90 is an A/D converter, and 91 is a D/A It is a converter.

Further, 93 and 94 are input terminals for signals output from the output terminals 85 and 86, and 95 is a title creation circuit 81.
This is an output terminal for various clock signals output from
92 is an input terminal of the average brightness level detection circuit 80 connected to this output terminal 95, and 96 is a binarization circuit.

Next, only the points different from the conventional example shown in FIG. 4 regarding the operation of this embodiment will be explained.

A luminance signal for obtaining a title signal output from the electrical signal processing circuit 22 is input to an input terminal 84. The low frequency component of the luminance signal input to the input terminal 84 is extracted by the LPF 87. The output signal of the LPF 87 is sent to the output terminal 85 and also to the A/D converter 90. This A/D converter 90 converts an input analog signal into, for example, a 6-bit digital signal. The 6-bit A/D converter is used in camera-type VTRs currently on the market.
TTL autofocus AF or auto white balance (AWB), which is used in many models of
), and by unifying the number of bits, these AF, A
This is because it has the advantage of being able to be used in common with the A/D converter used for WB.

The signal converted from analog to digital by the A/D converter 90 is sent to the integrating circuit 88. The integrating circuit 88 performs two-dimensional total integration of the output data of the A/D converter 90 in the horizontal and vertical directions in the effective screen area using the horizontal synchronizing signal and vertical synchronizing signal input to the input terminals 82 and 83.

The result integrated by the integration circuit 88 is sent to the average value calculation circuit 89.
The average brightness level is calculated. The output signal of the average value calculation circuit 89 is sent to the D/A converter 91, and an analog signal of the average luminance level is output to the output terminal 86.

Note that various clock signals inputted from the input terminal 92 are sent to the A/D converter 90. Integration circuit 88° Average value calculation circuit 89. The signal is sent to the D/A converter 91 and used as a clock signal for various digital processing.

Output terminals 85 and 86 of average brightness level detection circuit 80
The low frequency component of the luminance signal and the average luminance level signal output from the title generating circuit 81 are input to the binarization circuit 96 of the title creation circuit 81.

The binarization circuit 96 is configured as shown in Fig. 3, and the low frequency component of the luminance signal is binarized using the average luminance level signal as a reference value, regardless of the luminance level of the subject image or the strength of the contrast. Accurately binarized title signals can be extracted.

Further, in the above embodiments, explanations have been given taking a camera-integrated VTR as an example, but the present invention is not limited to this, and can be applied to various devices that extract a title signal from a video signal.

Further, in the above embodiment, the binarization circuit was provided independently, but A
It is also possible to configure a binarization circuit based on the output digital signal of the /D converter 90.

Further, in the above embodiment, the average brightness level detection circuit was explained as a dedicated circuit, but in a camera-integrated VTR,
Many models have similar built-in processing circuits such as autofocus control, and it goes without saying that by sharing these processing circuits, the overall circuit scale can be reduced.

〔Effect of the invention〕

As described above, the video title creation device according to the present invention includes a title extraction means for extracting a title signal from a video signal from a television camera, etc., and a title storage for storing the signal obtained from the title extraction means. An average brightness level detection means for detecting an average brightness level of the video signal is provided, and the average brightness level signal obtained from the average brightness level detection means is used to determine the binarization reference level in the title clap means. Since the present invention is configured to control this, there is an effect that an accurately binarized title signal can be obtained regardless of the brightness level or contrast strength of the input video signal.

[Brief Description of the Drawings] Fig. 1 is a block circuit diagram of a camera-integrated VTR equipped with a video title creation device according to an embodiment of the present invention, and Fig. 2 shows the title creation circuit and average brightness level of this embodiment. FIG. 3 is a block circuit diagram of a configuration example of the detection circuit, FIG. 3 is a block circuit diagram of one configuration example of the binarization circuit of this embodiment, FIG. 4 is a block circuit diagram of a conventional camera-integrated VTR, and FIG. 6 is a block diagram showing an example of the configuration of the title generation circuit of this conventional example, and FIG. 6 is a block circuit diagram showing an example of the configuration of the binarization circuit of this conventional example. In the figure, 1 is a system control section, 2 is an imaging device section, and 3 is a system control section.
is a VTR section, 80 is an average brightness level detection circuit, 81 is a title creation circuit, 87 is an LPF, 88 is an integration circuit, 89
9 is an average value calculation circuit, and 96 is a binarization circuit. In each figure, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] (1) In a video title creation device comprising a title signal extraction means for extracting a title signal from a video signal, and a title storage means for storing the title signal obtained from the title signal extraction means, the average luminance level of the video signal is The video title creation method is characterized in that an average brightness level detection means for detecting the average brightness level is provided, and the binarization reference level in the title extraction means is controlled by the average brightness level signal obtained from the average brightness level detection means. Device.