JPH0440580B2 - - Google Patents

Description

[Detailed description of the invention]

Purpose of the Invention [Field of Industrial Application] The present invention is directed to an automatic transmission control device, particularly an automatic transmission control device that drives and controls a shift solenoid based on shift pattern data and lockup pattern data, and controls the automatic transmission device based on a combination pattern of shift solenoid drive states. The present invention relates to the fail-safe of an automatic transmission control device designed to do so. [Prior Art] In a vehicle equipped with an automatic transmission, the shift position, that is, downshift or The vehicle is equipped with an automatic transmission control device that determines the position to be shifted up and controls the automatic transmission. Control of this automatic transmission has been performed by driving and non-driving a plurality of shift solenoids provided in the automatic transmission. [Problems to be Solved by the Invention] However, if at least one of the plurality of solenoids becomes disconnected or short-circuited and fails, the speed change process based on a predetermined shift pattern cannot be executed. As a result, inappropriate speed change processing and the like are performed. For example, the second
The solenoid failed while driving in the high speed range, and the first
The vehicle may be downshifted to a faster range. In this case, strong engine braking is applied, causing sudden deceleration and giving the driver a large shock. For this reason, there has been a problem in that the ride comfort of the vehicle deteriorates rapidly due to failure of the solenoid. The automatic transmission control device of the present invention aims to solve the above-mentioned problems and suppress the rapid deterioration of vehicle ride comfort caused by solenoid failure. Structure of the Invention [Means for Solving the Problems] A first invention made to solve the above problems, as illustrated in FIG. M1; vehicle speed detection means M2 for detecting the speed of the vehicle; load detection means M3 for detecting the engine load of the vehicle; a solenoid control means M4 that controls driving/non-driving of the solenoid M1 according to the engine load, and sets a speed change state of the automatic transmission to a speed change state that corresponds to the vehicle speed and the engine load; and the plurality of solenoids M1. an abnormality detecting means M5 for detecting individual abnormalities in the abnormality detecting means M5; and when an abnormality in at least one solenoid is detected by the abnormality detecting means M5, controlling driving/non-driving of normal solenoids other than the solenoid in which the abnormality has been detected; and a predetermined speed change state determined in advance according to the abnormality of the solenoid so that the speed change state of the automatic transmission is shifted up from the speed change state set by the solenoid control means M4 without being downshifted. The gist of the present invention is to include a guarantee means M6 for setting a gear change state of the automatic transmission. Further, a second invention includes: a plurality of solenoids M1 that perform switching control of a transmission mechanism of an automatic transmission; vehicle speed detection means M2 that detects the speed of a vehicle; load detection means M3 that detects an engine load of the vehicle; According to a predetermined shift pattern related to the vehicle speed and engine load, driving/non-driving of the solenoid M1 is controlled according to the vehicle speed and the engine load, and a gear shift state is established according to the vehicle speed and engine load. a solenoid control means M4 that sets a gear change state of the automatic transmission; an abnormality detection means M5 that detects an abnormality of each of the plurality of solenoids M1; and an abnormality of at least one solenoid is detected by the abnormality detection means M5. When the solenoid control means M
4, and the speed change state of the automatic transmission is close to the speed change state set by the solenoid control means M.
a guarantee means M6 for setting the shift state of the automatic transmission to a predetermined shift state determined in advance according to the abnormality of the solenoid so that the shift state is not downshifted from the shift state set by M4; The main purpose is to have the following. [Operation] As illustrated in FIG. 6, the automatic transmission control device of the first invention adjusts the vehicle speed and load detected by the vehicle speed detection means M2 according to a predetermined shift pattern related to the vehicle speed and engine load. Detection means M
The solenoid control means M4 controls driving/non-driving of the solenoid M1 in accordance with the engine load detected in step 3, and sets the speed change state of the automatic transmission to a speed change state according to the vehicle speed and the engine load. When setting this speed change state, if the abnormality detection means M5 detects an abnormality in at least one solenoid, the guaranteeing means M6 controls driving/non-driving of normal solenoids other than the solenoid in which the abnormality has been detected. , the automatic transmission is brought into a predetermined speed change state according to the abnormality of the solenoid so that the speed change state of the automatic transmission is not downshifted but upshifted from the speed change state set by the solenoid control means M4. Set the gear shift status. In other words, when the solenoid is abnormal, the automatic transmission is set to a predetermined speed change state that is predetermined according to the solenoid abnormality, and the predetermined speed change state is set by the solenoid control means M4. It is determined that the shift state is not downshifted but upshifted.
Therefore, even when the speed change state set by the solenoid control means M4 according to the vehicle speed and engine load cannot be realized due to a solenoid abnormality, a speed change state that is shifted up from the speed change state set by the solenoid control means M4 can be realized. Ru. Further, in the second invention, the abnormality detection means M5
When an abnormality in at least one solenoid is detected, the guaranteeing means M6 controls driving/non-driving of normal solenoids other than the solenoid in which the abnormality has been detected, and changes the speed change state set by the solenoid control means M4. Automatically shifts to a predetermined shift state determined in advance in response to a solenoid abnormality so that the shift state of the automatic transmission is shifted up without being downshifted from the shift state set by the solenoid control means M4. Set the gear shift status of the machine. Therefore, even when the speed change state set by the solenoid control means M4 according to the vehicle speed and engine load cannot be realized due to a solenoid abnormality, the speed change state is close to the speed change state set by the solenoid control means M4 and is controlled by the solenoid control means M4. A shift state that is shifted up from the set shift state is realized. By each component of the present invention acting as described above,
The technical problem of the present invention is solved. [Example] Hereinafter, an example of the present invention will be described based on the drawings. FIG. 1 shows the configuration of an embodiment of a shift control system for an automobile to which an automatic shift control device according to the present invention is applied. In the figure, 1 is an automatic transmission, and 2 is an automatic transmission control device, which is a shift solenoid of the automatic transmission 1 (hereinafter referred to as the first shift solenoid).
3 and another shift solenoid (hereinafter referred to as the second shift solenoid) 4 and lock-up solenoid 5
3 is a first shift solenoid, and a second shift solenoid 4 selects and specifies a first speed region, a second speed region, a third speed region, or an overdrive region by four combinations of each other. 4 is a second shift solenoid, and 5 is a lock-up solenoid, which drives and controls a lock-up means (not shown) arranged in parallel with a torque converter (not shown), and converts the engine output into a torque converter. 6 is a key switch, 7 is a brake switch, 8 is a brake light, 9 is a key switch, 7 is a brake switch, 8 is a brake lamp, and 9 is a key switch. 10 is a pattern select switch, which is used by the driver to select a desired driving mode from among three driving modes, namely normal mode, power mode, and economy mode; 10 is a throttle sensor, which has one idle contact and 3 11 is a vehicle speed sensor (hereinafter referred to as the first vehicle speed sensor) which corresponds to a speedometer drive pulse signal. The first traveling speed signal
The one that outputs SP1, 12 is another vehicle speed sensor (hereinafter referred to as the second vehicle speed sensor), which is disposed on the output shaft of the automatic transmission and outputs a pulse signal with a frequency corresponding to the traveling speed, that is, the second traveling speed. Signal SP2
13 is a shift lever switch that indicates reverse range (R range), drive range (D range), low range (L range), and second range (S range) that indicates the lowest gear.
14 is a constant speed running control device which outputs an overdrive cut signal, that is, an O/D cut signal when a deceleration of, for example, 10 km/h or more occurs while driving in an overdrive region; 15 is an engine control device; 16 represents a tester that outputs a signal instructing lock-up prohibition when the engine temperature is low, and 16 represents a tester that is connected to the automatic transmission control device 2 when performing diagnosis. Further, in the automatic transmission control device 2, 17 is a CPU, ROM,
A microcomputer consisting of RAM, 18 a constant voltage circuit, 19 an input buffer, 20 a reset circuit, 21 a crystal oscillator, 22, 23 and 24
are the output stage and short circuit detection circuit, respectively, 25
represent the diagnosis output buffers, respectively. When key switch 6 is turned on, constant voltage circuit 1
8 is activated and the reset circuit 20 operates to reset the microcomputer 17 and the output buffer 2.
2, 23, and 24 are reset. The microcomputer 17 has a storage unit ROM,
Storage unit with RAM and arithmetic processing unit CPU
The ROM stores in advance shift pattern data corresponding to the shift patterns shown in FIGS. 2A to 2C and lockup pattern data corresponding to the lockup patterns shown in FIGS. 3A to 3C. are doing. Here, the shift pattern shown in FIG. 2A is a pattern that is selected when the driving mode is normal mode or economy mode and determines the shift position. The stepped solid line and 3-O/D represent the upshift position that determines the upshift from the range to the second speed range, and similarly correspond to the other symbols 2-3 and 3-O/D.
The stepped solid lines corresponding to the above represent the upshift position that determines the upshift from the second speed range to the third speed range, and the upshift position that determines the upshift from the third speed range to the overdrive range, respectively. Also, codes 2-1, 3-2 and O/D
-3, respectively, indicate downshift positions that determine downshifts from the second speed region to the first speed region, from the third speed region to the second speed region, and from the overdrive region to the third speed region. It represents. Furthermore, the shift pattern as shown in FIG. 2B is a pattern that determines the selected shift position when the driving mode is power mode, while the shift pattern as shown in FIG. 2C is a pattern that determines the selected shift position when the driving mode is power mode and Shift lever switch 13
This pattern is selected when the highest speed is limited to the third speed region by selecting the S range. and the stepped solid lines and dashed lines in Figures 2B and 2C and 1
-2,2-3,3-O/D,O/D-3,3-
2 and 2-1 respectively correspond to those described above in FIG. 2A. As is clear from FIG. 2B, the power mode shift pattern is configured such that the entire shift position is located to the right in the drawing compared to the normal mode or economy mode shift pattern, and is shifted when the traveling speed is high. On the other hand, the lockup pattern as shown in FIG. 3A is a pattern that is selected when the driving mode is the normal mode and determines the lockup position.
The solid line corresponding to the symbol 2ON in the diagram indicates that the car is the second
It represents the lock-up on position where the lock-up solenoid 5 is actuated while driving in the speed range, and similarly the solid line and O/DON corresponding to the other symbols 30N
The solid lines corresponding to the above represent the lock-up on position where the lock-up solenoid 5 is operated when the vehicle is running in the third speed range and the lock-up on position where the lock-up solenoid 5 is operated when the vehicle is running in the overdrive range, respectively. Also, the code 2OFF, 3OFF
The broken lines corresponding to O/DOFF and O/DOFF indicate the lock-up-off position at which the lock-up solenoid 5 is released when the vehicle is running in the second speed region, third speed region, and overdrive region, respectively. Furthermore, the lockup pattern as shown in FIG. 3B is a pattern that determines the lockup position selected when the driving mode is the economy mode, while the lockup pattern as shown in FIG. 3C is a pattern that determines the lockup position selected when the driving mode is the power mode. This pattern is selected to determine the lock-up position when the shift lever switch 13 is in the normal mode and the S range is selected by the shift lever switch 13. And the solid lines, dashed lines and 2ON, 3ON, O/DON, 2 in Figures 3B and 3C.
The symbols OFF, 3OFF, and O/DOFF respectively correspond to those described above in FIG. 3A. Of course, these lock-up patterns are set in consideration of the shift processing based on the shift pattern and the relationship between the magnitude of engine torque and the lock-up processing.For example, when an automatic transmission selects the first gear range, In order to prevent engine stalling and engine knocking, each pattern is set so that the engine does not lock up in any driving mode when the engine is running, and the shift position in economy mode is set to the same position as in normal mode and power mode for all speed ranges. It is set on the lower speed side compared to each lockup position. That is, in the economy mode, lock-up-on and lock-up-off occur at relatively low speeds, making it possible to realize economical driving even more effectively. Next, an example of the processing operation of the arithmetic processing section of the microcomputer 17 will be sequentially explained with reference to the flowchart shown in FIG. 4A. F-1 First, after performing initialization processing (step 100), vehicle speed (SP2) calculation processing for calculating the traveling speed based on the second traveling speed signal SP2 inputted from the second vehicle speed sensor 12 (step 102) Do this. This arithmetic processing is performed using iRQ, which will be described later in the flow chart shown in FIG.
(SP2) This is performed using the number of clocks calculated by the interrupt routine as a parameter. F-2 Next, it is determined whether 10 msec has elapsed (step 104), and if it has not yet elapsed, timer processing is performed (step 110), whereas if it has elapsed, a predetermined flip-flop is inverted. (Step 106) After indicating that the CPU is in a normal state, it is possible to receive switch input (Step 108). Therefore, output signals from pattern select switch 9, throttle sensor 10, first vehicle speed sensor 11, shift lever switch 13, constant speed cruise control device 14, and engine control device 15 are inputted from input buffer 19. Next, perform timer processing to specify the timing of various processes performed by the CPU (step
110). F-3 Next, vehicle speed (SP1) calculation processing is performed based on the first traveling speed signal SP1 from the first vehicle speed sensor 11 to calculate the traveling speed (step
112). F-4 Next, when the accelerator pedal is suddenly released during sudden accelerator processing, that is, in the lock-up on state, the lock-up is turned off and the off state is maintained for 0.1 seconds.
A process is performed to maintain the data for a period of time (step 114). F-5 Then, based on the output signal from the shift lever switch 13 taken in as described above, the shift lever L is determined (step 116).
When it is determined that the shift lever is set in the L range, a shift lever L process (step 118) is performed in which a shift pattern prepared in advance is read out from the storage section, separately from the shift pattern and lock-up pattern as described above. After getting used to it, the shift judgment process (step 132) is started. F-6 On the other hand, if it is determined that the shift lever is not set to the L range, it is determined whether 0.5 seconds have not yet elapsed since the L range was reset using the L determination delay determination (step 120). However, if it is determined that the L judgment is delayed, the above-mentioned shift lever L processing (step 118) is performed.
After that, the process moves to shift determination processing (step 132). On the other hand, if it is determined that the L judgment is not delayed, a pattern search process (step 122) is performed, that is, shift pattern data corresponding to the shift patterns shown in FIGS. 2A to 2C and FIGS. 3A to 3C. The lockup pattern data corresponding to the lockup pattern shown in FIG. A process is performed to determine whether or not to be forcibly downshifted from the overdrive region to another driving region, and then the shift lever S determination is made (step 126). This (step 126)
Then, based on the output signal from the shift lever switch 13, it is determined whether the shift lever is set to the S range or not. If it is determined that the S range is set, the shift lever S process (step 128), that is, the above-mentioned process is performed. Data related to the overdrive region is invalidated from the shift pattern data and lockup pattern data read in the pattern search (step 122), and only data related to each region of the 2nd speed region and 3rd speed region is used for the shift judgment described later. (Step 132)
Then, the data is processed to be used in the lock-up process (step 134). Then, the process moves to shift determination processing (step 132). On the other hand, if it is determined that the shift lever is not set to the S range, it is determined that the S determination is delayed (step
130), and if it is determined that there is a delay, the shift lever S process (step 128) described above is performed, and then the shift judgment process (step 132) is performed.
If it is determined that there is no delay, the process moves directly to shift determination processing (step 132). F-7 The shift judgment process (step 132) uses the shift pattern data searched by the pattern search process (step 122) described above, the traveling speed data calculated by the vehicle speed (SP2) calculation process (step 102) described above, and the throttle. Based on the throttle opening data corresponding to the throttle opening signal from the sensor 10 and the driving mode data corresponding to the driving mode designation signal from the pattern select switch 9, it is determined whether to shift up or down, or to shift up or down. Decide whether to do any of the following. In this case, vehicle speed (SP2) calculation processing (step
102) is the second
If it is determined that the vehicle speed sensor 12 is inaccurate due to a malfunction or the like, other traveling speed data calculated by the above-mentioned SP1 calculation (step 112) is substituted. F-8 Next, lockup processing (step 134)
In other words, the pattern search processing (step
Based on the lock-up pattern data, throttle opening data, driving mode data, and driving speed data read by 122), it is determined whether to lock-up on or lock-up off, or whether to perform neither lock-up on nor lock-up off. do. Specifically, when the running mode is normal mode and a range other than S range or L range is specified, lockup processing is performed based on a lockup pattern as shown in FIG. 3A, To give one example, while driving in the 3rd speed region, when the intersection of the output shaft rotation speed and the throttle opening is located to the right of the solid line corresponding to 3ON as the boundary line, the lock-up solenoid 5 is turned on. , while the above intersection is 3
When the broken line corresponding to OFF is located on the left side, the lock-up solenoid 5
is turned off, and when the above-mentioned intersection point is still located within the area surrounded by the solid line corresponding to 3ON and the broken line corresponding to 3OFF, the lock-up solenoid 5 is maintained in the previous driving state, that is, the on state or the off state. let When the vehicle is running in other speed ranges, ie, the second speed range or the overdrive range, lockup processing similar to the lockup processing when running in the third speed range described above is performed. However, when running in the first speed region, lock-up processing is not performed in view of the fact that it is undesirable to perform lock-up processing in terms of power transmission as described above, and lock-up processing is not performed during other driving modes for the same reason. When the driving mode is the economy mode, lockup processing is performed based on the lockup pattern shown in Figure 3B, while when the driving mode is the power mode, or when the driving mode is the normal mode and the S range is When selected, lockup processing is performed based on a lockup pattern as shown in FIG. 3C. Each of these lockup processes is performed in the same way as the lockup process based on the lockup pattern data as shown in FIG. 3A as described above. F-9 Next, fail safe processing (step 136)
Do this. This process will be explained below. The shift solenoids 3 and 4 and the shift have a relationship as shown in Table 1 below.

[Table] However, in Table 1, solenoid S1 represents the first shift solenoid 3, and solenoid S2 represents the second shift solenoid 4. When both the solenoids S1 and S2 are operating normally, the driving states of the solenoids S1 and S2 are designed in advance as shown in Table 1 in relation to the shift. Therefore, if a failure occurs in solenoid S1 or solenoid S2 and the solenoid S1 or S2 becomes short or disconnected, it may shift up or down according to the pattern in Table 1 at the same time as the failure occurs. If the gear is shifted from 2nd gear to 1st gear, the output power will suddenly drop and sufficient acceleration will not be obtained. On the other hand, if the downshift is from 2nd gear to 1st gear, a sudden deceleration will occur. come to arise. Taking this point into account, in order to minimize the driving disturbance as much as possible, as shown in Table 2 below, when a failure occurs, the transition to the failure shift is masked, and the shift to the control shift is forcibly performed. This is to prevent undesired upshifts or downshifts. for example,
If the solenoid S1 fails while traveling in the first speed range, the vehicle is forcibly shifted to the third speed range without shifting to the overdrive range. Furthermore, if the solenoid S2 fails while the vehicle is running in the second speed range, the vehicle is forcibly shifted to the overdrive range without shifting to the first speed range. In this manner, in response to an abnormality that causes a downshift, a shift state that causes an upshift is set, and in response to an abnormality that causes a shift up, a shift state that is close to the shift state before the failure is set. Here, the detection circuit for detecting solenoid failure is

[Table] They correspond to the symbols 22, 23, and 24 shown in FIG. 1, and their specific configuration is as shown in FIG. 5. Note that this detection circuit not only simply detects a failure, but also determines the drive state of the solenoid based on the input signal from the microcomputer 17, that is, the solenoid drive control signal. The configuration and processing operation of this circuit will be sequentially explained below. In Figure 5, 3, 4, 5, 17,
Reference numerals 22, 23 and 24 correspond to the same reference numerals shown in FIG. 29 is a detection transistor which detects the normal state, shot state, and disconnection state of the solenoid 3, 4, or 5, and controls the switching of the power supply transistor 26 via the transistor 28. A bypass transistor 30 outputs a status signal to the microcomputer 17, and when a shot failure occurs in the solenoid 3, 4, or 5, it turns on and turns off the power supply transistor 26, thereby protecting the power supply transistor 26 from overcurrent damage. respectively. In order to maintain the driving state of the solenoid 3, 4, or 5 in a non-operating state, that is, an off state, the microcomputer 17 outputs a high-level signal as a solenoid drive control signal. In other words, this high-level signal maintains the control transistor 27 in the on state and the transistor 28 in the off state,
The power supply transistor 26 is maintained in an OFF state, and the solenoid 3, 4, or 5 is maintained in an OFF state. If the solenoid 3, 4, or 5 is in a normal state while the solenoid 3, 4, or 5 is in the off state, the detection transistor 29 is maintained in the off state, so a high-level signal continues to be output to the microcomputer 17 as a solenoid state signal. On the other hand, when a disconnection occurs in the solenoid 3, 4, or 5, the detection transistor 29 turns on, so that the microcomputer 17 outputs a low-level signal. Therefore, the microcomputer 17 can determine that a disconnection failure has occurred in the solenoid 3, 4, or 5 from the occurrence of the level reversal of the solenoid status signal. On the other hand, the occurrence of a short failure can be detected as follows. When the microcomputer 17 determines that the solenoid 3, 4, or 5 should be turned on, that is, activated while the solenoid 3, 4, or 5 is maintained in the off state, the microcomputer 17 outputs a solenoid drive control signal. As a result, a low level signal is now input. This low level signal turns off the control transistor 27, turns on the transistor 28, turns on the power supply transistor 26, and turns on the solenoid 3, 4 or 5.
turns on. If the solenoids 3, 4, or 5 are in a normal state at this point, the detection transistor 29 is turned on due to the rise in collector voltage accompanying the turn-on of the power supply transistor 26, so that the solenoid state signal is inverted to a low level value. On the other hand, if the solenoids 3, 4, or 5 are in the shot state at the above-mentioned time point, an overcurrent flows through the power supply transistor 26, and the forward voltage between the base and emitter of the bypass transistor 30 increases, causing the bypass transistor 30 to turn on, and the power supply transistor 26 to turn off. Therefore, the power supply to the solenoid 3, 4, or 5 is stopped and maintained in an off state, and the power supply transistor 26 is protected from overcurrent. Further, since the detection transistor 29 is still maintained in an off state because the collector voltage of the power supply transistor 26 does not rise sufficiently, the solenoid state signal is still maintained at a high level value. Therefore, the microcomputer 17 determines that a shoot failure has occurred since the solenoid status signal is not inverted and is still maintained at a high level value, and outputs a high level signal as a solenoid drive control signal. Thereafter, the microcomputer 17 periodically outputs a pulse signal having a pulse width, that is, a low level value time width of about 1 msec, as a solenoid drive control signal in order to investigate whether or not the shot failure has been recovered. If the solenoid 3, 4, or 5 is still in the shot state at the time of inputting this pulse signal, a circuit operation similar to that when the solenoid drive control signal is inverted to a low level value as described above is performed, and the detection transistor 29 is maintained off, so the solenoid status signal remains high. On the other hand, if the solenoid 3, 4 or 5 has returned to its normal state at the time of the fall,
The feed transistor 26 is turned off and maintained in the on state, the solenoid 3, 4, or 5 is inverted and maintained in the on state, and the detection transistor 29 is turned on and maintained in the on state. Therefore, since the solenoid status signal is inverted and maintained at a low level value, the microcomputer 17 selects the solenoid 3, 4 or 5.
It can be determined that the system has recovered from the short state. Then, the microcomputer 17 outputs a low-level signal as a solenoid drive control signal to operate the restored solenoid 3, 4, or 5. The fail-safe processing (step 136) described above actually uses the solenoid status signal detected at the solenoid output (step 138) during the previous main routine execution as judgment data to determine the solenoid that should be output during the current main routine execution. This is the process of determining the drive control signal, and the output process of the solenoid drive control signal is performed at the next solenoid output (step 138). F-10 Next, the solenoid output (step 138) is executed and the shift judgment as described above (step 138) is executed.
132), the first solenoid drive pattern determined in the lockup process (step 134) and failsafe (step 136).
A shift solenoid drive control signal is output to the shift solenoid 3 and the second shift solenoid 4, and a lock-up solenoid drive control signal is output to the lock-up solenoid 5. Therefore, these drive control signals cause the solenoids 3 and 3 to operate as described above.
Driving states 4 and 5 are determined. F-11 Next, diagnosis processing (step
140). In this process, first the traveling speed is 9km/
If the traveling speed is less than 9 km/h and the solenoid 3, 4 or 5 is malfunctioning, the output voltage of the diagnosis output buffer 25, i.e. Keep the control output voltage constant at 8V, and keep the control output voltage constant at 0V when the traveling speed is less than 9km/h, solenoids 3, 4, and 5 are normal and vehicle speed sensor 11 or 12 is malfunctioning. In addition, when the traveling speed is less than 9 km/h, solenoids 3, 4 and 5 are normal, and vehicle speed sensors 11 and 12 are normal, the output ranges from 0V to 8V in proportion to the throttle opening. It is determined that 0V should be output when the contact is closed and the idle contact is on, 1V should be output when the contact is fully closed and the idle contact is off, and 8V should be output when the contact is fully open.
On the other hand, if the traveling speed is 9 km/h or more, it is determined that a voltage proportional to the shift should be output as shown in Table 3 below. However, in Table 3,
L/U corresponds to the case where the lock-up solenoid 5 is in the on state, and the first speed L/U corresponds to the case where the first shift solenoid 3 and the lock-up solenoid 5 are in a short-circuit state in the first speed region, resulting in a pseudo state. This corresponds to a situation where a lockup is occurring.

【table】

[Table] These judgment results are stored as data in the memory.
Diagnosis output processing in the timer interrupt routine stored in RAM and described later (step 304)
used in In other words, this diagnosis processing (step 140) can be considered to be a preprocessing, that is, an internal processing, of the diagnosis output processing (step 304) of the timer interrupt routine. Note that each of the above control output voltages is expressed as an analog voltage value obtained by converting a pulse voltage of about 30 Hz into an analog voltage level by selecting a duty ratio. In this way, in the main routine, the above F-
1 to F-11 are repeated. FIG. 4B shows a flowchart of the iRQ (SP2) interrupt routine and the timer interrupt routine that are performed in conjunction with the above-mentioned main routine. Both interrupt routines will be explained below. The iRQ interrupt routine uses the second traveling speed signal SP2 repeatedly input from the second vehicle speed sensor 12.
A series of processing starts at the rising or falling edge of . That is, first, register saving processing (step 200) is executed to save the contents of register data in a predetermined register, and then it is determined whether or not there is a timer interrupt (step 202). When it is determined that there is a timer interrupt, the process shifts to the timer interrupt routine, performs each process and operation after the TH←0FH process (step 302) shown in the timer interrupt routine, and then returns to the interrupt interval described later. Judgment of number of times (step
204). On the other hand, if it is determined that there is no timer interrupt, the interrupt interval count determination (step
204) to determine, for example, whether the interrupt interval is less than four times or four times. When it is determined that the interrupt interval is four, a clock number calculation process (step 206), that is, a process for counting the number of clocks from the previous process to the current process is executed. In other words, the time width from when the first pulse signal is input until when the fifth pulse signal is input is calculated. Note that the number of clocks counted by this calculation process (step 206) is based on the vehicle speed (SP2?1) of the main routine described above.
It is used as a parameter for vehicle speed calculation in the calculation process (step 102). After executing the clock number calculation process (step 206) or after determining that the interrupt interval is less than four times by determining the number of interrupt intervals (step 204), a diagnosis process regarding the vehicle speed sensor 11 (step 208) is performed. . The saved data is then set in the original register (step 316). In this way, in the iRQ interrupt routine, a parameter for calculating the vehicle speed (SP2) is generated based on the second traveling speed signal SP2 from the second vehicle speed sensor 12, and at the same time the first
Diagnosis processing regarding the vehicle speed sensor 11 is performed. On the other hand, when a timer interrupt occurs at a predetermined timing, for example, at a time interval of 1.7 msec, a timer interrupt routine is executed for each timer interrupt. First, execute the register saving process (step 300) and
TH←0FH processing (step 302), that is, processing to initialize the timer value of the reference clock, and diagnosis output processing (step 304), that is, the diagnosis processing of the above-mentioned main routine and iRQ interrupt routine (steps 140, 208). Based on the data obtained by the execution, processing is performed so that a control output voltage having a corresponding voltage level value can be outputted from the diagnosis output buffer 25 to the outside. and diagnosis and
Outputs a signal indicating that the CPU is operating normally (step 306), iTM←iTM+1 (step 308), that is, performs processing to store the number of timer interrupts during one round of the main routine,
iRQTM←iRQTM+1 (step 310), that is, the process of adding the vehicle speed calculation timer is performed, and SP1 sampling process (step 312), that is, the first traveling speed signal SP1 from the first speed sensor 11 is sampled, and the main routine described above is performed. The data is used for the SP1 calculation step, and a process for performing diagnosis regarding the second vehicle speed sensor 12 is executed. Then, it is determined whether the interrupt is an iRQ interrupt, which is a timer interrupt (step 314), and in the former case, the saved registers are restored (step 316), and the series of processing is completed.
The process moves to determining the number of interrupt intervals in the iRQ interrupt routine (step 204), and the subsequent processes are performed in the same manner as described above. In this way, in the timer interrupt routine, the first vehicle speed sensor 1
The signal SP1 from 1 is sampled to generate data for the SP1 calculation step, and at the same time diagnosis is performed on another signal SP2, and information regarding the diagnosis processing is output to the diagnosis output buffer 25, so that the CPU can operate normally. Outputs a signal to the outside indicating that it is operating. Note that to detect the engine load, other detectors such as a negative pressure sensor that detects the intake air negative pressure in the intake pipe may be used instead of the throttle sensor 10. As described above, this embodiment is configured to perform fail-safe processing, so it is possible to sufficiently and easily prevent deterioration in driving performance and ride comfort caused by upshifting or downshifting due to solenoid failure. That is, in response to a downshift abnormality, a shift state is set to upshift to prevent sudden engine braking, thereby suppressing a sudden deterioration in ride comfort. On the other hand, in the case of an abnormal shift up, the deterioration of driving performance due to a decrease in output can be suppressed by setting the shift state close to the shift state before the failure to prevent a significant shift up. Further, since lock-up engagement can be prohibited in the first speed range, the vehicle can maintain good running condition even if the solenoid fails. Furthermore, as part of fail-safe processing, the vehicle speed sensors are duplicated, so that if one vehicle speed sensor fails, the other sensor can be used as a backup, thereby improving the reliability of maintaining driving performance. Additionally, the automatic transmission is controlled based on the optimal combination of shift pattern and lock-up pattern selected according to the set driving mode, reducing energy loss in the torque converter and improving power transmission efficiency. By doing so, fuel consumption efficiency can be improved. Furthermore, according to this embodiment, since the diagnosis process is performed on the solenoid of the automatic transmission, it is possible to quickly detect a failure location by appropriately performing self-diagnosis of the solenoid.
The maintainability of the automatic transmission is also improved. Effects of the Invention As described in detail above, according to the present invention, even when a desired shift state according to the vehicle speed and engine load cannot be achieved due to an abnormality in the solenoid disposed in the automatic transmission, the shift state can be changed from that shift state. The specified gear shifting state is realized. Therefore, the occurrence of sudden engine braking due to an unexpected downshift is prevented, and the driver is not given a large shock. As a result, an excellent effect is achieved in that rapid deterioration of ride comfort due to solenoid failure can be suppressed. Furthermore, safer control is possible. Furthermore, according to the automatic transmission control device of the second invention,
Even when a desired shift state cannot be achieved due to an abnormality in the solenoid, a shift state that is close to the desired shift state and that is shifted up from the desired shift state is achieved. Therefore, in addition to the above-mentioned effects, it is possible to drive the vehicle closer to normal conditions. Therefore, a significant shift-up caused by a solenoid failure is prevented, and deterioration of driving performance due to a sudden drop in output is suppressed.

[Brief explanation of drawings]

Fig. 1 is a configuration diagram of an embodiment of the present invention, Fig. 2A,
B and C are graphs showing the shift pattern, FIGS. 3A, B, and C are graphs showing the lock-up pattern, FIGS. 4A and B are flowcharts showing the control, and FIG. 5 is the same. FIG. 6, a circuit diagram showing the failure detection circuit, is a basic configuration diagram conceptually illustrating the contents of the present invention. M1...Solenoid, M2...Vehicle speed detection means,
M3... Load detection means, M4... Solenoid control means, M5... Abnormality detection means, M6... Security means, 1... Automatic transmission, 2... Automatic transmission control device, 3, 4... Shift solenoid, 5... Lock-up solenoid, 10... Throttle sensor,
11...First vehicle speed sensor, 12...Second vehicle speed sensor, 17...Microcomputer, 22,2
3, 24...Output stage and disconnection shot detection circuit.

Claims (1)

[Scope of Claims] 1. A plurality of solenoids that perform switching control of a transmission mechanism of an automatic transmission, a vehicle speed detection means that detects the speed of a vehicle, a load detection means that detects an engine load of the vehicle, and a vehicle speed and engine. The solenoid is actuated according to the vehicle speed and the engine load according to a predetermined shift pattern related to the load.
a solenoid control means for controlling non-driving and setting the speed change state of the automatic transmission to a speed change state according to the vehicle speed and engine load; an abnormality detection means for detecting an abnormality in each of the plurality of solenoids; When an abnormality in at least one solenoid is detected by the detection means, driving or non-driving of normal solenoids other than the solenoid in which the abnormality has been detected is controlled, and the gear change state of the automatic transmission is set by the solenoid control means. and ensuring means for setting the shift state of the automatic transmission to a predetermined shift state determined in advance in response to the abnormality of the solenoid so that the shift state is not downshifted from the shift state where the automatic transmission is shifted up. An automatic transmission control device featuring: 2. A plurality of solenoids that perform switching control of the transmission mechanism of an automatic transmission; a vehicle speed detection means that detects the speed of the vehicle; a load detection means that detects the engine load of the vehicle; According to a predetermined shift pattern, the solenoid is driven and driven according to the vehicle speed and the engine load.
a solenoid control means for controlling non-driving and setting the speed change state of the automatic transmission to a speed change state according to the vehicle speed and engine load; an abnormality detection means for detecting an abnormality in each of the plurality of solenoids; When an abnormality in at least one solenoid is detected by the detection means, driving/non-driving of normal solenoids other than the solenoid in which the abnormality has been detected is controlled, and the solenoid is close to the speed change state set by the solenoid control means, and without the gear shift state of the automatic transmission being downshifted from the gear shift state set by the solenoid control means;
An automatic transmission control device comprising: a guarantee means for setting the transmission state of the automatic transmission to a predetermined transmission state according to an abnormality of the solenoid so that the automatic transmission is shifted up.