JPH0441845B2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field to which the Invention Pertains] The present invention relates to electronic measuring instruments, electronic control devices, etc., in which the rise and fall times included in a single pulse signal to be measured are shorter than the duration of the pulse signal to be measured. The present invention relates to a noise removal circuit for reducing or removing long single-shot or periodic noise.

[Prior art and its problems]

When attempting to evaluate the characteristics of a test object by measuring or observing the waveform, peak value, or frequency of occurrence of a pulse signal to be measured that is input to an electronic measuring device from the electrical equipment or mechanical device being tested, If the level of periodic noise such as broadcast radio waves that enters the measurement circuit when the object acts as an antenna, or single-shot noise such as switching noise or discharge noise that enters the measurement circuit via the power system etc. is high, the measurement may be interrupted. The S/N ratio of the circuit and the like decreases, resulting in a decrease in the accuracy of evaluating the characteristics of the object. Therefore, noise removal has become an important issue in electronic measuring instruments and the like.

Conventionally, as a noise removal circuit, it is common to use a filter whose passband is the main frequency component included in the pulse signal to be measured.However, in order to improve the S/N ratio, the pulse If the signal waveform is distorted or oscillated and the passband width is widened, there is a problem that the S/N ratio for noise in the waveform close to the main frequency component of the pulse signal decreases, and it is difficult to achieve satisfactory noise removal performance and the pulse signal. The reality is that it has not been possible to obtain a noise removal circuit that also has the ability to maintain the original waveform.

Figure 6 is a configuration diagram of an improved conventional noise removal circuit, showing an example of its application to a partial discharge test circuit for high-voltage electrical equipment such as power cables. (See paper, No. 1283). In the figure, 1 is the power cable that is the object to be inspected;
2 is a terminal bushing for applying a test voltage to the power cable 1, 3 is a coupling capacitor for partial discharge pulse detection, 4 is a detection impedance, 5 is a noise removal circuit consisting of a delay line 6 and an adder circuit 7, and 8 is a partial This is a discharge pulse amplification circuit.

FIG. 7 is a signal waveform diagram for explaining the operation of the noise removal circuit shown in FIG.
show the output signal waveform of the input circuit 10 (terminal voltage of the detection impedance 4), the output signal waveform of the delay line 6, and the output signal waveform of the adder circuit 7, respectively. In the figure, the input signal W4 includes a partial discharge pulse _P1, which is a signal to be measured, and a periodic noise _N1 having a period τ. The delay line 6 is formed to have a delay time corresponding to one-half period (τ/2) of the periodic noise N ₁ , so that its output waveform W 6 is equal to the input signal for both the noise N ₂ and the discharge pulse P ₂ They are output with a delay of τ/2 hours from N ₁ and P ₁ , respectively. As a result, the noises N ₁ and N ₂ of the input signals W4 and W6 input to the adder circuit 7 have opposite phases to each other, and are erased by adding them together, but the discharge pulses P ₁ and P ₂ is output as is, and a discharge pulse train increased to two signal pulses P ₁ and P ₂ by passing through the noise removal circuit 5 is input to the amplifier circuit 8, and for example, the discharge pulse train is input to the output terminal 9.
It is observed by observation equipment connected to.

As mentioned above, in the noise removal circuit configured as shown in FIG. 6, the periodic noise is delayed by one-half period by the delay line 6 to create a delayed pulse with the opposite phase to the input noise, and both are added. Since the delay time of the delay line 6 must be adjusted to match the period of the periodic noise, it is also necessary to use multiple sets of noise removal circuits if there are multiple types of periodic noise. The problem is that it requires Furthermore, if the noise is a one-off noise similar to a discharge pulse, there is a problem in that the number of noise pulses is doubled.

[Purpose of the invention]

The present invention was made in view of the above-mentioned situation, and
The purpose of the present invention is to provide a noise removal circuit that can attenuate or remove single-shot or periodic noise that has a long rise and fall time compared to the duration of the pulse signal to be measured without distorting the pulse signal to be measured. do.

[Key points of the invention]

The present invention provides a delay circuit that is preset to a delay time equal to or longer than the duration of the pulse signal to be measured, taking into account the upper limit of the duration due to fluctuations in peak value, etc., and the input signal and output of this delay circuit. By connecting a plurality of subtracting circuits, for example two sets, in cascade with each other to constitute, for example, first and second phase shift subtracting means, which take the signal as an input signal,
Converts the pulse signal to be measured into three pulse trains including an input pulse and two delayed pulses, reduces noise in proportion to the ratio of its rise, fall and delay times, and generates a single signal with a short time width. A delay circuit which converts the pulse into a pulse and has a delay time equal to the total delay time of the phase shift subtraction means on the output side of the phase shift subtraction means, and a multiplication circuit whose input signals are the input signal and the output signal of this delay circuit. By providing a noise canceling means, the entire three pulse trains are further delayed by the total delay time, so that only one of the three pulse signals in each of both pulse trains overlaps at the same time, and the two are multiplied. By doing this, only pulses that overlap at the same time are left and other pulses are eliminated, and the phase shift subtraction means shortens the time width to form a single pulse, and the noise pulse is combined with a delayed pulse whose overlap is controlled. is erased by multiplying , and only the pulse signals to be measured that overlap at the same time are output as pulse signals similar to the original waveform.

[Embodiments of the invention]

The present invention will be explained below based on examples.

FIG. 1 is a block diagram showing the configuration of a noise removal circuit showing an embodiment of the present invention. In the figure, 1
0 is an input circuit such as an impedance matching circuit, and a pulse signal to be measured containing noise is outputted as an analog signal close to the original waveform. 11 is a first phase shift subtraction means, and 14 is a second phase shift subtraction means connected in cascade to the first phase shift subtraction means, each of which is set in advance to a delay time Td equal to the duration Wp of the pulse signal to be measured. The delay circuit 12 or 15 includes a delay line, a digital delay circuit, etc., and a subtraction circuit 13 or 16, which receives the input signal and output signal of the delay circuit 12 or 15 as input signals. 17 is second phase shift subtraction means 1
The noise canceling means takes the output signal of No. 4 as an input signal, and includes a delay circuit 18 whose delay time is set in advance to be equal to the total delay time of the first and second phase shift/subtraction means, so-called 2Td, and the input/output of this delay circuit. The multiplication circuit 19 receives a signal as an input signal, and an output circuit 20 such as a square root circuit, an amplification circuit, an attenuation circuit, an impedance matching circuit, etc. selected as necessary is provided on the output side.

Figure 2 is a signal waveform diagram for explaining the operation of the noise removal circuit configured as shown in Figure 1.The input signal is a measured pulse signal P consisting of a trapezoidal wave with a duration (pulse width) Wp of 50 ns. ₁₀ and rise,
The fall time τn is 12 times the pulse width Wp, i.e.
A single noise N ₁₀ consisting of a trapezoidal wave of 600 ns is injected into the noise removal circuit shown in Fig. 1, and a delay circuit such as a phase shift subtraction means is injected with a delay time Td equal to the pulse width of the pulse signal P ₁₀ to be measured. An equal delay line (manufactured by Showa Cable, product name: single-in-line type delay line AT type) is used, a wideband operational amplifier (manufactured by OEI, USA, model number 9826) is used for the subtraction circuit, and a wideband linear multiplier (manufactured by OEI, USA, model number 9826) is used for the multiplication circuit. This figure shows signal waveforms obtained by configuring a noise removal circuit using a noise removal circuit (manufactured by Analog Devices, Inc., USA, model number AD539). However, the circuit components described above are examples of circuit components suitable for maintaining the original waveform of the pulse signal to be measured with a short pulse width Wp of 50 ns.If Wp, τd, etc. are significantly different, It goes without saying that components suitable for maintaining the original waveform of the pulse signal waveform should be selected. In the figure, W ₁₀ is the output signal waveform of the input circuit, and P ₁₀ is the pulse width output at time t ₂
Wp is the trapezoidal pulse signal to be measured, N ₁₀ is the time
A trapezoidal single-shot noise pulse with a rise and fall time τn = 12Wp is output from the input circuit to to,
The falling part is omitted from the illustration. W ₁₂ is the output signal waveform of the delay circuit 12 in the first phase shift subtraction means 11, and the noise N ₁₂ is Td from the time to.
= delayed by Wp time, and pulse signal P ₁₂ is delayed by Wp time from time t ₂ and is output in a form close to the original waveform. W ₁₃ is the output signal of the subtraction circuit 13 which receives W ₁₀ and W ₁₂ as input, and the pulse signal P ₁₃
By subtracting P ₁₀ and P ₁₂ which are shifted by Wp time, P ₁₀ rising at time t ₂ and time t ₂
Delayed pulse of P ₁₀ that rises to the negative side with a delay of Wp time
A pair of positive and negative pulse trains P ₁₃ consisting of P ₁₂ and P 12 are output. The noise pulse N ₁₃ is a trapezoidal pulse that rises from time to with a delay time Wp and falls in time Wp from time t ₁ , which corresponds to the end of the rise time τn of N ₁₀ , and the peak value of noise N ₁₃ is The noise pulse _N10 is reduced to approximately 1/12, and its pulse width is also shortened to the time obtained by adding the delay time Wp to the rise and fall times τn of _N10 .

W ₁₅ and W ₁₆ are output signals of the delay circuit 15 and subtraction circuit 16 in the second phase shift subtraction means 14, respectively. At W ₁₅ , the pulse signal P ₁₅ and the noise pulse N ₁₅ are further delayed by Td=Wp time than P ₁₃ and N ₁₈ , respectively, and are processed by the subtraction circuit 16.
By subtracting W ₁₅ from W ₁₈ , the noise is converted into a pulse signal P ₁₆ consisting of three pulse trains starting at time t ₂ and two triangular waves with a pulse width of 2 Wp as shown in W ₁₆ . Pulse _N16 is output.

W ₁₈ and W ₁₉ are noise canceling means 17, respectively.
These are the output signals of the delay circuit 18 and the multiplication circuit 19. The pulse signal P ₁₆ passes through the delay circuit 18 set to a delay time Td = 2Wp to become a delayed pulse train P ₁₈ delayed by 2Wp, and only one of each of the three pulse trains P ₁₆ and P ₁₈ is transmitted. Only the pulses that are output at the same time and overlap at the same time are squared and amplified by passing through the multiplication circuit 19 and output as _P19 , and the remaining four pulses whose overlap is avoided by the delay circuit are erased. be done. Also delayed noise pulse delayed by 2Wp from N _16
N18 is eliminated by the multiplication circuit 19 by avoiding overlap with _N16 .

W ₂₀ is the final output signal of the noise removal circuit when the output circuit is a square root circuit, and by passing P ₁₉ , which has been squared and amplified by the multiplier circuit 19, through the square root circuit 20, it is possible to obtain a peak value and a pulse close to the original waveform. The output signal can be converted back to the shape output signal. However, even if components with good high frequency response characteristics are used for each delay circuit, there will be some attenuation in signal transmission, and the components of the subtraction circuit will have some amplification function, so the output It is preferable that the circuit 20 selectively uses a square root circuit, an amplification circuit, an attenuation circuit, etc. as necessary to correct the increase/decrease in the signal of the entire noise removal circuit.

FIG. 3 is a conceptual diagram of a signal waveform for explaining the operation of the noise removal circuit in the embodiment of FIG. 1 with respect to periodic noise. The case where the waveform is a triangular wave having twice the width Wp is shown as an example. Note that the operation for the pulse signal to be measured is the same as that in FIG. 2, so it is omitted.
In the figure, W ₁₀ is the output noise waveform of the input circuit 10, W ₁₂ is the output waveform of the delay circuit 12 with delay time Td = Wp, and W ₁₃ is the output waveform of the subtraction circuit 13, which is the noise W shifted by the delay time Td = Wp. By subtracting _{W 10} and W ₁₂ , the waveform is converted into a trapezoidal wave whose peak value is reduced to approximately 1/2 of that of the original waveform W ₁₀ .
W ₁₅ is delay circuit 1 set to delay time Td = Wp
5 is the output noise, and the output noise W ₁₅ is the time
The time phase is delayed by 2Td=2Wp with respect to To. W ₁₆
is the output noise of the subtraction circuit that uses W ₁₈ and W ₁₅ as input signals, and the pulse width and peak value are almost equal to the rise time τn = 2Wp and peak value of the original waveform, and the generation period is equal to that of the original waveform W ₁₀ . It is converted into a triangular wave pulse. W ₁₈ is noise canceling means 1
By delaying W ₁₆ by 2Wp by the output noise of the delay circuit 18 of 7, overlapping of W ₁₆ and W ₁₈ is avoided, and by passing both noise pulses W ₁₆ and W ₁₈ through the multiplication circuit 19, Output of multiplication circuit 19
At W ₁₉ , periodic noise is theoretically completely eliminated.

FIG. 4 is a characteristic diagram showing the S/N ratio of the noise removal circuit of the embodiment shown in FIG. This is what was obtained. In the figure, the vertical axis shows the S/N ratio, and the horizontal axis shows the ratio k=τn/Td between the rise time τn of the noise pulse and the delay time Td of the delay circuit of the phase shift subtraction means, and the curve 11A in the figure is the first phase shift subtraction means 11
The curve 14A represents the S/N ratio of the output signal of the second phase shift subtraction means 14, and the curve 14A represents the S/N ratio of the output signal of the second phase shift subtraction means
7A represents the S/N ratio of the output signal of the noise canceling means 17, respectively. In the figure, the S/N ratio curve 11A of the first phase shift subtraction means is a trapezoidal wave in which the noise rises linearly, so the S/N ratio ≒ 20 logk
It becomes a straight line approximated by (dB). Since the S/N ratio curve 14A of the second phase shift subtraction means doubles the peak value (maximum value) of the pulse train of the pulse signal to be measured,
The S/N ratio becomes twice that of the curve 11A, that is, a straight line approximated by the S/N ratio≈20log2k (dB). The S/N ratio of the output signal of the noise canceling circuit should theoretically be an infinitely large value, but due to the influence of field-through noise of the multiplication circuit, etc.
The S/N ratio is as shown in .

As mentioned above, in the noise removal circuit configured as shown in Fig. 1, the delay time Td of the delay circuit is better. Although the S/N ratio can be obtained, τn/Td
Even under the condition of =2, the noise level is reduced to about 1/10.
Under the condition of τn/Td=10, the noise level can be reduced to 1/100 or less.

The configuration and operation of the noise removal circuit have been described above based on the embodiment shown in FIG. 1, but the above-mentioned operation will be further classified and explained by function. For noise whose rise time τn is longer than the delay time,
The first phase shift subtraction means 11 functions to reduce noise by delaying one input signal of the subtraction circuit 13 by Td, and the second phase shift subtraction means 1
4 further applies one input signal of the subtraction circuit 16 to Td.
The noise cancellation circuit 17 functions to separate the noise into multiple single pulses by delaying the noise by
is configured to have a function of reducing the multiplication result to zero by controlling the overlap of single pulses, thereby achieving a function that can significantly reduce noise as a whole. On the other hand, for pulse signals to be measured, emphasis is placed on maintaining the original waveform, in other words, on the high frequency response of the circuit components, and at the same time, the pulses are increased to, for example, three by passing through two sets of phase shift subtraction means. By delaying one input signal of the signal multiplication circuit, the overlapping is controlled and the function of leaving one pulse signal to be measured and erasing the others is configured to work effectively. In this way, the three means 11, 14, and 17 each have an independent function, so that, for example, the ratio of the rise time τd of the noise to the pulse width Wp of the pulse signal τd/
When Wp is very large, a sufficient noise reduction effect can be obtained with only the first phase shift subtraction means, so it is possible to configure a noise canceling circuit by making the first phase shift subtraction means independent.

Figure 5 is a sample diagram of a signal waveform to explain the operation of the noise removal circuit in Figure 1, which is different from that in Figure 2, and is an example in which only the delay time Td is twice the pulse width Wp of the pulse to be measured. This is what is shown. In the case of the figure, the delay time of delay circuits 12 and 15 is
2Wp, the delay time of the delay circuit 18 is set to 4Wp, and as a result, W13, W15, W16,
Pulse trains such as W18 have Wp between each pulse.
However, in the noise canceling circuit, P16A and P18A overlap at the same time, and one measured pulse signal P19 can be outputted to the output side of the multiplication circuit 19 as in FIG. Furthermore, by setting Td=2Wp, τn/Td=k becomes smaller, so as is clear from FIG. It decreases by about 1/2 (6dB). In this way, the delay time Td of the delay circuits 12 and 15 does not necessarily need to be equal to the pulse width Wp of the pulse signal to be measured, and may be set to be wider in advance in consideration of fluctuations in the pulse width of the pulse signal to be measured. can.

Furthermore, in FIGS. 2 and 5, an example was explained in which the pulse signal to be measured is a trapezoidal wave with Wp = 50 ns, but even if the pulse signal to be measured is an attenuated waveform as shown in FIG. Furthermore, even if the waveform includes vibration components, it is possible to output a measured pulse signal close to the original waveform to the output circuit. However, it goes without saying that in order to output a pulse signal to be measured containing vibration components in a form close to the original waveform, circuit components with excellent high frequency response must be used.

〔Effect of the invention〕

As described above, the present invention comprises a delay circuit and a subtraction circuit, each having a delay time set in advance to match the duration of the pulse signal to be measured, and has an attenuation function for noise with rise and fall times longer than the delay time. a first phase shift subtraction means having a structure similar to the subtraction means and a second phase shift subtraction means having a function of separating the output noise of the first phase shift subtraction means into a plurality of single pulses having shortened pulse widths; phase subtraction means;
Noise erasing means comprising a delay circuit set to a delay time equal to the total delay time of the first and second phase shifting/subtracting means and a multiplication circuit, and having a function of erasing the noise pulse separated into the single pulse. A noise removal circuit was constructed. As a result, it is possible to reduce or eliminate single-shot and periodic noise having rise and fall times longer than the duration of the pulse signal to be measured, and also to reduce or eliminate a plurality of pulse trains by passing through the first and second phase shift subtraction means. The pulse signal to be measured which has increased in number is inversely converted into a pulse signal to be measured similar to one original waveform by passing through a noise canceling means, and then sent through an output circuit to a pulse signal to be measured which is similar to the original waveform with an improved S/N ratio. A noise removal circuit capable of outputting a pulse signal can be provided. In addition, the noise removal circuit of the present invention can achieve a noise reduction effect without distorting the pulse signal to be measured compared to a conventional circuit using a filter, and can also achieve a noise reduction effect compared to a conventional circuit using a filter. This method simultaneously has the effect of reducing single-shot and periodic noises of various time widths, which have a longer rise time than a pulse signal, which was not sufficient in the conventional method, and provides the convenience of being able to set the delay time of the delay circuit in advance.

[Brief explanation of drawings]

Fig. 1 is a block diagram of a noise removal circuit showing an embodiment of the present invention, and Fig. 2 is a signal waveform diagram for explaining the operation of the noise removal circuit shown in Fig. 1 when the input signal contains single-shot noise. For example, FIG. 3 is a signal waveform diagram for explaining the operation of the noise removal circuit in FIG. 1 against periodic noise, and FIG. 4 is a characteristic diagram showing the S/N ratio of the noise removal circuit in FIG. 1. Fig. 5 is a signal waveform diagram when the delay time setting conditions are different from Fig. 2, and Fig. 6 is a configuration diagram of a conventional improved noise removal circuit, which is an example of application to a power cable partial discharge test circuit. FIG. 7 is a signal waveform diagram for explaining the operation of the noise removal circuit of FIG. 6. DESCRIPTION OF SYMBOLS 10... Input circuit, 11... First phase shift subtraction means, 14... Second phase shift subtraction means, 12, 15...
...Delay circuit, 13, 16...Subtraction circuit, 17...
Noise erasing means, 18... Delay circuit of noise erasing means, 19... Multiplication circuit, 20... Output circuit, W
10, W12...W20...Each part output signal, P ₁₀ ,
P ₁₂ ...P ₂₀ ...Pulse signal to be measured, N10, N1
2...N20...Noise pulse, Wp...Duration (pulse width) of the pulse signal to be measured, τn...Rise and fall time of noise, Td...Delay time.

Claims (1)

[Claims] 1. An input signal in which a single-shot or periodic electrical noise is superimposed on a single-shot pulse signal to be measured whose duration is within a predetermined time range is received, and the rise and fall times are within the time range. , and outputs the measured pulse signal that is close to the original waveform,
a phase shift subtraction means comprising a plurality of sets of delay circuits whose delay times are preset to a predetermined time within the time range and subtraction circuits whose input signals are the input signals and output signals of the delay circuits connected in cascade; Noise canceling means comprising a delay circuit provided on the output side of the phase shift subtraction means and having a delay time corresponding to the total delay time of the phase shift subtraction means, and a multiplication circuit whose input signals are input signals and output signals of the delay circuit. , and an output circuit provided on the output side of the noise eliminating means. 2. In what is stated in claim 1,
A noise removal circuit characterized in that the output circuit consists of a square root circuit.