JPH0442550A - Method of mounting electronic component - Google Patents

Method of mounting electronic component

Info

Publication number
JPH0442550A
JPH0442550A JP2150928A JP15092890A JPH0442550A JP H0442550 A JPH0442550 A JP H0442550A JP 2150928 A JP2150928 A JP 2150928A JP 15092890 A JP15092890 A JP 15092890A JP H0442550 A JPH0442550 A JP H0442550A
Authority
JP
Japan
Prior art keywords
electrode
electronic component
adhesive
insulating substrate
insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2150928A
Other languages
Japanese (ja)
Inventor
Daizo Ando
安藤 大蔵
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2150928A priority Critical patent/JPH0442550A/en
Publication of JPH0442550A publication Critical patent/JPH0442550A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、チップ部品や半導体素子等の電子部品を絶縁
性の配線基板に実装する際に用いることができる電子部
品の実装方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an electronic component mounting method that can be used when mounting electronic components such as chip components and semiconductor elements on an insulating wiring board.

従来の技術 近年、電子部品の電極ピッチが狭くなることにより、半
田付けによる接続が困難となってきており、半田を用い
ない実装方法が盛んに研究開発されている。このような
電子部品の実装方法については、例えば特開昭63−2
50140号公報に記載されている。
BACKGROUND OF THE INVENTION In recent years, as the electrode pitch of electronic components has become narrower, it has become difficult to connect them by soldering, and mounting methods that do not use solder are being actively researched and developed. Regarding the mounting method of such electronic components, for example, Japanese Patent Application Laid-Open No. 63-2
It is described in No. 50140.

以下、図面を参照しながら従来の電子部品の実装方法に
ついて説明する。第3図は従来の電子部品の実装方法を
示す断面図である。第3図において、1は絶縁性基板で
、2は絶縁性基板l上に形成された第1の電極である。
Hereinafter, a conventional electronic component mounting method will be described with reference to the drawings. FIG. 3 is a sectional view showing a conventional electronic component mounting method. In FIG. 3, 1 is an insulating substrate, and 2 is a first electrode formed on the insulating substrate l.

3は電子部品で、4は電子部品3の表面に形成された第
2の電極である。5は第1の電極2と第2の電極4間に
設けられた導電性接着剤である。導電性接着剤5は金属
フィラーを含有した熱硬化性接着剤よりなり、金属フィ
ラーが第1の電極2と第2の電極4間を電気的に接続し
、熱硬化性接着剤が絶縁性基板1と電子部品3とを機械
的に接続している。
3 is an electronic component, and 4 is a second electrode formed on the surface of the electronic component 3. 5 is a conductive adhesive provided between the first electrode 2 and the second electrode 4. The conductive adhesive 5 is made of a thermosetting adhesive containing a metal filler, the metal filler electrically connects the first electrode 2 and the second electrode 4, and the thermosetting adhesive connects the insulating substrate. 1 and electronic component 3 are mechanically connected.

発明が解決しようとする課題 しかしながら上記のような構成においては、導電性接着
剤5が絶縁性基板1と電子部品3間の電気的接続と機械
的接続の両方を行なっているので、電気的な接続抵抗値
と機械的な接続強度を独立に最適化することが困難であ
った。すなわち、接続抵抗値を下げるために導電性接着
剤5中に含有される金属フィラーの含有量を増加すると
、熱硬化性接着剤の含有量が減少するため、絶縁性基板
lと電子部品3間の機械的な接続強度が弱くなる。
Problems to be Solved by the Invention However, in the above configuration, the conductive adhesive 5 performs both the electrical connection and the mechanical connection between the insulating substrate 1 and the electronic component 3. It was difficult to optimize the connection resistance value and mechanical connection strength independently. That is, when the content of the metal filler contained in the conductive adhesive 5 is increased in order to lower the connection resistance value, the content of the thermosetting adhesive is decreased, so that the connection resistance between the insulating substrate l and the electronic component 3 is The mechanical connection strength becomes weaker.

また、機械的な接続強度を増加させるために導電性接着
剤5中の熱硬化性接着剤の含有量を増加させると、金属
フィラーの含有量が減少するため、絶縁性基板lと電子
部品3間の電気的な接続抵抗値が減少してしまうという
課題を有していた。
Furthermore, when the content of the thermosetting adhesive in the conductive adhesive 5 is increased in order to increase the mechanical connection strength, the content of the metal filler decreases, so that the insulating substrate 1 and the electronic component 3 The problem was that the electrical connection resistance value between them decreased.

本発明は上記課題に鑑み、電気的な接続抵抗値と機械的
な接続強度を独立に最適化することを可能とする電子部
品の実装方法を提供することを目的とするものである。
In view of the above problems, it is an object of the present invention to provide a method for mounting electronic components that makes it possible to independently optimize electrical connection resistance and mechanical connection strength.

課題を解決するための手段 上記目的を達成するために、本発明の電子部品の実装方
法は、第1の電極を有した絶縁性基板に第2の電極を有
した電子部品を実装するに際し、前記第1の電極と前記
第2の電極との間に導電性樹脂を設けるとともに前記絶
縁性基板と前記電子部品との間に絶縁性接着剤を設けた
ものである。
Means for Solving the Problems In order to achieve the above object, the electronic component mounting method of the present invention includes the following steps when mounting an electronic component having a second electrode on an insulating substrate having a first electrode. A conductive resin is provided between the first electrode and the second electrode, and an insulating adhesive is provided between the insulating substrate and the electronic component.

作用 本発明は、上記した構成によって、絶縁性基板上に設け
られた第1の電極と電子部品の表面に設けられた第2の
電極間の電気的接続を前記第1の電極と前記第2の電極
との間に設けられた導電性樹脂により行ない、前記絶縁
性基板と前記電子部品間の機械的接続を前記絶縁性基板
と前記電子部品との間に設けられた絶縁性接着剤により
行なうことで、電気的な接続抵抗値と機械的な接続強度
をそれぞれ独立に最適化することができる。
Operation The present invention has the above-described configuration, and provides an electrical connection between the first electrode provided on the insulating substrate and the second electrode provided on the surface of the electronic component. The mechanical connection between the insulating substrate and the electronic component is performed by an insulating adhesive provided between the insulating substrate and the electronic component. This allows the electrical connection resistance value and mechanical connection strength to be optimized independently.

実施例 以下、本発明の一実施例について図面を参照しながら説
明する。
EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings.

(実施例1) 第1図は、本発明の第1の実施例における電子部品の実
装方法を示した断面図である。第3図に示す従来の電子
部品の実装方法と同一箇所については同一番号を付して
いる。
(Example 1) FIG. 1 is a sectional view showing a method for mounting electronic components in a first example of the present invention. The same numbers are given to the same parts as in the conventional electronic component mounting method shown in FIG.

第1図において、1は絶縁性基板で、2は絶縁性基板1
上に形成された第1の電極である。3aは電子部品の一
例である半導体素子で、4は半導体素子3aの表面に形
成された第2の電極である。
In FIG. 1, 1 is an insulating substrate, and 2 is an insulating substrate 1.
a first electrode formed above. 3a is a semiconductor element which is an example of an electronic component, and 4 is a second electrode formed on the surface of the semiconductor element 3a.

5aは第1の電極2と第2の電極4間に設けられた導電
性樹脂で、6は絶縁性基板1と半導体素子38間に設け
られた絶縁性接着剤である。
5a is a conductive resin provided between the first electrode 2 and the second electrode 4, and 6 is an insulating adhesive provided between the insulating substrate 1 and the semiconductor element 38.

本実施例では、上記の構成により、絶縁性基板1上に形
成された第1の電極2と半導体素子3aの表面に形成さ
れた第2の電極4間の電気的接続を導電性樹脂5aによ
り行い、絶縁性基板1と半導体素子3a間の機械的接続
を絶縁性接着剤6により行うことで、電気的な接続抵抗
値と機械的な接続強度をそれぞれ独立に最適化するよう
に、それぞれの樹脂を選定している。
In this embodiment, with the above configuration, the electrical connection between the first electrode 2 formed on the insulating substrate 1 and the second electrode 4 formed on the surface of the semiconductor element 3a is made by the conductive resin 5a. By making a mechanical connection between the insulating substrate 1 and the semiconductor element 3a using an insulating adhesive 6, the electrical connection resistance value and the mechanical connection strength are each independently optimized. Resin is selected.

また、絶縁性接着W16として、硬化時の体積収縮率が
大きく、硬化後の熱膨張係数が導電性樹脂5aの熱膨張
係数よりも小さい樹脂を使用している。このように絶縁
性接着剤6の硬化時の体積収縮率が大きいことにより、
第1の電極2と第2の電極4は導電性樹脂5aを介して
圧接されることにより電気的接続が行なわれる。また、
絶縁性接着剤6の硬化後の熱膨張係数が導電性樹脂5a
の熱膨張係数よりも小さく、しかも絶縁性接着剤6の占
める面積の方が導電性樹脂5aの占める面積より大きい
ので、周囲の温度が上昇した際にも電気的接続が外れる
ことはない。
Further, as the insulating adhesive W16, a resin is used which has a large volumetric shrinkage rate during curing and whose thermal expansion coefficient after curing is smaller than that of the conductive resin 5a. Due to the large volumetric shrinkage rate of the insulating adhesive 6 during curing,
The first electrode 2 and the second electrode 4 are electrically connected by being pressed into contact with each other via the conductive resin 5a. Also,
The thermal expansion coefficient of the insulating adhesive 6 after curing is the same as that of the conductive resin 5a.
is smaller than the coefficient of thermal expansion of the insulating adhesive 6, and the area occupied by the insulating adhesive 6 is larger than the area occupied by the conductive resin 5a, so the electrical connection will not be disconnected even when the ambient temperature rises.

本実施例では上記のような特性を持つ樹脂として、絶縁
性接着剤6にはUV硬化型接着剤を、導電性樹脂5aに
は金属フィラーを含有したアクリル樹脂を用いた。絶縁
性接着剤6にUV硬化型接着剤を用いることにより、実
装工程を室温で行うことができるため、絶縁性基板1と
して、例えば液晶デイスプレィのような加熱工程を用い
ることができないガラス基板でも使用することができる
In this embodiment, as resins having the above characteristics, a UV curable adhesive was used for the insulating adhesive 6, and an acrylic resin containing a metal filler was used for the conductive resin 5a. By using a UV curing adhesive as the insulating adhesive 6, the mounting process can be performed at room temperature, so even glass substrates that cannot be heated, such as liquid crystal displays, can be used as the insulating substrate 1. can do.

また、絶縁性接着剤6としてはエポキシ系やアクリル系
の接着剤も使用することができる。二の場合、硬化時の
体積収縮率はUV硬硬化型接着上し比較して小さくなる
が、例えば接着剤を硬化させる際に加圧ツール等で半導
体素子3aを絶縁性基板1に押しつける方法や、硬化剤
を封入したマイクロカプセルを混入した2液性の接着剤
を用いる方法を採用することにより所定の硬化時の体積
収縮率を得ることができる。
Further, as the insulating adhesive 6, an epoxy adhesive or an acrylic adhesive can also be used. In case 2, the volumetric shrinkage rate during curing is smaller than that of UV curing adhesive, but for example, when curing the adhesive, there is a method of pressing the semiconductor element 3a against the insulating substrate 1 using a pressure tool or the like. By employing a method using a two-component adhesive containing microcapsules encapsulating a curing agent, a predetermined volumetric shrinkage rate upon curing can be obtained.

さらに第1の電極2と第2の電極4間を電気的に接続す
るのに導電性樹脂5aを用いているため、絶縁性基板1
もしくは半導体素子3a表面のうねり、凹凸を導電性樹
脂5aで吸収することができ、絶縁性基板1もしくは半
導体素子3aの表面平滑性が荒いものでも使用すること
ができる。
Furthermore, since the conductive resin 5a is used to electrically connect the first electrode 2 and the second electrode 4, the insulating substrate 1
Alternatively, the undulations and irregularities on the surface of the semiconductor element 3a can be absorbed by the conductive resin 5a, and even the insulating substrate 1 or the semiconductor element 3a with rough surface smoothness can be used.

次に、本発明の他の実施例について図面を参照しながら
説明する。
Next, other embodiments of the present invention will be described with reference to the drawings.

(実施例2) 第2図は、本発明の第2の実施例に係る電子部品の実装
方法を示した断面図である。第1図に示す本発明の第1
の実施例に係る電子部品の実装方法と同一箇所について
は同一番号を付している。
(Example 2) FIG. 2 is a sectional view showing a method for mounting electronic components according to a second example of the present invention. The first aspect of the present invention shown in FIG.
The same numbers are given to the same parts as in the electronic component mounting method according to the embodiment.

第2図において、1は絶縁性基板で、2は絶縁性基板1
上に形成された第1の電極である。3aは電子部品とし
ての半導体素子で、4は半導体素子3aの表面に形成さ
れた第2の電極である。5aは第1の電極2と第2の電
極4間に設けられた導電性樹脂で、6は絶縁性基板1と
半導体素子3a間に設けられた絶縁性接着剤で、以上は
第1図の構成と同様なものである。第1図の構成と異な
るのは非酸化性金属層7を半導体素子3aの第2の電極
4上に設けた点である。
In FIG. 2, 1 is an insulating substrate; 2 is an insulating substrate 1;
a first electrode formed above. 3a is a semiconductor element as an electronic component, and 4 is a second electrode formed on the surface of the semiconductor element 3a. 5a is a conductive resin provided between the first electrode 2 and the second electrode 4, and 6 is an insulating adhesive provided between the insulating substrate 1 and the semiconductor element 3a. The configuration is similar. The difference from the configuration shown in FIG. 1 is that a non-oxidizing metal layer 7 is provided on the second electrode 4 of the semiconductor element 3a.

一般に、半導体素子3a上に形成された第2の電極4は
アルミニウム等の酸化されやすい金属で形成されている
が、アルミニウムの酸化膜は非導電性であるため、この
酸化膜を除去せずに導電性樹脂5aで接続すると、接続
抵抗値が上昇したり、接続抵抗値のばらつきが大きくな
ってしまう、そこで、半導体素子3aの製造工程中で第
2の電極4表面に形成された非導電性の酸化膜を除去し
、連続して非酸化性金属層7を形成しておくと、導電性
樹脂5aで接続した際にも接続抵抗値は安定して小さく
することができる。
Generally, the second electrode 4 formed on the semiconductor element 3a is made of a metal that is easily oxidized, such as aluminum, but since the aluminum oxide film is non-conductive, the second electrode 4 formed on the semiconductor element 3a is not removed. If the conductive resin 5a is used for connection, the connection resistance value will increase and the variation in the connection resistance value will become large. By removing the oxide film and continuously forming the non-oxidizing metal layer 7, the connection resistance value can be stably reduced even when the connection is made using the conductive resin 5a.

なお、第1、第2の実施例では、電子部品として半導体
素子3aを例に挙げて説明したが、電子部品としては、
表面に電極が形成されたもの、あるいは表面実装用にリ
ードが形成されたものであればなんでもよい。例えば、
チップ抵抗やチップコンデンサーあるいはチップダイオ
ードといった、いわゆるSMT用の部品を用いることも
できる。
In addition, in the first and second embodiments, the semiconductor element 3a was explained as an example of an electronic component, but as an electronic component,
Any material with electrodes formed on the surface or leads formed for surface mounting may be used. for example,
It is also possible to use so-called SMT components such as chip resistors, chip capacitors, or chip diodes.

また、第2の実施例では、非酸化金属層7を第2の電極
4の表面に設けたが、これは第1の電極2表面あるいは
第1の電極2と第2の電極4の両方の表面に設けてもよ
い、この場合には、第1の電極2上の非導電性の酸化膜
も除去することができるので、さらに接続抵抗値が下が
ることが期待できる。
In addition, in the second embodiment, the non-oxidized metal layer 7 was provided on the surface of the second electrode 4, but this was provided on the surface of the first electrode 2 or on both the first electrode 2 and the second electrode 4. It may be provided on the surface. In this case, since the non-conductive oxide film on the first electrode 2 can also be removed, it is expected that the connection resistance value will further decrease.

発明の効果 以上の説明から明らかなように、本発明は、第1の電極
を有した絶縁性基板に、第2の電極を有した電子部品を
実装するに際し、前記第1の電極と前記第2の電極との
間に導電性樹脂を設けるとともに前記絶縁性基板と前記
電子部品との間に絶縁性接着剤を設けているため、前記
第1の電極と前記第2の電極間の電気的接続を前記導電
性樹脂により行ない、かつ前記絶縁性基板と前記電子部
品間の機械的接続を前記絶縁性接着剤により行なうこと
で、電気的な接続抵抗値と機械的な接続強度をそれぞれ
独立に最適化することができる。
Effects of the Invention As is clear from the above description, the present invention provides a method for mounting an electronic component having a second electrode on an insulating substrate having a first electrode. Since a conductive resin is provided between the first electrode and the second electrode, and an insulating adhesive is provided between the insulating substrate and the electronic component, the electrical connection between the first electrode and the second electrode is By making the connection using the conductive resin and making the mechanical connection between the insulating substrate and the electronic component using the insulating adhesive, the electrical connection resistance value and the mechanical connection strength can be independently adjusted. Can be optimized.

さらに、前記絶縁性接着剤として、硬化後の熱膨張係数
が前記導電性樹脂の熱膨張係数よりも小さい樹脂を使用
しているので、前記絶縁性接着剤の占める面積の方が前
記導電性樹脂の占める面積よりも大きいことにより、周
囲の温度が上昇した際にも電気的接続が外れることはな
い。
Furthermore, since the insulating adhesive uses a resin whose coefficient of thermal expansion after curing is smaller than that of the conductive resin, the area occupied by the insulating adhesive is larger than that of the conductive resin. Because the area is larger than the area occupied by the wire, the electrical connection will not be disconnected even when the surrounding temperature rises.

また、前記第1の電極と前記第2の電極のうち一方また
は両方を非酸化性金属で被覆することにより、前記導電
性接着剤で接続した際にも接続抵抗値を安定して小さく
することができる。
Further, by coating one or both of the first electrode and the second electrode with a non-oxidizing metal, the connection resistance value can be stably reduced even when connected with the conductive adhesive. I can do it.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例に係る電子部品の実装方法を
示す断面図、第2図は本発明の他の実施例に係る電子部
品の実装方法を示す断面図、第3図は従来の電子部品の
実装方法を示す断面図である。 1・・・・・・絶縁性基板、2・・・・・・第1の電極
、3a・・・・・・半導体素子、4・・・・・・第2の
電極、5a・・・・・・導電性樹脂、6・・・・・・絶
縁性接着剤、7・・・・・・非酸化性金属層。
FIG. 1 is a sectional view showing an electronic component mounting method according to an embodiment of the present invention, FIG. 2 is a sectional view showing an electronic component mounting method according to another embodiment of the invention, and FIG. 3 is a conventional method. FIG. 3 is a cross-sectional view showing a method for mounting electronic components. DESCRIPTION OF SYMBOLS 1... Insulating substrate, 2... First electrode, 3a... Semiconductor element, 4... Second electrode, 5a... ... Conductive resin, 6 ... Insulating adhesive, 7 ... Non-oxidizing metal layer.

Claims (3)

【特許請求の範囲】[Claims] (1)第1の電極を有した絶縁性基板に、第2の電極を
有した電子部品を実装するに際し、前記第1の電極と前
記第2の電極との間に導電性樹脂を設けるとともに、前
記絶縁性基板と前記電子部品との間に絶縁性接着剤を設
けた電子部品の実装方法。
(1) When mounting an electronic component having a second electrode on an insulating substrate having a first electrode, a conductive resin is provided between the first electrode and the second electrode, and . A method for mounting an electronic component, comprising providing an insulating adhesive between the insulating substrate and the electronic component.
(2)第1の電極と第2の電極のうち一方または両方が
非酸化性金属で被覆されている請求項1記載の電子部品
の実装方法。
(2) The electronic component mounting method according to claim 1, wherein one or both of the first electrode and the second electrode is coated with a non-oxidizing metal.
(3)絶縁性接着剤の硬化後の熱膨張係数が導電性樹脂
の熱膨張係数よりも小さい請求項1または2記載の電子
部品の実装方法。
(3) The electronic component mounting method according to claim 1 or 2, wherein the thermal expansion coefficient of the insulating adhesive after curing is smaller than that of the conductive resin.
JP2150928A 1990-06-08 1990-06-08 Method of mounting electronic component Pending JPH0442550A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2150928A JPH0442550A (en) 1990-06-08 1990-06-08 Method of mounting electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2150928A JPH0442550A (en) 1990-06-08 1990-06-08 Method of mounting electronic component

Publications (1)

Publication Number Publication Date
JPH0442550A true JPH0442550A (en) 1992-02-13

Family

ID=15507476

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2150928A Pending JPH0442550A (en) 1990-06-08 1990-06-08 Method of mounting electronic component

Country Status (1)

Country Link
JP (1) JPH0442550A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07231011A (en) * 1994-02-02 1995-08-29 Internatl Business Mach Corp <Ibm> Direct chip attachment with conductive adhesive
JPH09153514A (en) * 1995-12-01 1997-06-10 Matsushita Electric Ind Co Ltd Semiconductor unit and semiconductor element mounting method
US5826488A (en) * 1994-10-18 1998-10-27 Komatsu Ltd. Swash plate angle changing apparatus for a piston pump/motor of swash plate type
JP2006135248A (en) * 2004-11-09 2006-05-25 Fujitsu Ltd Flip chip mounting method and mounting apparatus for semiconductor chip

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07231011A (en) * 1994-02-02 1995-08-29 Internatl Business Mach Corp <Ibm> Direct chip attachment with conductive adhesive
US5747101A (en) * 1994-02-02 1998-05-05 International Business Machines Corporation Direct chip attachment (DCA) with electrically conductive adhesives
US5826488A (en) * 1994-10-18 1998-10-27 Komatsu Ltd. Swash plate angle changing apparatus for a piston pump/motor of swash plate type
JPH09153514A (en) * 1995-12-01 1997-06-10 Matsushita Electric Ind Co Ltd Semiconductor unit and semiconductor element mounting method
JP2006135248A (en) * 2004-11-09 2006-05-25 Fujitsu Ltd Flip chip mounting method and mounting apparatus for semiconductor chip

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