JPH0442854B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a data decoding method, and more particularly to a decoding method for a code having an error correction function for digital data, such as a code having an external and internal two-stage code. It is something.

An apparatus for implementing this kind of code decoding system is shown in FIG. 1, in which a schematic functional block is shown. Encoding circuit 1 in which the digital information to be sent is an external code
The interleaving circuit 2 rearranges the data arrangement. This interleaved output is further encoded in the internal code encoding circuit 3 and sent to the communication path 4.

On the receiving side, the transmitted data is decoded into an internal code by an internal code decoding circuit 5, and rearranged into the original data arrangement by a deinterleaving circuit 6. The external code decoding circuit 7 then performs final decoding and demodulates the received data. Generally, as the outer code and the inner code, a Reed-Solomon code, a BCH code, and a CRC code, which is only detected as an inner code, are used.

In this configuration, the internal code decoding circuit 5 performs error detection such as a CRC code, and generates a so-called pointer corresponding to the presence or absence of an error. This pointer is used as error position information to perform error correction in the external code decoding circuit 7. For example, assume that the external code has the following parity check matrix (Reed-Solomon code).

H=1 1 1...1 1 a a ² ...a ^n-1 ...(1) Here, a is a primitive element on the Galois field GF (2 ^m ), and is assumed to be n2 ^m -1. If the data string (data block) input to the external code decoding circuit 7 is R = [R ₀ , R ₁ , R ₂ , ..., R _o-1 ] ...(2), the following two syndromes occur. do.

H·R ^T =1 1...1 1 a...a ^n-1 R ₀ R ₁ ... R _o-1 =S ₀ S ₁ (3) Therefore, the syndromes S ₀ and S ₁ are expressed as follows.

S ₀ = _o-1 〓 ⁱ⁼¹⁰ R _i , S ₁ = _o-1 〓 ⁱ⁼⁰ a ⁱ・R _i …(4) If there is no error in the n input data blocks R, then (E=0), S ₀ =S ₁ =0. If there is one error (E=1), S ₀ = e _i , S ₁ = a ⁱ・e ⁱ (5), and when the location of the error is known, S ₀ =
e _i is the magnitude of the error. Furthermore, since a ⁱ =S ₁ /S ₀ , the error position can be detected by the external code itself.

When there are two errors (E=2) and the error positions are known, S ₀ = e _i + e _j , S ₁ = a ⁱ・e _i + a ^j・e _i …(6), and e _i and e _j are determined as follows.

e _i = (a ^j・S ₀ +S ₁ )/(a ⁱ +a ^j ) e _j = (a ⁱ・S ₀ +S ₁ )/(a ⁱ +a ^j ) …(7) Therefore, from equation (7) The magnitude of the two errors can be determined.

In the conventional example, the common method is to correct errors 1 and 2 using the pointer generated by the internal code decoding circuit 5, but the internal code decoding circuit does not detect errors completely and is not detected. Errors generally occur. For this reason, when an undetected error occurs, the correction using the pointer as just described will inevitably result in an erroneous correction. In other words, there is a drawback that undetected errors occur.

The above-mentioned Reed-Solomon code, which can correct two errors independently by decoding the outer code, can correct up to four errors when the location of the error is known. This is called erasure correction. Here, this will be explained regarding the Reed-Solomon code that detects and corrects errors using the following parity check matrix.

H=1 1 1...1 1 a a ² ... a ^n-1 1 a ² (a ² ) ² ... (a ² ) ^n-1 1 a ³ (a ³ ) ² ... (a ³ ) ^{n -1} ...(8) Since the data block R received by the external code decoding circuit is shown by equation (2), H・R ^T =1 1 1...1 1 a a ² ...a ^n-1 1 a ² (a ² ) ² … (a ² ) ^n-1 1 a ³ (a ³ ) ² … (a ³ ) ^n-1 R ₀ R ₁ … R _o-1 = S ₀ S ₁ S ₂ S ₃ …( 9) Error detection and correction is performed. syndrome
S ₀ to S ₃ are S ₀ = _o-1 〓 ⁱ⁼⁰ Ri, S ₁ = _o-1 〓 ⁱ⁼⁰ a ⁱ Ri, S ₂ = _o-1 〓 ⁱ⁼⁰ (a ² ) ⁱ Ri, S ₃ = _o-1 〓 ⁱ⁼⁰ (a ³ ) ⁱ Ri …(10) If there is no error in the data, S ₀ = S ₁
=S ₂ =S ₃ =0. Two error corrections are possible from this syndrome.

Furthermore, when the error position is known, up to four errors can be corrected. When only this erasure correction is performed, undetected errors that occur in the internal code will pass through as is, so detecting and correcting errors independently using the external code will further improve the detection ability.
It also improves your ability to correct. However, if two error corrections are simply performed, there is a possibility that an erroneous correction will be made, so it will not be possible to correct all two errors.

The present invention was made in order to eliminate the above-mentioned conventional drawbacks, and an object of the present invention is to provide a data decoding method that can improve error detection ability and error correction ability.

The data decoding method according to the present invention determines whether or not the pointer generated in the internal code matches the error position generated in the external code, and also determines the number of pointers, and determines whether the pointer generated in the internal code matches the error position generated in the external code, and determines whether or not there is an error based on this coincidence and the determination of the number. The feature is that the correction is controlled.

Hereinafter, one embodiment of the present invention will be described based on the drawings. In FIG. 2, an internal code decoding circuit 5 performs error detection or correction and detection, and generates corrected or detected data and a pointer indicating whether the data is an error. Deinterleaving is performed in deinterleaving circuit 6, pointers and data are latched in register circuits 8 and 9, respectively, and the pointers and data after deinterleaving are sent to external code decoding circuit 7. This deinterleaving and latch is generally performed by a RAM (random access memory) 6'.

A syndrome is generated from the data input to the external code decoding circuit 7 in the syndrome generation circuit 10, and this syndrome is transmitted to the a ⁱ and a ^j generation circuit 11.
The signals are sent to the e _i and e _j generation circuit 12. a ⁱ , a ^j generation circuit 1
A ⁱ and a ^j indicating the position of the error generated in step 1 are sent to the coincidence determination circuit 13 and the AND gate 14 . a ⁱ and
The information of a ^j is also sent to the e _i , e _j generation circuit 12, and e _i , e _j
The generation circuit 12 generates the syndrome and e i and _{e j that} indicate the magnitude of the error from a ⁱ and a ^j , and these e _i and e _j are
It is sent to AND gate 14.

The pointer input to the external code circuit 7 is passed through the counter 15, the OR circuit 16, and the match determination circuit 13.
sent to. The counter 15 counts the number of 1's in the pointer and sends the count value to the control circuit 16. In the match determination circuit 13, a ⁱ , a ^j generation circuit 11
It is determined whether the pointer 1 is set at the error positions a ⁱ and a ^j generated in , and the result is sent to the control circuit 16 .

The control circuit 16 sends 1 to the AND gate 14 based on the count value of the counter 15 and the judgment result of the coincidence determination circuit 13 if correction is to be performed, and sends 0 to the gate 14 if correction is not to be performed.
When correction is performed, when data corresponding to error positions a ⁱ and ^j are input to the adder circuit 17 of modulo 2, e _i and e _j are input to the adder circuit 17 of modulo 2 through the gate 14, ivy data and e _i , e _j
A modulo 2 addition is performed to correct the data. When the data is not corrected, the output of the gate 14 is 0, so the data is output from the 2 adder circuit 17 as is.

Regarding the pointer, when the control circuit 16 makes a correction, it sends 0 to the AND gate 18 to set all the pointers to 0. To consider all data blocks as errors, set 1 to AND gate 8, OR
Send 1 to gate 19 and set all pointers to 1. AND gate 20 when taking OR with a ⁱ and a ^j
A 1 is sent to the OR gate 19, a 1 is sent to the AND gate 18, and the pointer is ORed with a ⁱ and a ^j . The above result becomes the final error position information.

Here RAM (Random Access Memory)
When using 6', processing of this pointer is as follows:
This is generally done by reading and writing on the RAM, and for example, when making a correction, all pointers in the RAM corresponding to the data block are written to 0, and when all are considered to be errors, all 1 are written, and a ⁱ , a To take the OR of ^j , write 1 to the pointer corresponding to a ⁱ and a ^j . Also, in the match determination circuit 13, it can be done by simply reading out the RAM and latching whether the pointers corresponding to a ⁱ and a ^j are 1 or not.

The basic configuration and operation of this invention are the same as the conventional example shown in FIG. When it is determined that the value is bad, a pointer that becomes 0 is generated.

Something like this is a parity check code,
There are CRC codes, BCH codes, Reed-Solomon codes, etc. Then, the external code decoding circuit 7
Decode using Solomon code using the following parity check matrix.

H=1 1………1 1a………a ^n-1 1 a ² ………(a ² ) ^n-1 1 a ³ ………(a ³ ) ^n-1 …(10) Input to external code The data block (data example) to be sent is R = (R ₀ , R ₁ ..., R _o-1 ) ... (11), and the original correct data string to be sent is T = (T ₀ , T ₁ ..., T _o-1 ...(12) When an error occurs in the communication path, write T _i = R _i + e _i ...(13) and e _i indicates an error.Furthermore, the following four syndromes occur in the syndrome generation circuit 10. HR ^T =1...1 1...a ^n-1 1...(a ² ) ^n-1 1...(a ³ ) ^n-1 R ₀ R ₁ … R _o-1 = S ₀ S ₁ S ₂ S ₃ …(14) If there is no error here, e _i =0 and R _i =T _i
Therefore, TR ^T =0, S ₀ =S ₁ =S ₂ =S ₃ =0.

When there is one error, a ⁱ =S ₁ /S ₀ =S ₂ /S ₁ =S ₃ /S ₂
This can be corrected.

When there are two errors, the following four syndromes S ₀ = e _i + e _j S ₁ = a ⁱ e _i + a ^j e _j …(15) S ₂ = a ²ⁱ e _i + a ^2j e _j S ₃ = a ³ⁱ e _i + a ^3j e _j can be obtained, so by solving the error location polynomial 〓(x)=x ² +〓 ₁ x+〓 ₂ = (x+a ⁱ ) (x+a ^j )...(16), the error locations a ⁱ , a ^j is required. This a ⁱ ,
a ^j , and the four syndromes, e _i and e _j can be found.

If there is no error in the communication path, S ₀ = S ₁ = S ₂ = S ₃ = 0, but in this Reed-Solomon code, the error is 5.
When there are more than 1, there may be a chance that S ₀ =S ₁ =S ₂ =S ₃ =0, and this is a detection error. This means that the distance between the codes of this Reed-Solomon code is d=5
(d-2=3), so if there are 5 or more errors, there is a possibility that they overlap with other codes.

The relationship between the minimum number of errors that cause detection errors, the minimum number of errors that occur when erroneously correcting them, and a ⁱ and a ^j that occur at that time generally has the following relationship.

H=1 1 1 1 1 a a ² a ^n-1 1 a ² (a ² ) ² (a ² ) ^n-1 … … … … 1 a ^k-1 (a ^k-1 ) ² … (a ^{k- 1} ) ^n-1 ...(17) k syndromes are generated, S ₀ , ~,
S _k-1 (This is the same as in the previous embodiment) When there is no error, S ₀ = S ₁ =...=S _k-1 = 0, and when the number of errors exceeds the number (EE ₀ ), S ₀ =…
=S _k-1 =0 in some cases.

When using this syndrome to correct one error, as before, when there is one error, a ⁱ =
S ₁ /S ₀ =S ₂ /S ₁ =...=S _k-1 /S _k-2 , and the data corresponding to i is corrected. Also, it should be noted that if the syndrome is generated again from the data after this correction, S ₀ =...=S _k-1 =0 will always be obtained. Even when correcting this one error, if the number of errors exceeds the number of errors, the correction may be performed incorrectly. Let the minimum value of this number be E ₁ . However, when performing 1 correction, always a ⁱ =S ₁ /S ₀ =...=S _k-1 /
Since the relationship S _k-2 has occurred, even if a correction is made by mistake, if a syndrome is generated using the corrected data, S ₀ =S ₁ =...=S _k-1 =0. From these facts, the number of errors after incorrect correction is E ₀
It should be the same or higher value.
In single-error correction, only one piece of data deemed to be erroneous is corrected, so when a mistake is made, the number of errors after correction is the same or increases by only one compared to the original number of errors. In other words, if the number of errors before correction is _E3 , the number of errors after correction is _E3 or _E3 +1. Maybe here
If E ₃ =E ₀ -2 errors, after one correction the number of errors will be at most E ₀ -1, which means that S ₀
Since =S ₁ =...=S _o-1 =0 does not hold, erroneous correction will not occur with E ₃ =E ₀ -2 errors.

In other words, the minimum value E ₁ of the number of errors for which one correction may be made by mistake is E ₁ =E ₀ -1, and when the number of errors is this minimum value E ₀ -1, if
If the position indicating an error matches any of these E ₀ -1 errors, the number of errors after one correction remains E ₀ -1, so S ₀ =...=S _o-1 = 0
It is not. In other words, such a position i
does not satisfy a ⁱ =S ₁ /S ₀ =...=S _k-1 /S _k-2 , and no correction is performed.

From the above, if the number of errors is E ₀ −1, a ⁱ =S ₁ /
An error position i that satisfies S ₀ =...=S _k-1 /S _k-1 does not match the original error position.

From this, if the number of pointers is equal to or less than the minimum number of errors (E ₁ ) for which one correction is made by mistake, the proportion of pointers that match error positions generated in erroneous corrections will be small. In other words, this minimum value (E ₁ ) corresponds to the minimum value (E ₀ ) of the number of errors with all syndromes set to 0 minus 1. Since we will discuss correction of one error here, we will consider cases where there are two or more errors.

When E=2, N=0: ( ⁿ ₂ ) P (1, 0) ² P (0, 0) ^n-2 N= 1: ( ⁿ ₃ ) ( ³ ₁ ) P (1, 0) ² P ( 0,1)P
(0,0) ^n-3 + ( ⁿ ₂ ) ( ² ₁ ) P (1,0) P
(1,1) P(0,0) ^n-2 N=2: ( ⁿ ₄ ) ( ⁴ ₂ ) P(1,0) ² (0,1) ² P(
0,
0) ^n-4 + ( ⁿ ₃ ) ( ³ ₂ ) ( ² ₁ ) P (1,0) P (1,
1) P (0, 1) P (0, 0) ^n-3 + ( ⁿ ₂ ) P
(1,1) ² P(0,0) ^n-2 N=3: ( ⁿ ₅ ) ( ⁵ ₂ ) P(1,0) ² P(0,1) ³ (
P
(0, 0) ^n-5 + ( ⁿ ₄ ) ( ⁴ ₂ ) ( ² ₁ ) P (1, 0)
P(1,1)P(0,1) ² P(0,0) ^n-4 +
( ⁿ ₃ )( ³ ₁ )P(1,1) ^2P (0,1)P(0,
0) The following states are possible: ^n-3 ... Here, with two erasure corrections using pointers, only the third term of N=2 can be corrected correctly. Of course, if the syndrome-based 2 correction is performed, all E=2 will be correctly corrected, but E3 will be incorrectly corrected. For E=3, N=0: ( ⁿ ₃ ) P (1, 0) ³ P (0, 0) ^n-3 N= 1: ( ⁿ ₄ ) ( ⁴ ₁ ) P (1, 0) ³ P (0 ,1)P
(0, 0) ^n-4 + ( ⁿ ₃ ) ( ³ ₁ ) P (1, 0) ² P
(1,1) P(0,0) ^n-3 N=2: ( ⁿ ₅ ) ( ⁵ ₂ ) P(1,0) ³ P(0,1) ² P(
0,
0) ^n-5 + ( ⁿ ₄ ) ( ⁴ ₂ ) ( ² ₁ ) P (1,0) ² P (1,
1) P (0, 1) P (0, 0) ^n-4 + ( ⁿ ₃ ) ³ ₂ P
(1,0) P(1,1) ² P(0,0) ^n-3 N=3: ( ⁿ ₆ ) ( ⁶ ₃ ) P(1,0) ³ P(0,1) ³ P(
0,
0) ^n-6 + ( ⁿ ₅ ) ( ⁵ ₃ ) ( ³ ₂ ) P (1,0) ² P (1,
1) P (0, 1) ² P (0, 0) ^n-5 + ( ⁿ ₄ ) ( ⁴ ₃ )
( ³ ₁ )P(1,0)P(1,1) ^2P (0,1)
P (0, 0) ^n-4 + ( ⁿ ₃ ) P (1, 1) ³ P (0,
0) ^{The following} states are possible. When E=3, there is a possibility of erroneous correction as mentioned above. E4
can be considered similarly, but in terms of probability E=3
Since E=2 and 3 occur frequently, we will discuss E=2 and 3 here.

To summarize the above regarding the Reed-Solomon code of this example, the minimum distance between codes is d = 5, so this code can reduce detection errors by (S ₀ = S ₁ = S ₂
= S ₃ = 0) The minimum number of errors that occur is E ₀ = 5
Therefore, the minimum value of the number of errors when erroneously performing one correction is E ₁ =E ₀ -1=4, and the a ⁱ that occurs at this time does not match the four errors in this example.

This can also be said when correcting two errors, and the minimum number of errors when making two corrections by mistake is
E ₂ =E ₀ -2=3, and at this time the generated a ⁱ ,
a ^j does not match the original three errors,
Furthermore, when there are four errors, one of the a ⁱ and a ^j that occurs may match the original error, but neither of them will match.

From this point on, the effects of the present invention will be explained below. In FIG. 2, data input to the external code decoding circuit (B) can take the following four states.

(1) Correct data, pointer 0 (2) 〃 〃 〃 1 (3) Incorrect data 〃 0 (4) 〃 〃 1 Let the state probabilities of these four states be (1)P(0,
0), (2) P (0, 1), (3) P (1, 0), (4) P (1
，
1), the number of arbitrary errors (E) and the number of pointers (N)
The possible probability of a code of code length n in is determined. For example, when E=0 and N=0, all signs are (1)
The probability is P(0,0) ⁿ
becomes. When E = 2, when correct correction is performed, neither pointer matches the error positions a ⁱ and a ^j that occur when there are always two undetected errors P (1, 0) ² This term occurs. However, in general, the detection ability of internal codes is quite high, and P(1,0) can be considered to be very small. Therefore, P(1,0) ²
Since the occurrence of this error is quite small, there is no point in making corrections, and it is advantageous not to make any corrections.
However, when the number of pointers (N) is N2, there is always a hidden error, so it is necessary to prevent the passing of this hidden error by assuming that all the corresponding data blocks are erroneous. Also N3 (=E ₀ −2)
So, for example, when N=3, there is a possibility of an erroneous correction at E=3, and as mentioned earlier, a ⁱ and a ^j do not overlap with the original error, so in this case a i , a ^j There is a high possibility that neither a ^j will match the pointer, so it is advantageous to use the pointer obtained by the internal code as the final position information. of course,
A method of considering all corresponding data blocks as errors may be considered, but this would degrade the correction ability, and since the outer code is decoded after deinterleaving, it is not a good idea to intensively increase errors.

Also, let's consider a case where no correction is made. In other words, if a ⁱ , a ^j , e _i , and e _j that satisfy the conditions do not occur, of course no correction is performed, but there is always an undetected error at N2, and it is necessary to treat all corresponding data blocks as errors. . This is the same operation as when the previous error positions a ⁱ and a ^j and the pointers do not match, and should be exactly the same on the circuit. In other words, a ⁱ , a ^j are a ⁱ ,
a ⁱ that does not match the pointer even when it is not generated from the ^{a j} generation circuit 11 (that is, when it cannot be corrected),
If a ^j is generated, or if the coincidence determination circuit 13 is forced to a state where the two do not match, the rest of the operation will be the same.

When only one pointer matches the error position a ⁱ , a ^j that occurred, correct correction is made (E = 2),
This is the second term of N=1, 2, and 3, and the probability decreases as the number of pointers increases. When a wrong correction is made (E=3) and N=4, ( ⁿ ₄ ) ( ⁴ ₁ ) P (1, 1) ³ P (0, 1) P (0, 0)
^n-
4 occurs, and one of a ⁱ and a ^j is P(0,
1), so this value is the maximum value for correcting errors. Naturally, there is a possibility that N<4, but since P(1,0) always occurs, the probability is small. (When N=3, there is a state P(1,1) ³ , but this means that a ⁱ and a ^j never overlap P(1,1).) Therefore, it is advantageous not to perform correction at N4. Become. However, there are many cases where a correct correction is made compared to when the two do not match, so the pointer generated by the internal code and a ⁱ ,
The occurrence of undetected errors can be prevented by ORing a and ^j to obtain the final error position information. (For example, N=4( ⁿ ₅ )( ⁵ ₂ )( ² ₁ )P(1,0)P(1,1)P
(0,1) ³ P(0,0) ^n-5 ) For N<4, the correction ability will improve if correction is performed, but if correction is not performed, an undetected error P(1,0) will always occur. Therefore, it is better to make all the corresponding data blocks erroneous to prevent this P(1,0) error from passing.

The same thing can be considered when both a ⁱ and a ^j match the pointer, and at N=5, ( ⁿ ₅ ) ( ⁵ ₂ ) P (1, 1) ³ P (0, 1) ² P ( 0,0)
^n-5
(E=3) occurs, and two error positions a ⁱ ,
There is a possibility that a ^j overlaps two P(0,1) ² . Of course, there is a possibility of this happening when N<5, but P
Since the occurrence of (1, 0) is involved, the probability is small. For this reason, it is advantageous to use the pointer obtained by the internal code as the final error position information without performing correction at N5, and to perform correction at N<5.

As described above, in the present invention, when the two error positions a ⁱ and a ^j that occur in the external code do not match the 1 in the pointer obtained in the internal code, the number of 1 in the pointer is counted and the number is If the number is equal to or greater than the minimum number of errors that cause a detection error minus 2, the pointer obtained by the internal code without correction is used as the final error location information (hereinafter referred to as copy). If the number of pointers is equal to or greater than the minimum value minus 1, no correction is made and the pointer is and the error position (hereinafter OR)
If the number of pointers is equal to or greater than the minimum value, the pointer is copied, and if it is less than that, correction is performed. can be prevented.

In the above case, if further erroneous corrections are to be prevented, it would be advantageous to treat all data blocks as errors without making corrections even when only one data block matches, but this would reduce the correction ability.

In the above, as shown in FIG.
Input the output of 3 to the counter 15, and if the two do not match, increase the counter 15 by two,
If only one item matches, set counter 15 by 1.
UP, and do nothing when both match, the control circuit 16 only needs to look at one counter value of the counter 15 (in other words, the minimum error value that causes a detection error). ,
Control becomes easier.

Furthermore, in the case of examples, when correction is not possible,
The same operation as when the two do not match is performed, so even if correction cannot be made, the counter will be incremented by two, and the subsequent operation will be exactly the same.

Furthermore, when there is only one match, the pointer is
Although we are taking OR, it would be more advantageous to simply copy to simplify the hardware. However, the detection ability deteriorates accordingly.

In the above embodiment, a Reed-Solomon code was considered, but any code that can independently correct errors, such as a BCH code, can be used. Further, although an interleaved code as shown in FIG. 1 has been considered, a matrix-like concatenated code as shown in FIG. 4 may also be used.

In the concatenated code in Fig. 4, the k ₁ × k ₂ part is original digital information with a two-dimensional arrangement, and this information is first divided into k ₂ information blocks every k ₁ digits (rows). . These k ₂ information blocks are encoded into n ₂ blocks by adding m ₂ check blocks according to a predetermined encoding algorithm,
An (n ₂ , k ₂ ) code c ₂ on the Galois field GF(2 ^k ) is formed. Next, each k ₁ digit of each block is encoded into a predetermined code to form the (n ₁ , k ₁ ) code G on GF(2). The codes c ₁ and c ₂ are called inner and outer codes, respectively. A concatenated code is formed from these codes c ₁ and c ₂ , and (n ₁ n ₂ ,
k ₁ , k ₂ ) code.

Similarly to the above embodiment, H=1 1 ...1 1 a ^n-1 a ^n-2 ...a 1 (a ² ) ^n-1 (a ² ) ^n-2 ...a ² 1 (a ³ ) ^n-1 (a ³ ) ^n-2 …a ³ 1 …(18) can also be used. In this case, the error positions that occur are in the form a ⁿⁱ , a ^nj .

It is also possible to use the following general Reed-Solomon code.

H=1 1 1 … 1 1 a …a ^n-1 … … … 1 a ^k-1 …(a ^k-1 ) ^n-1 …(19) H=1 a a ² … a ^n-1 1 a ² (a ² ) ² ... (a ² ) ^n-1 ... ... ... 1 a ^k ( ^ak ) ² ... (a ^k ) ^n-1 ... (20) As described above, according to the present invention, the It is possible to prevent erroneous corrections by determining whether or not the points obtained match the error positions obtained from the external code, and by counting the number of pointers and controlling error correction using that number. becomes.

[Brief explanation of drawings]

Figure 1 is a schematic block diagram of a data transmission system, Figure 2 is a block diagram of an embodiment of the present invention, Figure 3 is a partial block diagram of another embodiment of the present invention, and Figure 4 is a diagram used in the present invention. FIG. 3 is a diagram showing a code format. Explanation of codes of main parts, 5...Internal code decoding circuit, 6...Deinterleave circuit, 7...External code decoding circuit, 8...Pointer register, 9...Data register, 13... ... Match determination circuit, 15 ... Counter, 16 ... Control circuit.

Claims (1)

[Claims] 1. When decoding double-encoded data having an external code and an internal code, at least error detection is performed using the internal code, a pointer corresponding to the presence or absence of an error is generated, and the pointer is moved to the error position. A data decoding method that uses an external code as information and corrects at least errors using an external code, in which a code that can independently correct two errors is used as the external code, and the error obtained with the internal code is If the pointer and the two error positions obtained when the two errors are independently corrected using the external code do not match, the number of pointers indicating the error is counted and the number is calculated using the external code. If the number is equal to or greater than the minimum value of the number of errors that may cause a detection error minus 2, the pointer is used as the final error position information of the external code without correction by the external code, and When the number is less than 2, all the corresponding data blocks are considered to be errors, and when the pointer and the two error positions match only one, the number of pointers indicating the error is counted and the number is determined. If the number is greater than or equal to the minimum value minus 1, the value of 2 obtained by the pointer or the pointer and the external code without being corrected by the external code.
The logical sum with the two error positions is used as the final error position information, and when the value is smaller than the minimum value minus 1, correction is performed using an external code, or all corresponding data blocks are considered to be errors, and the above-mentioned If the pointer and the two error positions match, and the number of pointers is equal to or greater than the minimum value, no correction is performed using the external code, and the pointer is used as the final error position information, and the pointer is used as the final error position information. A data decoding method characterized in that if the value is smaller than a minimum value, correction is performed using an external code. 2, comprising a counter for counting the number of pointers indicating the error, and a coincidence determination circuit for determining whether or not the pointer indicating the error coincides with the two error positions obtained by the external code; If the results of the discrimination by the discrimination circuit are that both of them do not match, the contents of the counter are incremented by two, and if only one of them is a coincidence, the contents of the counter are incremented by one, and error correction is controlled by the contents of the counter. The method according to claim 1 characterized in: 3. When decoding double-encoded data having an external code and an internal code, at least error detection is performed using the internal code, a pointer corresponding to the presence or absence of an error is generated, and the pointer is used as error position information, A data decoding method in which error correction is performed by an outer code using a maximum of four error-correctable Reed-Solomon codes, in which a pointer indicating an error occurring in the inner code when decoding with the outer code is used. If this pointer and the two error positions obtained when two errors can be corrected independently using the external code do not match, 2 is added to the number of pointers and only one is corrected. If it is, add 1 to the number of pointers, and if two errors cannot be corrected with the external code, add 2 to the number of pointers, and use the number of pointers after these additions as the final pointer. When the addition of 2 is performed, if the final pointer number is greater than or equal to the minimum number of errors that may cause a detection error in the outer code, no correction is performed and the result is obtained in the inner code. The resulting pointer is the final error position information, and if the final pointer count is smaller than the minimum value, all the corresponding data blocks are considered to be errors, and when the addition of 2 is not performed, the final pointer is If the number of error positions is greater than or equal to the minimum value, no correction is performed, and the logical sum of the pointer obtained by the inner code and the two error positions obtained by the outer code is used as the final error position information, and the final error position information is A data decoding method characterized in that if the number of pointers is smaller than the minimum value, correction is performed. 4 In addition of the pointers, if the number of pointers is greater than or equal to the minimum value when the addition of 1 is performed, the pointer obtained by the internal code and the two obtained by the external code are combined without correction. The logical sum with the error position is used as the final error position information, and if the number of pointers is smaller than the minimum value, all corresponding data blocks are regarded as errors, and addition processing is performed when adding the pointers. If there is no pointer, if the number of pointers is greater than or equal to the minimum value, the pointer is used as the final error position information, and if the number of pointers is smaller than the minimum value, correction is performed. Method described in section. 5 When the addition of 2 is not performed in the addition of the pointers, if the number of pointers is greater than or equal to the minimum value, the pointer obtained by the internal code is used as the final error position information without correction, and the pointer is 4. The method according to claim 3, wherein the correction is performed when the number of . is smaller than the minimum value. 6. A counter that counts the number of points indicating the error, and a coincidence determination circuit that determines whether or not the pointer indicating the error matches two error positions obtained by the external code, and the determination circuit If both of the results of the discrimination result do not match, the content of the counter is increased by two, and if only one match, the content of the counter is increased by one, and the content after the increment is set as the final number of pointers. The system according to claim 3, 4, or 5.