JPH0442907B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION BACKGROUND OF THE INVENTION The present invention relates generally to the protection of thyristor-based power conversion systems, and more particularly to detecting and responding to asymmetric unidirectional faults in such power systems. The present invention relates to a method and apparatus for initiating a protective operation.

BACKGROUND OF THE INVENTION Techniques for detecting asymmetric unidirectional faults in power systems, particularly systems feeding thyristor power converters, are generally known. One conventionally known method uses negative phase relays in the power supply circuit. However, these devices have two major drawbacks: (1) These devices often malfunction in the presence of harmonic voltages inherent in controlled rectifier type power converters. and (2) these devices cannot be used in variable frequency systems. This is because the above device cannot operate properly when the frequency deviates from the nominal design frequency.

Another known protection scheme uses current transformers in the AC power line conductors that feed the converter from a polyphase, e.g. three phase (3%) AC source. It turns out that this also has severe restrictions. That is, if the current transformer becomes saturated, the output signal generated will no longer be representative of the actual current that is being sensed. Additionally, current transformers, which are electromagnetic devices, are inherently bulky, expensive, and require considerable mounting space.

SUMMARY OF THE INVENTION Therefore, one object of the present invention is to
An object of the present invention is to improve a protection system for power conversion equipment.

Another object of the present invention is to provide an improved system for detecting asymmetric faults occurring in a power system feeding a thyristor power converter.

Another object of the present invention is to provide an improved system for detecting asymmetric unidirectional faults in a multiphase power system supplying multiphase AC power to a thyristor type power converter.

Another object of the invention is an improved system for detecting asymmetric unidirectional faults in a three-phase (3) AC power system feeding a thyristor power converter, which is sensitive to wide variations in line frequency. It is an object of the present invention to provide a system that is not only not affected by the distortion of the alternating current waveform caused by commutation.

Yet another object of the invention is an improved system for detecting asymmetric unidirectional faults in a power system feeding a thyristor power converter, bypassed during initial energization of the system and during power disconnection. The aim is to provide a system that eliminates the need for

The purpose as mentioned above is to rectify the asymmetric unidirectional voltage by individually rectifying both the positive and negative half-wave voltages of each phase of the AC power fed to the polyphase thyristor type power converter. This is accomplished by a method and apparatus for detecting faults. Determine the difference between the maximum positive rectified voltage and the minimum positive rectified voltage and the difference between the maximum negative rectified voltage and the minimum negative rectified voltage. If either differential voltage exceeds its respective predetermined limit, a logic output signal is generated to indicate the presence of an asymmetric fault in the phase-to-neutral or phase-to-phase voltage of the power converter. A signal representing . After a predetermined time delay after the occurrence of a logic output signal indicating a fault, a predetermined protection action is initiated. This action may be, for example, rephasing the gate drive to the thyristor of the converter and/or activating a contactor or circuit breaker which interrupts the supply of alternating current power to the converter.

DETAILED DESCRIPTION OF THE INVENTION Referring to the drawings, FIG. 1 shows a conventional three-phase (3)
1 is a schematic circuit diagram including an AC to DC power converter 10 in the form of an eight-thyristor bridge; FIG. This power converter 10 is connected to three Y-connected secondary windings 12 of a three-phase transformer 14 . 3 phase transformer 14
The triangularly connected primary winding 16 is connected by terminals 18, 20 and 22 to a multi-phase, more specifically three-phase power source.

The secondary winding 12 is composed of three windings (AN, BN, and CN), and the common point N is the neutral point of the Y-connections of the windings. The windings of the secondary winding 12 and terminals A, B, C and N are connected to the power converter 1 via four power line conductors 24, 26, 28 and 30 and a circuit breaker or contactor 41 of conventional design.
Connected to 0. The four thyristors 32, 34, 36 and 38 of the power converter 10 have positive A
+, B+, C+ and N+ thyristor groups, and thyristors 40, 42, 44 and 46 constitute corresponding negative A-, B-, C- and N- thyristor groups. As shown, conductor 24 for phase A is connected to a circuit node 48 common to A+ and A- thyristors 32 and 40.
Conductor 26 for system neutral N is connected to a circuit node 50 common to N+ and N- thyristors 38 and 46. Conductor 28 for phase B connects B+ and B- thyristors 34 and 4.
2 to a common circuit connection point 52. And finally, conductor 30 for phase C is connected to a circuit node 54 common to C+ and C- thyristors 36 and 44. DC load 56 may be, for example, a DC to AC inverter, which is connected across converter 10 by electrical conductors 58 and 60. As shown, conductor 5
8 is connected to the common connection point of the positive thyristor group,
Conductor 60 is connected to the common connection point of the negative thyristor group. Gate controller 62 is 8 of converter 10
The thyristors are configured to generate firing pulses that are applied to the thyristors in an appropriate predetermined sequence.

The phase-to-neutral voltages A, N, BN and CN for the system of FIG.
26 and 24 by four voltage divider circuits 64, 66, 68 and 70 connected to ground, respectively. Each voltage divider circuit provides a respective voltage at the coupling points 72, 74, 76 and 78, which is reduced, for example, by a factor of 100 of the instantaneous voltage value of the power conductor. Therefore, voltage dividers 64, 66, 68 and 70 can each be constructed with a 1 megohm fixed resistor in series with a 10 kilohm fixed resistor.

The voltage between the divided phases and the neutral point is divided into three 2
Provided as inputs to input differential amplifiers 80, 82 and 84. More specifically, the inverting input of differential amplifier 80 is connected to circuit node 76 of voltage divider circuit 68.
The non-inverting input is connected to a circuit node 78 of the voltage divider circuit 70. Similarly, the inverting input of differential amplifier 82 is connected to circuit node 76 of voltage divider circuit 68 , and the non-inverting input is connected to circuit node 74 of voltage divider circuit 66 . The inverting input of the differential amplifier 84 is connected to the circuit node 76 of the voltage divider circuit 68, and the non-inverting input is connected to the circuit node 76 of the voltage divider circuit 68.
It is connected to the circuit connection point 72 of No. 4.

As will be explained later, the fault detection circuit configured as shown in FIG. . This control signal is
It is used, for example, to phase back the ignition pulse applied to the thyristor of the transducer 10 or to inhibit the generation of the ignition pulse. Along with or in place of this control signal, the fault detection circuit sends an output signal to circuit conductor 88 connected to circuit breaker 31 to open the circuit breaker, thereby interrupting the supply of AC power to converter 10. do.

The system of FIG. 1 discloses an eight-thyristor power converter, while the system of FIG. 2 shows a conventional six-pulse converter configuration. As shown in FIG. 2, a six-pulse converter 110 is connected to a wye-wired secondary winding 112 of a power transformer 114. As shown in FIG. A triangularly connected primary winding 116 of power transformer 114 is connected to a three-phase AC power source by terminals 118, 120 and 122. Unlike the system of FIG.
4, 126 and 128 are connected directly to the 6-pulse converter 110. These conductors or power lines connect the three (A+, B+ and C+) thyristors 132, 134 and 13 of the positive group.
6 and three (A-, B-, and C-) thyristors 140, 142 and 144 of the negative group.
It is connected to the. A conductor 124 from terminal A, which supplies one of the three phase voltages, is connected to thyristors 132 and 140 at a node 148. The conductor 126 supplying the second phase voltage is connected to the thyristor 1
34 and 142 at connection point 152. Similarly, the secondary terminal C that supplies the third phase voltage
A conductor 128 from is connected to a circuit junction 154 between thyristors 136 and 144. Positive group thyristors 132, 134 and 136 are connected to one side of a DC load 156 by circuit connection 158. Negative group thyristors 140, 142 and 144 are connected to the opposite side of load 156 by circuit connection 160. 6-pulse converter 11
6-pulse gate controller 162 generates 6 firing pulses to fire 0 thyristors;
These ignition pulses are transmitted to thyristors 132 and 13.
4, 136, 140, 142 and 144, respectively.

The system shown in FIG. 2 also differs from the system configuration shown in FIG. 1 in the following points. That is, whereas circuit breaker 31 in FIG. 1 is connected to the secondary side of power transformer 14, circuit breaker 132 in the system of FIG.
is connected to the primary side of power transformer 114 and between three-phase AC power input terminals 118, 120 and 122 and triangular connected primary winding 116. Furthermore, while Figure 1 uses a voltage divider circuit and a differential amplifier to generate the phase-to-neutral voltages AN, BN, and CN, the 3-wire system in Figure 2 uses a potential transformer. 125, 127 and 129 provide phase-to-phase voltages AB, BC and CA. Again, the fault detection circuit shown in FIG. 5 and described below sends a first output signal to the gate controller 162 to rephase or remove the firing pulse to the transducer thyristor. along with the second
The circuit breaker 132 can be operated by sending a control output of the circuit breaker 132 .

Before explaining the failure detection circuit of FIG. 5, FIGS. 3 and 4 will be explained. Figures 3 and 4
The diagram illustrates two of the most common types of faults that can be detected by the circuit of FIG. FIG. 3 shows a phase-to-neutral fault occurring between terminals A and N of the secondary winding of power transformer 12 of FIG. This fault was caused by a short circuit in the thyristor, in this case thyristor 38, designated 38' in FIG. FIG. 4 represents a phase-to-phase fault, which occurs, for example, if one of the thyristors is short-circuited. For example, a thyristor 34 connected together with thyristor 32 between terminals A and B of the secondary winding is short-circuited, which is designated by 34'.
Of course, if another thyristor fails due to a short circuit, similar problems arise as with other types of faults, such as short circuits between two conductors due to some other reason. Therefore, the problem that must be detected is a short circuit (unidirectional or bidirectional) between any two power conductors.

Next, FIG. 5 shows a bipolar fault detection circuit. This fault detection circuit consists of two circuit parts 17.
0 and 170', both of which are substantially the same, except that the polarities and voltages of the diodes are opposite to each other. To explain in more detail, the three phase-to-neutral voltages AN, BN, and CN shown in Figure 1, or the phase-to-phase voltage AB, shown in Figure 2,
BC and CA as input signals at circuit terminals 172;
174 and 176, respectively. These signals are fed through respective input resistors 173, 175 and 177 to nodes 178, 180 and 182, and then to circuit conductors 179, 18.
1,183 and 179', 181', 183' to circuit portions 170 and 170'.

Looking first at the positive polarity circuit portion 170, the first set of diodes 184, 186 and 188 half-wave rectify the voltage applied to the terminals 172, 174 and 176, respectively, and the capacitors 190,
192 and 194 are charged. A second set of diodes 196, 198 and 200 are connected between the positive voltage line (+V) connected to terminal 202 and capacitor circuit nodes 204, 206 and 208, respectively. Terminal 202 and diode 1
Connection point 209 common to 96, 198 and 200
A resistor 210 is provided between the two. terminal 2
The magnitude of the supply voltage applied to terminal 17
Capacitors 190, 192 and 194 when the input voltages of 2, 174 and 176 are balanced
is set to a value such that the voltage across it is smaller than +V. Current is resistance 210, diode 19
6, 198 and 200 and a third set of diodes 212, 214 and 216 to a load pressure source (-V) connected to terminal 218. This current passes through a voltage divider circuit made up of resistors 220 and 222 connected in series between circuit node 223 and -V terminal 218. The positive polarity detection section 170 also includes a two-input comparison circuit 224, one input (non-inverting input) of which is connected to the conductor 226.
The other input (inverting input) is connected to circuit node 228 between resistors 220 and 222 by conductor 230 .

As long as the voltages at terminals 172, 174 and 176 are balanced, the voltages at circuit node 209 and circuit node 223 will be substantially equal. However, the voltage at voltage divider circuit node 228 and conductor 230 is negative by a predetermined amount relative to the voltage appearing at circuit node 209 and conductor 226.
Therefore, the voltages applied to both inputs of comparator 224 via circuit conductors 226 and 230 are not equal. Because the voltage on input conductor 226 is relatively positive, the comparator circuit outputs a relatively high positive voltage representing a logic "1" signal.

In the negative polarity circuit portion 170', similar components are indicated with a dot ('). This circuit section is substantially the same as positive polarity circuit section 170 except that the polarities of the diode and reference voltage are reversed. Section 170' operates similarly to section 170, with the following differences. That is, circuit connection point 209' is connected to the inverting input of comparator circuit 224' via circuit conductor 226', and circuit connection point 228' is connected to comparator 224' by circuit conductor 230'.
connected to the noninverting input of This means that when the input terminal voltages are balanced, comparator 224' still outputs a logic "1" signal. The outputs of the two comparators 224 and 224' are connected to a two-input NAND gate 234.
When the two comparators 224 and 224' are simultaneously outputting logic "1" outputs, the two-input NAND
Gate 234 provides a logic "0" output on circuit conductor 236 representing a no-fault condition.

It should be noted that the capacitor 190,
192 and 194 each have a resistor 24 in parallel.
0, 242 and 244 are connected to ground. Similarly, in the negative polarity circuit part, capacitor 19
0', 192' and 194' have shunt resistors 24
0', 242' and 244' are connected in parallel. Each capacitor and resistor combination is selected such that its time constant is at least two cycles of the input power frequency so that the voltage across each capacitor is affected by the normal commutation notch generated by a thyristor power converter. to effectively avoid receiving it.

If a phase-to-neutral fault or phase-to-phase fault occurs due to a failure of the thyristor of the converter 10 or 110 or for any other reason, capacitor 1
90, 192, 194 and 190', 192',
The voltage distribution between 194' changes significantly. For example, considering the phase-to-neutral fault of FIG. 3, the positive half of the phase-to-neutral voltage AN appearing at terminal 172 is suppressed by thyristor conduction. Therefore, the voltage across the capacitor 190 is the voltage across the resistor 24.
0 to almost zero, the circuit coupling point 20
The voltage at 9 will be lower than the voltage at circuit node 228. At this time, comparator 224 outputs a relatively low signal, ie, a logic "0" signal. Nando Gate 23
With a logic ``0'' signal applied to one input of 4 and a logic ``1'' applied to the other input, NAND gate 234 outputs a logic ``1'' signal on circuit conductor 236.

In the case of a phase-to-neutral fault of opposite polarity, the negative half of the phase-to-neutral voltage AN is suppressed and capacitor 190' is discharged. Therefore, comparator 224' outputs a logic "1" signal and the same result is obtained at the output of NAND gate 234. Note that since the phase-to-neutral voltages BN and CN are relatively unaffected, capacitors 192, 192',
This means that the voltage across 194 and 194' is relatively undisturbed.

In the case of a phase-to-phase fault in Figure 4, winding terminals A and N
The voltage between winding terminals C and N is relatively unaffected, while the unipolar voltages between winding terminals C and N are reduced to approximately half of their normal values. Thus, the voltage across capacitors 190 and 192 drops to approximately half of their normal values, while the voltage across capacitor 194 maintains its previous value. At this time, the resistance values of the voltage dividing resistors 220 and 222 are selected so that the voltage at the circuit connection point 228 has a more positive value than the voltage at the circuit connection point 209. Therefore, the connection point 228 is connected to the comparator 22 by the circuit conductor 230.
Since it is connected to the inverting input of comparator 22
The output of 4 will be a relatively low value and output a logic "0" signal. This causes the output of NAND gate 234 to become a logic "1" signal, indicating a fault.
Similarly, if a phase-to-phase fault of opposite polarity occurs, circuit portion 170' operates in a similar manner and the output of comparator circuit 224' becomes a logic "0" signal. This is comparison circuit 2
This is because the circuit conductor 230', which is the input of 24', has a negative value.

The detection circuit of FIG. 5 includes two time delay circuits 24.
6 and 248 are also included. These time delay circuits are cascaded to the output of NAND gate 234. The output of the first time delay circuit 264 is connected to the input of the second time delay circuit 248 as well as to the circuit conductor 86. Circuit conductor 86 is connected to gate controller 62 of FIG. 1 or gate controller 162 of FIG. Second time delay circuit 2
The output of 48 is connected to circuit conductor 88 . Circuit conductor 88 is connected to circuit breaker 32 in FIG. 1 or circuit breaker 132 in FIG. The signal appearing on circuit conductor 86 from first time delay circuit 246 constitutes a signal to initiate a phase adjustment to the thyristor of the converter to suppress and/or correct the fault, or to inhibit gate drive of the thyristor altogether. . In contrast, the signal appearing on circuit conductor 88 constitutes a trip signal, ie, a signal for opening a circuit breaker or contactor. The time delay of the first time delay circuit 246 is
The time delay is chosen to be greater than the time delay required for the initial excitation of 4 and to be greater than the time required to suppress the fault current by phasing the thyristor.

Therefore, after the output of NAND gate 234 becomes a logic "1" indicating a fault, first time delay circuit 246 signals the gate controller circuit accordingly. After the second time delay, if the fault still persists, time delay circuit 248
removes primary power from the converter by operating the circuit breaker.

The above is connected to a multiphase AC power supply, and each phase voltage is 2
A fault detection circuit for a thyristor-type power converter rectified with two half-wave rectifiers to produce positive and negative rectified voltages has been illustrated and described. The difference between the maximum and minimum amplitudes of the positive rectified voltage is determined, and similarly the difference between the maximum and minimum amplitudes of the negative rectified voltage is determined. If either of these differential voltages exceeds a preset limit, a logic signal is generated indicative of a phase-to-neutral or phase-to-phase fault as viewed from the input power line. The sequential protection actions that occur as a result of this logic signal are firstly the phasing or re-phasing of the gating signal to the thyristor of the converter, and second the thyristor-type converter connected in the circuit supplying AC power. the contactor or circuit breaker after another delay time.

While we have shown and described what are considered the preferred embodiments of the invention, modifications thereof will readily occur to those skilled in the art. Therefore, the invention is not limited to the specific configurations shown and described;
It is intended to cover all modifications, variations and changes that fall within the true spirit and scope of the invention as defined in the claims.

[Brief explanation of drawings]

FIG. 1 is a schematic circuit diagram of one embodiment of a three-phase power system according to the present invention that supplies AC power to a conventional three-phase eight-thyristor power converter. FIG. 2 is a schematic circuit diagram of one embodiment of a three-phase power system according to the present invention that supplies AC power to a conventional six-thyristor power converter. FIG. 3 is a schematic circuit diagram of a typical phase-to-neutral fault in the system of FIG. FIG. 4 is a schematic circuit diagram of a typical phase-to-phase fault in either the system of FIGS. 1 or 2. FIG.
FIG. 5 is a schematic circuit diagram of an embodiment of a fault detection circuit according to the present invention for use in the systems illustrated in FIGS. 1 and 2. Explanation of main symbols, 10, 110...Power converter;
14,114... Three-phase transformer; 12,112... Secondary winding of transformer; 24, 26, 28, 30, 12
4,126,128...Power line conductor; 31,132
...breaker; 32, 34, 36, 38, 40, 4
2, 44, 46, 132, 134, 136, 14
0,142,144...thyristor; 62,162
...Gate controller; 64, 66, 68, 70... Voltage divider circuit; 80, 82, 84... Differential amplifier; 125,
127,129...Instrument transformer; 184,18
6,188...first set of diodes; 190,19
2,194...Capacitor; 196,198,20
0...Second set of diodes; 212, 214, 21
6... Third set of diodes; 224... Comparator; 23
4... NAND gate; 246... First time delay circuit; 248... Second time delay circuit.

Claims (1)

[Scope of Claims] 1. A method for detecting a fault in a thyristor-type power converter connected to a multiphase AC power source by a plurality of power line conductors and receiving power therefrom, comprising: (a) connecting the converter from the power source to the power converter; (b) generating positive and negative rectified voltages by half-wave rectifying both the positive and negative parts of each phase voltage supplied to the phase voltage; (b) comparing the levels of the respective positive rectified voltages; (c) determining a difference between a maximum amplitude and a minimum amplitude of said positive rectified voltage and generating a signal representing the difference; (c) comparing the levels of each negative rectified voltage; (d) determining the difference between a maximum amplitude and a minimum amplitude of the difference and generating a signal representative of the difference; generating a fault indication signal whenever positive and negative limits are exceeded; and (e) initiating a predetermined protective action in response to said fault indication signal. . 2. In the method described in claim 1,
The method in which the polyphase AC power source is a three-phase AC power source, and the power converter is configured with a 6-thyristor type converter or an 8-thyristor type converter. 3 In the method described in claim 1,
The power converter is comprised of eight thyristor type converters, and the plurality of power line conductors include a neutral conductor.
consisting of four power line conductors connecting the power supply to the converter, and each phase voltage comprising one of three phase-to-neutral voltages supplied from the power supply to the converter. The way it is. 4 In the method described in claim 3,
A method of rectifying the positive and negative parts of each of the three phase-to-neutral voltages in step (a) above. 5. In the method according to claim 1, the power converter is composed of six thyristor type converters, and the plurality of power line conductors are composed of three conductors connecting the power source to the converter. and wherein each phase voltage comprises one of three phase-to-phase voltages supplied from the power supply to the converter. 6 In the method described in claim 5,
A method of rectifying the positive and negative parts of each of the three interphase voltages in step (a) above. 7 In the method described in claim 1,
A method in which the signals generated in steps (b) and (c) above are binary digital logic signals. 8 In the method described in claim 7,
A method in which the signal generated in step (d) above is a binary digital logic signal. 9 In the method described in claim 1,
A method in which the protective operation of step (e) includes performing predetermined control of the thyristor type power converter. 10. The method of claim 1, wherein the protective operation of step (e) includes returning the phase of the gate signal to the thyristor of the thyristor-type power converter. 11. The method according to claim 1, wherein the protective operation in step (e) includes cutting off the supply of AC power to the thyristor type power converter. 12. In a fault detection device for a thyristor-type power converter connected to and receiving power from a polyphase AC power supply by a plurality of power line conductor means, (a) each of the polyphase AC power supplied to said converter (b) means for rectifying both the positive and negative portions of each of said alternating signals, each having an amplitude proportional to the respective positive portion of each phase voltage; (c) comparing the amplitudes of each of the first plurality of rectified signals; (d) means for generating a signal representing a difference between a maximum amplitude and a minimum amplitude of the first plurality of rectified signals; (d) means for comparing the amplitudes of each of the second plurality of rectified signals; means for generating a signal representative of a difference between a maximum amplitude and a minimum amplitude of a plurality of rectified signals of; 1. A fault detection device for a thyristor-type power converter, characterized in that the fault detection device includes means for generating a fault indication signal whenever the above threshold is exceeded. 13. A fault detection device according to claim 12, including means for executing a predetermined protective operation of said device in response to said fault indication signal. 14. The fault detection device of claim 13, wherein the power converter includes a plurality of selectively gated thyristors, and wherein the means for performing the predetermined protective operation A fault detection device including means for rephasing gate signals for said plurality of thyristors of a converter. 15. In the fault detection device according to claim 14, the means for performing the predetermined protection operation detects the phase during a predetermined delay time after the occurrence of the fault indication signal. a fault detection device including time delay means for delaying the action of reversing the . 16. The fault detection device according to claim 13, further comprising means for cutting off power supply to the converter, and means for performing the predetermined protective operation when detecting the fault. A fault detection system including means for interrupting the supply of alternating current power to the converter by activating the interrupting means in response to a logic signal output from the means for generating an indicating signal. 17. In the fault detection device according to claim 16, the means for performing the predetermined protective operation further comprises: A fault detection device including time delay means for delaying activation of the blocking means. 18. In the fault detection device according to claim 12, the rectifying means includes first and second half-wave rectifying means for rectifying the positive and negative parts of the alternating current signal, respectively. failure detection device. 19. In the fault detection device according to claim 18, each of the first and second half-wave rectifiers is provided for each AC signal corresponding to each phase voltage, a first connected to the respective capacitor to charge the capacitor;
Each of the means for generating a comparing and difference signal comprising a set of rectifier diodes is provided, one for each capacitor, and respectively connected to a first voltage level at a first common circuit connection point. a second set of diodes, one for each capacitor, connected between each capacitor and the second common circuit connection point; a voltage divider network connected between said second common circuit connection point and a second voltage level and having a selected voltage take-off point, and one input of said first common circuit network of said second set of diodes; Fault detection comprising two input comparison means connected to the circuit connection point, the other input of which is connected to the voltage take-off point, and outputting a binary digital logic output signal in response to the voltage levels of the two inputs. Device. 20 In the fault detection device according to claim 19, the first and second voltage levels are predetermined voltage levels having opposite polarities, and the comparing means selects one of the two inputs. A fault detection device consisting of a comparator, one of which has a non-inverting input and the other of which has an inverting input. 21. The fault detection device according to claim 20, wherein the means for generating the fault indication signal comprises a two-input logic gate coupled to the binary digital logic output signal of the comparison means, and the logic gate. is coupled to the output of the converter to re-phase the gate signal to the thyristor of the converter and/or
or a fault detection device comprising at least one time delay means for selectively interrupting power supply to the converter from the power supply. 22. The fault detection device according to claim 21, wherein the at least one time delay means provides a relatively short time delay for delaying the action of rephasing the gate signal on the thyristor. and a second time delay means for providing a relatively long time delay for interruption of the power supply to the converter. 23. The fault detection device according to claim 21, wherein the logic gate is a NAND gate. 24. In the fault detection device according to claim 12, each of the means for comparing and generating a signal representing a difference includes a logic signal generating means for generating a respective logic signal output, and the above-mentioned A fault detection apparatus wherein the means for generating a fault indication signal includes logic signal generating means for producing a logic signal output in response to the logic signal output of the means for producing a difference signal. 25. A fault detection device according to claim 12, wherein said thyristor type converter includes a plurality of thyristors connected together in a bridge circuit. 26. The fault detection device according to claim 25, wherein the power source is a three-phase power source and the thyristor bridge circuit is a three-phase bridge. 27 In the fault detection device according to claim 26, the three-phase bridge comprises eight thyristors.
a bridge, said power line conductor means comprising four power line conductors connected between said bridge and said power source, said three phase power source including a power transformer, and said power line conductor means comprising four power line conductors connected between said bridge and said power source; The winding is 4 above.
A fault detection device connected to one conductor. 28 In the fault detection device according to claim 25, the three-phase bridge comprises six thyristors.
a bridge, said plurality of power line conductor means comprising three power line conductors connected between said bridge and said power source, said power source including a power transformer, said power transformer having a wye-connected secondary A fault detection device whose windings are connected to the three power line conductors.