JPH0443419B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a semiconductor integrated circuit, and particularly to an insulating isolation substrate used in a monolithic semiconductor integrated circuit.

[Background of the invention]

In general, in a monolithic semiconductor integrated circuit, a large number of various integrated circuit elements (transistors, diodes, thyristors, resistors, capacitors, etc.) are formed within a single chip or an insulating substrate (hereinafter abbreviated as the substrate). , these must be electrically insulated and separated.

One method for this separation is dielectric insulation separation. The substrate and manufacturing method of this system will be explained with reference to FIG.

First, as shown in a, one conductivity type n
A type silicon single crystal wafer 1 is prepared, and separation grooves 2 of a desired number and shape are formed on one side thereof by etching or the like.

An insulating film 3 such as a silicon oxide film is deposited on the surface on which the separation trench 2 is formed, and a silicon polycrystalline layer 4 as a support region is grown thereon by a vapor phase growth reaction or the like. Thereafter, using the surface of the silicon single crystal wafer 1 as a reference, the silicon polycrystal support layer 4 is polished to create a flat surface, and then, using this flat surface as a reference, a separation groove is formed from the silicon single crystal wafer surface on the opposite side. The silicon single crystal wafer 1 is removed by polishing or etching until the bottom of the silicon wafer 2 is reached. By completing this step, a substrate 5 as shown in FIG. 1b is obtained.

The substrate 5 thus obtained has a plurality of silicon single crystal island regions 6 electrically separated from each other by the insulating coating 3, and is supported as a whole by a silicon polycrystalline support layer 4. A desired integrated circuit element is formed by diffusing predetermined impurities into each of these silicon single crystal island regions 6 in a predetermined pattern.

However, in such a substrate 5, (1) a silicon polycrystalline support layer 4 is formed on a silicon single crystal wafer 1 with an isolation groove formed thereon via an insulating film 3;
After forming, the substrate 5 is curved in such a direction that the silicon polycrystalline support layer 4 side becomes a concave surface.

(2) In the heat treatment step after forming integrated circuit elements on the single crystal island region 6, the entire substrate 5 is curved in a direction in which the silicon polycrystalline support layer 4 side becomes a convex surface.

There is a serious problem.

In other words, the curvature in (1) can cause a significant loss in the precision of polishing unnecessary silicon single crystal wafers,
The curvature of the substrate 5 causes crystal defects to be introduced into the silicon single crystal island region 6, leading to a decrease in product yield.

In addition, the curvature in (2) may impede the accuracy and uniformity of the photoetching process when forming integrated circuit elements, or cause crystal defects to be introduced into the silicon single crystal island region 6, similar to the curvature in (1). , which also deteriorates the product yield.

As described above, the problem of bending of substrates using dielectric insulation separation method in which different materials are laminated during heat treatment at high temperatures (approximately 800 to 1300 degrees Celsius) is an essential problem, and it is important to solve this problem. It is.

In recent years, with the progress of higher integration and larger diameter substrates, solving these curvature problems has become an increasingly important issue.

By the way, as a measure to prevent the curvature that occurs in the silicon polycrystal support layer growth step shown in (1), H ₂ and SiHnXm (X is usually a halogen element, n and m are 0 to 0) are used as raw material gas for polycrystal growth. There is a technique (Japanese Patent Publication No. 45-32731) in which impurities are added to a mixture with polycrystalline silicon (number 4) to give polycrystalline silicon fine particles a modified crystal structure.

According to this method, it has been experimentally confirmed that adding impurities such as O ₂ or CO ₂ or N ₂ O to the raw material gas is very effective.

However, even if such measures are taken to achieve a substrate with less curvature after the growth of a silicon polycrystalline support layer with a modified crystalline structure, the subsequent heat treatment step for forming integrated circuit elements in the silicon single crystal island region is difficult. in,
This time, the substrate is curved so that the silicon polycrystalline support layer side becomes convex (2). This indicates that the method of controlling curvature by adding impurities in addition to the raw material gas during the formation of the silicon polycrystalline support layer alone is not a means to completely solve the problem of curvature of substrates using dielectric insulation isolation. Recognize.

On the other hand, regarding (2) the problem of curvature during the formation of integrated circuit elements, the inventors investigated through experiments and found that the following
We have clarified matters (a) to (e).

(a) That is, the curvature caused by high-temperature heat treatment during the formation of an integrated circuit element is such that the silicon polycrystalline support layer side is a convex surface (the silicon single crystal island region side is a concave surface).

(b) Curving does not occur during heat treatment in a gas atmosphere such as N ₂ , Ar, H _{2 ,} etc., but only occurs through heat treatment in an oxygen gas atmosphere.

(c) The higher the heat treatment temperature (900℃), the more
The longer the heat treatment time, the greater the degree of curvature.

(d) When the surface of the silicon polycrystalline support layer of the substrate, which has been curved by heat treatment in an oxygen gas atmosphere, is removed by etching or the like by several μm to 50 μm, the curve returns to the state before the heat treatment.

(e) The surface of the silicon single crystal support layer is coated with IMA (Ion
As a result of microanalyzer analysis, a large amount of oxygen was detected.

From the above experimental results, the cause of the curvature caused by high-temperature heat treatment in an oxygen gas atmosphere, as in the case of forming integrated circuit elements, is that silicon polycrystalline grains form on the surface of the silicon polycrystalline support layer of the substrate. This is because wedge-shaped oxidation, extremely high concentration of oxygen diffusion, or precipitation occurs along the boundary, and expansion strain due to this exists on the surface of the silicon polycrystalline support layer. I think that the.
Note that oxygen is less likely to enter the silicon single crystal wafer side surface compared to the polycrystalline side surface, so no expansion strain occurs.

As one effective measure against the curvature caused by such causes, the inventors have developed a film that prevents oxygen from entering from the surface of the silicon polycrystalline support layer, as shown in FIG. 2a or b. For example, silicon oxide film (SiO ₂ ), silicon nitride film (Si ₃ N ₄ )
(Japanese Patent Application No. 50-95824) proposed a structure of a support region in which a coating 7 such as the above is buried at or near the surface of a silicon polycrystalline support layer.

In other words, this proposal prevents the curvature (1) that occurs in the process of forming a silicon single crystal support layer by adding impurities to the raw material gas for vapor phase growth and making the polycrystalline fine particles have a modified crystal structure. However, the curvature caused by the oxidation and diffusion heat treatment in the integrated circuit element forming step (2) is prevented by providing an oxygen intrusion prevention film 7 near the surface on the silicon polycrystalline support layer side, and the entire manufacturing process of the monolithic semiconductor integrated circuit is prevented. A substrate without curvature is obtained through the process.

The manufacturing process for the substrate shown in FIGS. 2a or 2b is similar to the manufacturing process for the substrate shown in FIG. 1, so a description thereof will be omitted.

8 is a silicon polycrystalline thin layer.

However, the inventors conducted more detailed experiments on the above-mentioned proposal on a substrate having a support area configuration, and discovered the following.

(A) In the case of the structure shown in FIG. 2a, depending on the heat treatment conditions (temperature, time) in an oxygen atmosphere, the surface on the silicon polycrystalline support layer 4 side curves in a concave direction, contrary to the conventional case.

(B) In the case of the configuration shown in FIG. 2b, even if the same heat treatment conditions (temperature, time) are applied in an oxygen atmosphere, silicon polycrystals remain on the surface side of the silicon polycrystalline support layer of the oxygen intrusion prevention film 7. The thickness of the thin layer 8 is large,
The size of the curvature changes depending on the size.

(C) Even under the same heat treatment conditions, the degree of curvature changes depending on the thickness of the polycrystalline silicon support layer 4 having a modified structure formed by adding impurities. This occurs in both structures a and b.

From the above experimental results, it is clear that the proposed substrate curvature shown in FIGS. 2a and 2b causes the silicon polycrystalline support layer 4 side surface to be concave, which is caused by shrinkage due to heat treatment of the silicon polycrystalline support layer 4 having a modified structure. Due to the curvature and expansion strain caused by oxygen intrusion into the silicon polycrystalline thin layer 8 existing on the surface of the oxygen intrusion prevention film 7, the curved pole in the opposite direction to the above, with the silicon polycrystalline support layer 4 side surface being a convex surface, is caused. It turns out that this is determined by a countervailing relationship.

In order to reduce the substrate curvature shown in FIG. 2 as described above, it is necessary to control the thickness of the silicon polycrystalline layer and the thickness of the silicon polycrystalline layer 8 remaining on the oxygen infiltration prevention film 7 in consideration of the heat treatment conditions during device formation. be. In particular, it is necessary to accurately control the thickness of the silicon polycrystalline layer 8 on the order of several μm.

In order to solve this problem, the inventors proposed a new substrate structure as shown in Figure 3 (Japanese Patent Application Laid-Open No.
No. 57-102044). That is, after forming the modified silicon polycrystalline support layer 4, by forming a layer in which several oxidation invasion prevention films 7 and silicon polycrystalline layers 8 are laminated at regular intervals in the same reactor, the following can be achieved. In the polishing process, no matter where the reference plane A for polishing the single crystal 1 side is formed, a substantially constant amount of silicon polycrystalline layer 8 is always formed.
It was designed to expose the

However, in order to manufacture a substrate with the structure shown in Fig. 3, it is necessary to add a step of forming a silicon polycrystalline layer 8 and an oxygen infiltration prevention film 7 by vapor phase growth in the same furnace, which increases the process time. increases. This results in difficulties such as making the vapor phase growth work more complicated and requiring more maintenance work for the reactor.

[Purpose of the invention]

An object of the present invention is to provide a substrate that can freely control curvature during the manufacturing process, resulting in no substrate curvature, and which can significantly improve product yield.

[Summary of the invention]

A feature of the present invention is to reduce substrate curvature by forming an oxygen infiltration prevention film having a certain percentage of open area on the surface of a silicon polycrystalline support layer and adjusting the amount of oxygen invading.

[Embodiments of the invention]

The present invention will be explained in detail below with reference to FIG. First, as shown in FIG. 4a, for example, after forming a separation groove 2 using a method such as selective etching using an n-type silicon single crystal wafer 1 as a starting material, an insulating film 3 (for example, a SiO ₂ film) is formed on the entire surface. to form.
Next, as shown in b, a silicon polycrystalline support layer 4 is formed by a gas phase chemical reaction. In this case, a modified silicon polycrystalline layer is created by mixing a small amount of CO ₂ gas during growth to reduce the curvature that occurs during formation. Next, using the single crystal side surface as a reference plane, the single crystal side surface is polished to line A to create a reference plane for single crystal side polishing, and then polished to broken line B to separate the single crystal island regions 6. In this polishing step, the CO ₂ doping method reduces substrate curvature after forming the support layer, making it possible to polish with high precision.

Next, as shown in c, an oxygen infiltration prevention film 9 is formed on the surface of the support layer 4 side. The film quality is, for example, a film that does not contain oxygen, such as a silicon nitride film Si ₃ N ₄ . This is due to the following reasons. Normally, when forming a p-n junction in a single crystal island region to form a circuit element, first an oxide film (SiO ₂ ) is used as a mask to selectively form a p-type region and an n-type region.
form. Since this heat treatment step is usually carried out in an oxygen atmosphere at a high temperature of 1200° C., the support layer may shrink or expand due to oxygen intrusion. The curvature of the substrate almost reaches a saturation value in this step, and changes in subsequent heat treatments such as the diffusion step are small. This trend is
This is noticeable when thickening the oxide film and using it together with the p-n junction protective film, as the heat treatment conditions (especially the time) become harsher (because the dielectric structure is used for the purpose of high breakdown voltage isolation, oxidation is inevitable). The film thickness is thick).

In order to prevent oxygen from entering under the heat treatment conditions in the oxidation process, it is necessary for _the film itself to act as a barrier against oxygen entry and not to become _a source of oxygen. It is necessary to choose the membrane quality.

Next, according to the present invention, as shown in d, a part of the oxygen infiltration prevention film 9 is selectively removed by photolithography and etching to provide an opening region 10. In this case, the aperture ratio of the film is determined experimentally by taking into consideration the thickness of the polycrystalline support layer 4 and the heat treatment conditions in the post-process. Further, the removal pattern may be either a continuous arrangement b of the openings as shown in FIG. 5 or a dotted pattern a. Further, it is not necessary to provide uniform distribution over the entire back surface of the substrate.

With this structure, a suitable amount of oxygen enters the back surface of the substrate during the oxidation heat treatment, and expansion force acts on the back surface side. As mentioned above, this force is caused by recrystallization and shrinkage of the grains in the silicon polycrystalline layer 4 during heat treatment and by the SiO ₂ layer 11 mainly formed in the single crystal island region 6 on the substrate surface side. (Since most of the back surface of the substrate is a Si ₃ N ₄ film, the SiO ₂ layer is formed only in the opening area) has a smaller coefficient of thermal expansion than the polycrystalline layer 4, so the back surface of the substrate is made concave. cancel out such power.

For this reason, substrate curvature after thermal oxidation can be kept to a minimum.

Of course, it is also possible to adjust the substrate curvature to the optimum one by considering the magnitude and direction of the curvature after the oxidation process.

The steps of opening a predetermined portion of the oxide film 11 by photolithography and selectively diffusing impurities are repeated several times.
Necessary elements are formed as shown in FIG. 4e.

The present invention can be applied not only to substrates using a dielectric isolation method, but also to substrates using other insulation separation methods.

FIG. 6 shows an example of application to a pn junction insulation isolation type substrate.

First, an n-type silicon single crystal wafer 1 is prepared, and an insulating film 3 is provided without creating a separation groove. Thereafter, after a polycrystalline silicon support layer 4 with a modified structure is formed, unnecessary single crystal portions are removed by polishing. Next, an oxygen infiltration prevention film having an open area on the side surface of the support layer 4 is formed. Thereafter, through an oxide film formation and photolithography process, p-type impurities are added to the silicon single crystal island region 6 of the silicon single crystal wafer 1.
The p-type isolation region 12 is diffused into the isolation trench pattern.
will be established. Each silicon single crystal region 6 has a pn junction formed by each silicon single crystal region 6 and p-type isolation region 12.
will be insulated and separated.

FIG. 7 shows an example in which the present invention is applied to an air separation/insulation separation type substrate.

This substrate 5 is manufactured using substantially the same process as the substrate 5 shown in FIG. The difference is that an isolation trench 2 is provided instead of a p-type isolation region 12. This isolation groove 2 may be formed by etching instead of the step of forming the p-type isolation region 12, but it is possible to form the integrated circuit by diffusing p-type or n-type impurities into the portion corresponding to each silicon single crystal island region 6. If it is formed after the elements are formed, photoetching work, mask formation, etc. can be performed with high precision during impurity diffusion.

FIG. 8 shows a substrate 5 of the same dielectric isolation type as the substrate 5 shown in FIG.

The difference from the one in FIG. 4 is that an n-type high impurity concentration region 13 is formed in the portion of each silicon single crystal island region 6 that is in contact with the insulating film 3.

This n-type high impurity concentration region 13 is shown in FIG.
This can be easily provided by forming the n-type impurity at a high concentration after forming the isolation trench 2, and then forming the insulating film 3.

The n-type high impurity concentration region 13 is used as a channel stopper or the like.

Of course, even in the embodiments shown in FIGS. 6 and 7,
It is easy to provide this n-type high impurity concentration region.

In each of the embodiments shown in FIGS. 6 to 8, the fourth
Similar to the substrate shown in the figure, the curvature of the substrate can be precisely controlled.

〔Effect of the invention〕

According to the present invention, the curvature in the polycrystalline growth process is controlled by a silicon polycrystalline support layer with a modified structure, and the curvature caused in the heat treatment process during the formation of integrated circuit elements is controlled by a silicon polycrystalline support layer provided in a part of the oxygen infiltration prevention film. All processes are controlled by the canceling relationship between the expansion strain caused by oxygen entering through the opening, the contraction strain of the silicon polycrystalline support layer with a modified structure, and the strain caused by the oxide film formed on the single crystal island region. This allows the board curvature to be minimized.

[Brief explanation of the drawing]

Figures 1a and 1b are schematic sectional views showing a conventional board in the order of manufacturing steps, Figures 2a, b, and 3 are schematic sectional views showing an improved conventional board, and Figure 4a
-E are schematic cross-sectional views showing a substrate according to an embodiment of the present invention in the order of manufacturing steps, and FIGS. 5-8 are schematic cross-sectional views of substrates showing different embodiments of the present invention, respectively. 1...Silicon single crystal wafer, 2...Separation groove,
3... Insulating film, 4... Silicon polycrystalline support layer,
5...Substrate, 6...Silicon single crystal island region, 7...
... Oxygen infiltration prevention film, 8 ... Silicon polycrystalline layer, 9
... Oxygen infiltration prevention film, 10 ... Opening area, 11 ...
…Oxide film.

Claims (1)

[Scope of Claims] 1. A plurality of semiconductor single crystal island regions that are electrically insulated from each other and each having an integrated circuit element formed therein;
In this multi-edge separation substrate comprising a support region supporting each semiconductor single crystal island region, the support region is comprised of a polycrystalline support layer with a modified structure, and one surface thereof is in contact with the semiconductor single crystal island region. An insulating isolation substrate characterized in that the other surface is in contact with an oxygen infiltration prevention film having an opening region. 2. The insulating isolation substrate according to claim 1, wherein the single crystal island region and the polycrystalline support region are silicon, and the oxygen infiltration prevention film is a silicon nitride film.