JPH0443596B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an improvement in a display device that performs display using raster scan.

(Prior Art) Display methods of raster scan type display devices can be divided into two types: character display and graphic display. Here, character display uses a character generator to display a character pattern at high speed, and the size and position of the displayed pattern are fixed. On the other hand, graphic display uses an image memory that has a one-to-one correspondence with the display screen, and images can be drawn freely, but the display speed of character display is slow. Therefore, in some types of display devices, both methods are used to switch and display, or when both are synchronized, they are simply superimposed and displayed.

(Problem to be Solved by the Invention) However, although such a device can take advantage of the advantages of both methods to display a mixed display, it is not possible to store the contents of the mixed display in memory or to synchronize it with the display device. It is difficult to make a hard copy with a printer that does not.

The present invention has been made with attention to these points, and its purpose is to provide mixed display by taking advantage of the character display function and graphic display function with a relatively simple circuit configuration. The object of the present invention is to provide a device that can store the contents of a computer in a memory and obtain a hard copy with a printer that is not synchronized with a display device.

(Means for Solving the Problems) The present invention achieves the above object by selectively writing to an image memory for graphic display in a raster scan type display device having a character display function and a graphic display function. The present invention is characterized in that data for character display is written into an image memory for graphic display while delaying the address for graphic display by one character with respect to the address for character display by adding a signal (embodiment). This will be explained in detail using drawings.

The figure is a block diagram showing one embodiment of the present invention, and shows a display device configured so that character display and graphic display are performed synchronously. In the figure, the CPU is a processor,
It has the function of controlling the operation of the entire device. CDC is a character display controller that controls the character display function, GDC is a graphic display controller that controls the graphic display function, and REG is a transfer mode register. is connected to the processor CPU. CG is a character generator that generates predetermined character pattern data in response to a code signal applied from the character display controller CD, and VM is a character generator that generates predetermined character pattern data in response to a code signal applied from the graphic display controller GDC and an address signal applied from the transfer mode register REG. This is an image memory controlled by a mode setting signal. PSC1
and PSC2 are parallel-to-serial converters that convert parallel data to serial data, and the number of conversion bits for both is assumed to be equal. Parallel serial converter PSC1 is a character generator
Convert the parallel character pattern data output from the CG to serial character pattern data and add it to one input terminal of the OR gate OG.
Parallel serial converter PSC2 is image memory VM
The parallel image data output from the OG is converted into serial image data and applied to the other input terminal of the OR gate OG. Parallel character pattern data output from the character generator CG is applied to the parallel to serial converter PSC1 and also to the image memory VM.
Parallel image data outputted from the processor is applied to the parallel-to-serial converter PSC2 and also to the processor CPU. As a result, the OR gate OG outputs the logical sum of the output data of the parallel-serial converter PSC1 and the output data of the parallel-serial converter PSC2 as image data.

The operation of the device configured in this way will be explained.

That is, in the present invention, the display cycle of character display and graphic display is used to write the display output of character display to the image memory VM in accordance with the display speed. In such writing, first, the address for graphic display added to the image memory VM is delayed by one character width dot. Such delays are caused by graphic display controllers
This can be easily done using the functions built into the GDC, but if the graphic display controller GDC does not have a delay function, it can be easily implemented using a latch circuit. Next, to set the transfer mode, set the transfer mode register REG to “1”.
Make it. The output of this transfer mode register REG functions as a write signal for the image memory VM, so that data for character display can be written to the image memory VM. Then, after one display cycle, the transfer mode register REG is set to “0” and the image memory
Return to normal display by restoring the address for the graphic display added to the VM. Note that if the number of conversion bits of the parallel-serial converters is an integral multiple of each other, a latch circuit may be provided as a buffer.

When writing data for character display to the image memory VM in this way, there are two methods: destroying the data written to the image memory VM and directly writing the data for character display as is, or writing the data to the image memory VM directly. One possible method is to overwrite character display data on the data written to the VM. In the former case, one image memory is dedicated to character display data, and the overlapping display of the graphic pattern and character pattern is performed using a calculation function between image memories, a multi-window display function, etc. do it like this. According to such a method, the circuit configuration becomes simple and practical. In the latter case, the logical sum of the data written in the image memory and the character display data will be written. That is, before writing these logical sums, the contents of the image memory are read out and the logical sum with the character display data is calculated. For this reason, one display cycle becomes long, making it unsuitable for high-resolution display requiring a short access time, but the image memory can be used more effectively than the former.

With this configuration, data for character display can be written to the image memory VM for graphic display, and this image memory VM
The data for character display written on the computer can be stored in a file device such as a disk together with the data for graphic display, or a hard copy can be obtained using a printer such as a laser printer that operates at high speed with its own timing.

In particular, when a high-performance text processor is used, it is difficult to reproduce its advanced display capabilities on the image memory using software, and it requires a large amount of processing time. This can be achieved through configuration.

(Effects of the Invention) As explained above, according to the present invention, with a relatively simple circuit configuration, mixed display is performed by taking advantage of the character display function and graphic display function, and the contents of the mixed display are stored in memory. A display device that can obtain a hard copy using a printer that is not synchronized with the display device can be realized.

[Brief explanation of drawings]

The figure is a block diagram showing one embodiment of the present invention. CPU...Processor, CDC...Character display controller, GDC...Graphic display controller, REG...Transfer mode register, B...Bus, CG...Character generator, PSC...Parallel-serial converter, VM ...Image memory, OG...ORGATE.

Claims (1)

[Claims] 1 In a raster scan type display device having a character display function and a graphic display function, a write signal is selectively applied to the image memory for graphic display, and the address of the graphic display is delayed by one character with respect to the address of the character display. A display device characterized in that data for character display is written into an image memory for graphic display.