JPH0443966A - Detection circuit for power failure - Google Patents

Abstract

PURPOSE:To obtain a detection circuit for power failure provided with an appropriate insensitivity conformed to the condition and kind of a controller by changing an output holding time to detect the power failure in accordance with the kind of set voltage in an impedance element. CONSTITUTION:When the 1st power failure happens, the input voltage goes down to a detection level of the higher side and the current of an impedance element 8 is stopped, then a photocoupler 10a becomes the off state. A 'detection signal for power failure' is not outputted from AND circuits 13, since a power failure duration time : t1 is shorter as compared with a 'set time of delay circuit 11 : t2'. For the 2nd power failure, the input voltage goes down, e.g., to the detection level of the higher side as shown by a solid line, and when this state is continued longer than t2, the detection signal for power failure is outputted. In the case the input voltage goes down to the detection level of the lower side as shown by a broken line, the current of impedance element 9 is stopped, and when this state is continued longer than t3, the detection signal for power failure is outputted.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a power outage detection circuit that is moderately insensitive to instantaneous power outages.

[Prior art] Fig. 3 shows a conventionally known power outage detector (100).
This is a configuration example. In the figure, (1) is the supply power, (2
) is a direct current power supply (hereinafter referred to as DCPS) which receives the supply power (1) and outputs, for example, DC5V, and (3) is a control device including a CPU and the like.

The power outage detector (100) also includes a transformer (4) that serves as insulation and step-down, a level detection circuit (5) that compares its output with a power outage detection set value, and an output that detects how many AC cycles are missing. The other part consists of a detection circuit (6).

Next, the operation will be explained. Normally, the power supply (1
) to DCPS(2) from AClooV, DC
PS(2)7><By supplying stable DC5v to the control device (3), the control device (3) performs normal operation.

In the power outage detector (100), AClooV is connected to the transformer (
In step 4), insulation is achieved and the voltage is lowered to an appropriate level that can be detected by the circuit, thereby obtaining the voltage level shown in FIG. 4(A). The level detection circuit (5) compares the input voltage level with a preset power failure detection level, and determines that a power failure has occurred when the input voltage is lower than the set value. In the event of a power outage, a pulse signal as shown in FIG. 4(B) is output from the power outage detector (100). Furthermore, in the event of an instantaneous power outage (hereinafter referred to as an instantaneous power outage), a pulse signal is similarly output by detecting a peak as shown in FIG. 5 using a peak detection circuit (6). These pulse signals are input to the control device (3), and in the control device (3), the DCPS
Before the DC5v from (2) becomes unstable and malfunctions such as the CPU going out of control, necessary data is saved and stored.

[Problems to be Solved by the Invention] Since the conventional power failure detection circuit (100) is configured as described above, regardless of the load state of the control device W (3), if a certain condition is satisfied, A power outage pulse is always output. Therefore, even if the power outage does not affect the operation of the control device (3), the operation of the control device f (3) will be interrupted by the power outage detection pulse signal from the power outage detector (100). Become.

This invention was made to solve the above-mentioned problems, and has a simple configuration that allows the control device (3) to
The purpose of this invention is to obtain a power outage detection circuit that has appropriate insensitivity depending on the state and type of power outage.

Means for Solving Problem C] A power outage detection circuit according to the present invention has a plurality of impedance elements that detect whether a power supply voltage exceeds a set voltage, and is connected to an impedance element having a high set voltage. A device connected to an impedance element with a low set voltage detects an instantaneous power outage with a short output holding time.

[Operation] The power failure detection circuit according to the present invention has a plurality of types of set voltages in the impedance element that detects the power supply voltage.

Since the output holding time for detecting a power outage is changed depending on the type of set voltage, power outage can be detected in accordance with the load of the control device.

[Example] Hereinafter, an example of the present invention will be described with reference to the drawings. 1st
In the figure, (1) to (3) are the same as the conventional one. (20
0) is a power failure detection circuit according to this embodiment, (7) is a smoothing circuit, (8) and (9) are impedance elements for detecting a high set voltage, and (9) is a low set voltage. It is an impedance element for detection, (10a), (1
0b) is a photocoupler for insulating and generating pulses at an appropriate level. (11) is a delay circuit with a long delay time suitable for a high set voltage, (12) is a delay circuit with a short delay time suitable for a low set voltage, and (13) is a delay circuit with a short delay time suitable for a low set voltage.
) is an AND circuit that ANDs the direct signals from the photocouplers (10a) and (10b) and the delayed signals from the delay circuits (11) and (12), and (14) is an AND circuit (1
This is an OR circuit that ORs the signals from 3).

Next, the operation will be explained based on FIG. 2. Note that FIGS. 2(a) to (e) correspond to (a) to (e) in FIG.
) signals are supported. As shown in Figure 2(a),
When the first power outage occurs, the input terminal drops to the higher detection level, and as a result, the current in the impedance element (8) stops, the photocoupler (10a) turns off, and the output from the photocoupler (10a) becomes Hi, and A
The signal input to the ND circuit (13) becomes Hi.

However, the power outage duration: tl is the “grace time for normal operation of the control device (3)” and the “delay circuit (11)
setting time: t2'', so the AND circuit (1
3) is input to the other input terminal.

Therefore, both human power signals to the AND circuit (13) do not become Hi at the same time, and therefore, the "power failure detection signal" - "Hi multiplied signal" is not output from the AND circuit (13).

However, in response to the second power outage, the input voltage drops to the higher detection level, as shown by the solid line, and this decreases to t.
If it continues for two or more times, both human power signals to the AND circuit (13) become Hi and are input to the AND circuit (13), so a power outage detection signal is output as shown in (b).

Furthermore, when the input voltage drops to the lower detection level as shown by the broken line, the current in the impedance element (9) stops and the photocoupler (10b) turns off.
If this continues for t3 or more, the output from the delay circuit 12 also becomes Hi, and as shown in (c), the power failure detection signal is output earlier than in (b). Therefore, an OR circuit (1
The output of 4) can be set to Hi. Here t
2>ta>tt.

Therefore, the control device (3) can end the process. Therefore, a momentary power outage can be determined according to the level of the power supply voltage, and necessary processing can be completed immediately before a malfunction occurs in the control device (3), so that unnecessary stoppage of operation can be suppressed.

Note that although the above embodiment has been described using an AC power source, the same thing is possible with a DC power source. The power outage detection signal is a pulse signal that becomes Hi when detected, but for self-inspection of the circuit, it is set to Hi when normal and becomes Lo when a power outage is detected, so that the control device (3) periodically It is also possible to check the signal automatically. There are various methods for the delay circuit (11), such as a charging circuit using CR, a counter, and a monostable multivibrator. - [Effects of the Invention] As described above, according to the present invention, it is possible to obtain a power outage detection circuit that is arbitrarily insensitive to power outages with a simple circuit configuration, so that it is possible to obtain an inexpensive and optimal operation of a control device. It has a guaranteed effect.

[Brief explanation of drawings]

FIG. 1 is a diagram of a power failure detection circuit according to an embodiment of the present invention, FIG. 2 is an explanatory diagram of its operation, FIG. 3 is a functional block diagram of a conventional power failure detector, and FIGS. 4 and 5 are diagrams of a conventional power failure detector. It is an operation explanatory diagram. In the figure, (3) is a control device, (8) and (9) are impedance elements, (10a) and (10b) are photocouplers, (11) and (12) are delay circuits, (
13) is an AND circuit, (14) is an OR circuit, (200)
is a power outage detection circuit. In addition, in the figures, the same reference numerals indicate the same or corresponding parts. h>t3>i. - 2 Figure 1゜2゜ Title of the indicated invention in the case 3゜ Person making the amendment 4. Written amendment of agent procedure (voluntary) September 18, 1990 Patent Application No. 153178 Power failure detection circuit diagram ( 8) Output (B) - 1111 Row - Figure 5, column for detailed explanation of the invention of the specification subject to amendment and drawings. 6. Details of correction □t h＞t3 〉tI Fig.

Claims (1)

[Claims] A plurality of impedance elements each detecting whether the power supply voltage exceeds a plurality of different preset voltages, and a plurality of impedance elements each connected to the plurality of impedance elements and detecting a momentary power outage from the output thereof. Among the above detection circuits, those connected to impedance elements with high set voltages detect instantaneous power failures with a long output holding time, and those connected to impedance elements with low set voltages detect momentary power failures. A power outage detection circuit characterized by detecting instantaneous power outages of short duration.