JPH0444778B2 - - Google Patents

Description

[Detailed Description of the Invention] Technical Field The present invention relates to a capacitor switching type reactive power adjustment control method for controlling a device that adjusts the input capacity of a phase advance capacitor for adjusting reactive power in an electric power system, and in particular, to The method for calculating the input capacity has been improved to prevent overcontrol from occurring and stabilize the system.

Prior Art In general, as a reactive power adjustment device that stabilizes grid power by adjusting the reactive power of the power system, multiple sets of capacitor banks for advancing the phase of grid AC power are prepared, and one of them is used when the power grid is actually turned on. The number of pairs to be connected is adjusted by opening and closing a thyristor switch. A schematic configuration of such a capacitor opening/closing type reactive power adjusting device is shown in FIG.

In the illustrated schematic configuration, the actual voltage value 6 detected by the voltage detector 2 connected to the grid power line 1 is
A voltage comparator 5 compares the specified voltage value 4 with a separately set desired voltage specification value 4, and transmits the voltage deviation value as a result of the comparison to the control device 3. The control device 3 calculates how many of the capacitor banks C1 to Cn should be connected to the power system and connected to the power line 1 according to the input voltage deviation value, and according to the result of the calculation, Thyristor switch
An on command or an off command is given to each of TH1 to THn, and the voltage deviation is brought to zero in accordance with the voltage deviation value at that time.In other words, a number of sets of capacitor banks are selectively connected to the grid power line 1. The present invention is an improvement of the control device 3 that controls the opening and closing of the phase advance capacitor.

However, since this type of capacitor opening/closing type reactive power adjustment device performs on/off control of the phase advance capacitor, continuous phase advance adjustment is not possible. Therefore, in this type of reactive power adjustment device, proportional-integral control, that is, so-called PI control, which is generally used in analog control systems cannot be applied. Discontinuous stepwise control was performed based on the operation waveforms of each part as shown in FIG.

That is, in the conventional control device shown in FIG. The integrated output value at the end of the integration is sampled and held at a predetermined period by the sample and hold circuit 12. Therefore, the integration period and sampling period in this process are constant, and for example, in the operating waveform shown in FIG. 3, integration and sampling are performed every 2π radian period shown by the dashed line. Therefore, the output of the sample and hold circuit 12 has a value proportional to the voltage deviation value that is the output of the voltage comparator 5.

On the other hand, the control device 3 in the configuration shown in FIG.
Control output on/off command signals 18a to 18a in the configuration shown in the second diagram, which correspond to those supplied to THn.
The DA converter 21 which receives the 18n and outputs an analog conversion output outputs an analog output signal proportional to the number of connected capacitor banks indicated by these on/off command signals.

Next, the output of the sample hold circuit 12 corresponding to the required increase/decrease number of capacitor banks in proportion to the voltage deviation value and the output of the DA converter 21 in proportion to the number of connected capacitor banks are added in an adder 16. do. Therefore, as a result of the control calculation, the output of the adder 16 becomes a value proportional to the required number of connected capacitor banks required at that time. The output of the adder 16 is sent to the proportional amplifier 13.
are led to multi-stage level comparators 14-1 to 14-n, each having a different threshold level for comparison in sequence, and outputs level comparison outputs 17 to 1-n according to the required number of connected capacitor banks at that time. 17
~n becomes an on command or an off command. That is, when the required number of capacitor bank connections is 1, only the level comparison output 17-1 is turned on, and when the required number of connections is 2, the level comparison output 17-1 is turned on.
7-1 and 17-2 are turned on, and when the required number of connections is n, level comparison outputs 17-1 to 1
7-n becomes an on command.

On the other hand, capacitor C1 in the configuration shown in FIG.
~Thyristor switch TH1 that opens and closes Cn~
In THn, in order to avoid the transient phenomenon that occurs when current rushes into the capacitor when the switch is turned on, that is, the so-called inrush current, the phase relationship of the AC voltage applied to the capacitor when the switch is turned on is determined. In general, the capacitor is charged in advance to the peak value of the applied AC voltage, and the phase in which the terminal voltage of the charged capacitor and the voltage value of the applied AC voltage match, that is, the applied AC voltage is The thyristor switch is turned on at the phase where the voltage has a positive or negative peak value. This operation is performed by the interlock circuit 15 and level comparison outputs 17-1 to 17
-n serves as an ON command, and at the phase when the applied AC voltage reaches its peak value, ON command signals 18-1 to 18-n are outputted to the corresponding thyristor switches TH1 to THn, respectively.

Now, with (k-1) sets of capacitor banks connected to the power system and connected to the power line,
When the voltage difference value between the actual voltage value and the specified voltage value becomes large and it becomes necessary to add an additional capacitor bank, refer to the operation waveforms of each part shown in Figure 3 to perform the reactive power adjustment control method of the present invention. Explain the operation.

As the voltage deviation value increases, each output of the integrator 11, sample hold circuit 12, and proportional amplifier 13 increases. If the increased amount reaches the level at which one new set of capacitor banks should be added and input, at point A in the figure, the level comparison output up to the k-th threshold level level comparison output 17-k becomes an ON command, passes through the interlock circuit 15, and at point B in the figure, the corresponding actual ON/OFF commands 18-k to thyristor switches THi become ON commands, and k
The second thyristor bank THi is newly added to the power system. At the same time as the additional input, D-
The output of the A converter 21 is the (k-
1) Since the value corresponding to the group increases to the value equivalent to the k group, the output of the proportional amplifier 13 increases immediately, and (k
+1) Level comparison output 1 based on the threshold value level
The level comparison output up to 7-k+1 may become an ON command, and the actual ON/OFF command is output at point C in the diagram.
There are cases where up to OFF command 18-k+1 become ON commands.

In such a case, an overcontrol state may occur, and in the operation example shown in the third diagram, the steady state is immediately restored after the overcontrol state is entered, but the voltage deviation value Depending on the magnitude of the voltage and the phase of the applied AC voltage, overcontrol may occur repeatedly. Repetition of such an overcontrol state corresponds to so-called hunting due to repetition of overshoot and undershoot in normal continuous analog control.
Therefore, this type of conventional reactive power adjustment control method has the disadvantage that it takes time for transient changes to stabilize before reaching a steady state after adjustment.

Purpose An object of the present invention is to provide a stable capacitor switching type reactive power adjustment control method that eliminates the above-mentioned conventional drawbacks and quickly reaches a stable state without causing an overcontrol state. It is in.

Summary of the Invention In other words, the capacitor opening/closing reactive power adjustment control method of the present invention uses a sample value of the deviation between a desired value and an actual value of the power system voltage to control the input capacity of a phase advance capacitor for adjusting reactive power in the power system. The required capacitance of the capacitor bank is calculated based on the result of addition of a value proportional to the capacitance of the capacitor bank and a value proportional to the capacitance of the capacitor bank that has already been loaded, in synchronization with sampling of the voltage deviation value. It is.

EXAMPLES The present invention will be explained in detail below using examples with reference to the drawings.

First, an example of the configuration of a control device for adjusting reactive power according to the method of the present invention is shown in FIG. 4, and an example of the detailed configuration of the D-A converter 21 that operates in the illustrated configuration in substantially the same manner as in the conventional device shown in FIG. 2. Figure 5A,
The operation waveforms of each part are shown in FIG.

As is clear from comparing the configuration example shown in FIG. 4 with the conventional configuration shown in FIG. D- for
Except for the structure and operation of the A converter 21, this device is constructed exactly the same as the conventional device and operates in exactly the same manner. That is, in the conventional device shown in the second figure,
While the D-A converter 21 is supplied with only the actual on/off commands 18-1 to 18-n from the interlock circuit 15, in the reactive power adjustment control device according to the present invention shown in FIG. Unlike the conventional device, the external synchronization signal 19, which synchronously controls the integrator 11 and the sample-and-hold circuit 12 via the drive signal generator 20 and also directly synchronously controls the interlock circuit, is converted from D to A. Vessel 21
is supplied as its input digital signal.
Therefore, in the configuration according to the present invention shown in FIG. 4, the addition of the current state information of capacitor input to the voltage deviation value, which was conventionally done each time the actual on/off command information was received from the interlock circuit 15, is However, as detailed below, the integrator 11,
Like the sample hold circuit 12 and the interlock circuit 15, it is synchronously controlled by an external synchronization signal 19.

The D-A converter 21 is constructed as shown in FIG. Rn
The DC voltage of the power supply Ba is sequentially set to different voltage levels according to the number of phase advance capacitors input to the power system, and is supplied to the operational amplifier 27 having a feedback resistor _R0 , and the on-switches S1 to
Interlock circuit 1 in control device 3
Actual on/off commands from 5 18-1 to 18-
n respectively.

On/off commands 18-1 to 18-n for on/off switches S1 to Sn in the D-A converter 21
In addition, as mentioned above, D-
FIG. 5B shows a configuration example of a control circuit in which the timing at which the A conversion output is sent to the adder 16 is synchronously controlled by an external synchronization signal 19. External synchronization signal 19 that synchronously controls the sample and hold circuit 12
Due to such synchronous control of the D-A converter 21 by
The DA conversion output sent to 6 changes depending on the current status of the on/off command.

In the synchronous control circuit shown in FIG. 1
25-n, and the external synchronization signal 19, which has been waveformed to a high logic level "1" through the comparator 22 and the monostable multivibrator 23, which are compared with the threshold level, is also input to the AND gate 25-n. 1 to 25-n respectively, and their AND gates 25-1 to 25-n.
The respective outputs of flip-flops 26-1 to 26-n
Supplied to each set terminal. On the other hand, the on/off commands 18-1 to 18-n are transmitted to the inverters 24-1 to 18-n.
24-n respectively, inverts the logic level, and then outputs the AND gates 25-1' to 25-n.
-n', and also input the waveform-shaped external synchronization signal 19 from the monostable multivibrator 23 to those AND gates 25-1' to 25-.
n′ respectively, and their AND gate 25-
Each output of 1' to 25-n' is connected to a flip-flop 26.
-1 to 26-n, respectively, and flip-flops 26-1 to 26-2 having such a configuration.
Each on/off switch S1~ is activated by the output of 6-n.
It is designed to control Sn on/off.

Therefore, in the synchronous control circuit shown in FIG. 5B, as shown in FIG. 6, which shows an example of the operation waveform of each part, for example, during the period when the on/off command 18-1 is on, for example, the sine waveform When a synchronization pulse obtained by sequentially shaping the waveform of the external synchronization signal 19 by the comparator 22 and the monostable multivibrator 23 arrives, the output of the AND gate 25-1 becomes a high logic level "1" and the flip-flop 26
-1 output turns on and on/off switch S1
is closed, and the A-D conversion output to be connected to the power line 1 is supplied from the operational amplifier 27 to the adder 16, and the timing of supply of the AD conversion output is synchronized by an external synchronization signal. It will be controlled.

Control device 3 configured as described above according to the present invention
Examples of operation waveforms of each part are shown in FIG. 7 in the same manner as the operation waveforms of each part shown in FIG. 3 in the conventional configuration. 7th
As can be seen by comparing the figure with Figure 3, the voltage deviation value increases and the integrator 11 and sample hold circuit 1
2 and the proportional amplifier 13, and when the increase reaches a level at which a new set of capacitor banks should be added, the output 17 of the level comparator 14 is turned on at point A in the figure. Therefore, the actual on/off command 18 from the interlock circuit 15 becomes the on command, and one additional set of capacitor banks is added. However, according to the present invention, the on/off command 18 becomes the on state. As described above, the output of the D-A converter 21 does not change at the time when the signal has just passed, but changes in synchronization with the sample and hold circuit 12 when the external synchronization signal arrives next. It turns out. Therefore, in the conventional operating waveform shown in FIG. 3, the extra signal level change that occurs at time points A and C, which are intermediate to the arrival time of the external synchronization signal, does not occur, and the addition of an extra capacitor bank does not occur. This eliminates the risk of overcontrol, and prevents the occurrence of an overcontrol condition as in the conventional case.

Next, FIG. 8 shows another configuration example of the control device 3 which can prevent the occurrence of the overcontrol state as described above according to the present invention. In the illustrated configuration example, the output of the integrator 11 and the output of the D-A converter 21 are added by an adder 16 before the sample and hold circuit 12, and the result of the addition is sampled by the sample and hold circuit 12. The order of signal processing is changed from that in the configuration example shown in FIG. 4 so as to hold the signal. Therefore, the output of the proportional amplifier 13 does not change during the hold period by the sample and hold circuit 12,
This change in the output of the proportional amplifier 13 is performed simultaneously with the sample-and-hold period, and the same effect can be obtained with the configuration shown in FIG.

Effects As is clear from the above explanation, according to the present invention, the opening/closing of the phase advance capacitor for reactive power adjustment in the power system is performed at the same time as the sampling of the voltage deviation detection results, thereby eliminating unnecessary adjustments. A special effect is obtained in that an over-control state is prevented and reactive power adjustment is performed stably and reliably.

[Brief explanation of drawings]

Figure 1 is a block diagram showing an example of a schematic configuration of a capacitor switching type reactive power regulator, Figure 2 is a block diagram showing a conventional configuration of a control device in the reactive power regulator, and Figure 3 is the same. FIG. 4 is a waveform diagram showing the operating waveforms of each part in the conventional configuration, FIG. 4 is a block diagram showing an example of the configuration of the control device according to the method of the present invention in the reactive power adjustment device, and FIGS. 5A and B are the same in the control device. A block diagram sequentially showing an example of the configuration of a D-A converter, FIG. 6 is a waveform diagram showing operation waveforms of each part of the D-A converter, and FIG. 7 is a waveform diagram showing each part of the control device according to the method of the present invention. Waveform diagram showing operating waveforms,
FIG. 8 is a block diagram showing another example of the configuration of the control device. 1... Power line, 2... Voltage detector, 3... Control device, 4... Voltage specified value, 5... Voltage comparator, 6
...Actual voltage value, 10...Proportional amplifier, 11...
Integrator, 12...Sample hold circuit, 13...
...Proportional amplifier, 14-1 to 14-n...Level comparator, 15...Interlock circuit, 16...Adder, 17-1 to 17-n...Level comparison output,
18-1 to 18-n...On/off command, 19...
...External synchronization signal, 20... Drive signal generator, 21
...D-A converter, 22 ...Comparator, 23
...Monostable multivibrator, 24-1 to 24
-n...Inverter, 25-1 to 25-n...
AND gate, 26-1 to 26-n... flip-flop, 27... operational amplifier, C1 to Cn...
Capacitor, TH1~THn...Thyristor switch, S1~Sn...On/off switch, R1~
Rn...Resistance.

Claims (1)

[Claims] 1. When controlling the input capacity of a phase advance capacitor for adjusting reactive power in a power system, a value proportional to the sample value of the deviation between the desired value and the actual value of the power system voltage, and a value proportional to the capacity of the already loaded capacitor bank are determined. 1. A capacitor opening/closing reactive power adjustment control method characterized in that calculation of a required input capacity of a capacitor bank based on the addition result of is performed in synchronization with sampling of a voltage deviation value.