JPH0445274Y2 - - Google Patents

Description

[Detailed description of the invention] A. Industrial application field The present invention relates to wiring boards, and is particularly suitable for application when chip components are soldered onto wiring patterns formed on an insulating board by reflow soldering. It is something.

B. Summary of the invention The present invention is based on a wiring board to which chip parts are soldered by reflow processing, in which two layers of solder resist are formed to surround through holes drilled between lands to which chip parts are to be connected. By forming the wiring patterns in a stacked manner, it is possible to form wiring patterns with even higher density.

C. Prior Art Conventionally, in this type of wiring board, as chip components become smaller, the size of the printed board becomes smaller.

In response to this, the wiring density of wiring patterns formed on insulating substrates is becoming higher and higher, and efforts are being made to minimize wasted space on insulating substrates.

However, in practice, when performing reflow processing, if there is another land that comes close to the land to which cream solder is attached, there is a greater risk that the melted solder will bridge between the lands, and in such cases space may not be used effectively.

For example, in the case of a circuit board in which chip components are soldered to both sides of an insulating board, a method is generally adopted in which the wiring pattern on the front side is connected to the wiring pattern on the back side via a through hole. It is necessary to provide the electrodes of the chip components at a position where there is no risk of bridging when soldering the electrodes of the chip components to the lands formed on the insulating substrate by reflow. For this reason, it is considered that in practice it is not possible to provide through holes near lands for connecting chip components, and as wiring boards become smaller, there is a limit to the fact that through holes cannot be placed close to lands. It was hot.

In particular, the space between a pair of lands for soldering electrodes provided at both ends of a chip component becomes narrower as chip components become smaller, so conventionally a through hole was provided between the pair of lands. If so, there is a high risk that bridging will occur between the land of the through hole and another land for electrode connection during reflow, so the design was made to avoid providing the through hole in such a position. .

D. Problems that the invention aims to solve However, if this method is used, the space directly under the chip component cannot be used to provide a through hole as a means of connecting between the front and back surfaces, and the space on the insulating board is used up accordingly. There is a problem of waste.

For example, in FIGS. 3 and 4, the insulating substrate 1
A pair of chip component connecting lands 3 and 4 are provided on the surface 1A of the chip component 2 for soldering the electrodes 2A and 2B provided at both ends of the chip component 2, and one chip component connecting land 3 is connected to the wiring pattern. 7. Considering the case of connecting to the wiring pattern 5 formed on the back surface 1B via the through-hole land 8, the through-hole 6, the plating part 9 inside, and the through-hole land 10 formed on the back surface side. By forming the through-hole land 8 in the narrow space between the pair of chip component connection lands 3 and 4 formed on the surface 1A, there is a gap between the chip component connection land 4 and the through-hole land 8. As the distance between them becomes closer, there is a greater possibility that the solder melted between the lands 4 and 8 will bridge during the reflow process.

In particular, as shown in FIG. 4, in the case of a chip component 2, such as a tantalum electrolytic capacitor, in which the electrodes 2A and 2B extend long inward on the lower surface so as to approach each other, the through-hole Since the electrode 2B that is not connected to the land 8 for the hole extends inward for a long time so as to approach the land 8 for the through hole, the chip component 2 can be slightly connected to the lands 3 and 4 for connecting the chip component. If it is mounted inwardly,
Since the distance between the electrode 2B and the through-hole land 8 becomes closer and closer, there is a greater possibility that the solder melted during the reflow process will bridge.

This idea was created taking the above points into consideration.
Even when a through hole is provided in a narrow space between lands for connecting chip components, the wiring can effectively avoid the possibility of bridging between the land for connecting chip components and the land of the through hole. This is an attempt to propose a board.

E. Means for Solving the Problem In order to solve this problem, the present invention provides a plurality of connecting lands 3, 4 for connecting predetermined chip components 2 to the first surface 1A of the insulating substrate 1.
A connection pattern 7 connected to one of the plurality of connection lands 3, 4 is provided in the space between the plurality of connection lands 3, 4 directly below the chip component 2, and a corresponding A through hole 6 is provided which is connected to the connection pattern 7 and is electrically connected to the land 10 provided on the second surface 1B through the thickness of the insulating substrate 1. A first solder resist layer 11 is formed on the surface 1A excluding at least the plurality of connection lands 3, 4 corresponding to the predetermined chip component 2 and the through holes 6, and the plurality of connection lands 3, 4 A second solder resist layer 12 is formed in the space directly below the chip component 2 so as to surround the through hole 6 and overlap the first solder resist layer 11. Solder 13A, 13B melted during the reflow process for connecting the predetermined chip component 2 to the lands 3, 4 is connected to the connection pattern 7. Lands 4 and through-holes 6 other than the connection land 3
The overlapping portions of the first and second solder resist layers 11 and 12 prevent bridging between the solder resist layers 11 and 12.

F Function Lands 3 and 4 for connecting chip parts during reflow processing
The solders 13A and 13B deposited thereon melt and solder the electrodes 2A and 2B of the chip component 2 to the corresponding lands 3 and 4 for connecting the chip component.

At that time, the melted solder becomes so-called "wet" because the thickness of the first and second solder resist layers 11 and 12 is thicker in the space between the chip component connecting lands 3 and 4. Even if it flows to the tips of the electrodes 2A and 2B due to the phenomenon, the amount will be smaller than the solder resist layer 11.
The thickness of the holes 12 and 12 is reduced by the increased thickness, and can be suppressed to such an extent that it does not reach the land 8 for the through hole.

In this way, it is possible to effectively prevent solder bridging between the chip component connecting lands 3 and 4 and the through-hole land 8 formed therebetween.

G. Embodiment An embodiment of the present invention will be described below in detail with reference to the drawings.

1 and 2, in which parts corresponding to those in FIGS. 3 and 4 are denoted by the same reference numerals, an insulating substrate 1
On the surface 1A, there are lands 3 and 4 for connecting chip components to which cream solder should be applied, and through holes 6.
The first solder resist layer 11 is formed on other parts except for the vicinity of the first solder resist layer 11 by silk printing, for example.

As a result, when the cream solder melts on the chip component connecting lands 3 and 4 formed on the surface 1A of the insulating substrate 1, the melted solder
Only the portions where the first solder resist layer 11 is not formed can be soldered with high precision.

In addition, a second solder is applied around the through-hole melting land 8 between the chip component connecting lands 3 and 4 of the first solder resist layer 11 so as to overlap the first solder resist layer 11. A resist layer 12 is formed.

In this embodiment, the second solder resist layer 12 has a greater ability to repel solder than the first solder resist layer 11, and has a different hue from the first solder resist layer 11. It is made up of materials.

In this state, cream solder 13A and 13B are attached by printing on the chip component connecting lands 3 and 4, and thus the wiring board mounts the chip component 2 with the electrodes 2A and 2B in contact with the cream solder 13A and 13B. become possible.

When reflow processing is performed with the chip part 2 mounted on the cream solders 13A and 13B, the cream solders 13A and 1
The electrodes 2A and 2B are soldered to the chip component connecting lands 3 and 4 which are in contact with the melted electrodes 3B.

According to the above configuration, the cream solders 13A and 13B are melted during reflow, and the electrodes 2A and 2B are
When welding, the melted solder melts inward along the surfaces of the electrodes 2A and 2B (that is, in the direction toward the through-hole land 8) due to a so-called "wetting" phenomenon.

However, a second solder resist layer 12 is formed around the through-hole land 8 between the chip component connecting lands 3 and 4 so as to be laminated on the first solder resist layer 11, so that it is not melted. It is possible to effectively prevent the solder from being blocked by the thickness and unnecessarily separating from the electrodes 2A and 2B and penetrating further inside.

Therefore, in the case of the above-mentioned embodiment, the second
Since a material having a greater ability to repel melted solder than the first solder resist layer 11 is used as the solder resist layer 12, all the solder resist layers can be made of the material of the first solder resist layer 11. Compared to the case where this configuration is configured, it is possible to more effectively prevent the melted solder from entering the inside.

Further, in the case of this embodiment, the second solder resist layer 12 has a color (for example, brown) that is visually clearly different from the color (for example, green) of the first solder resist layer 11.
Since the space between the chip component connecting lands 3 and 4 is colored in a color (the color of the second solder resist layer 11) that is significantly different from the surrounding color (the color of the first solder resist layer 11),
(the color of the solder resist layer 12). Therefore, when the chip component 2 is mounted on the chip component connection lands 3 and 4 by an automatic mounter without falling off, the color (i.e., brown) of the second solder resist layer 12 cannot be seen. This allows you to check at a glance whether the file is correctly mounted.

On the other hand, lands 3 and 4 for connecting chip parts
If a brown area can be seen in between, it can be immediately determined that the chip component 2 is missing.

In the above-mentioned embodiment, the case was described in which the solder resist layers 11 and 12 were formed only on the front surface 1A of the insulating substrate 1, but even if the solder resist layers 11 and 12 were formed on the back surface 1B as well, the above-mentioned case would not occur. You can get the same effect as .

Further, in the above-described embodiment, the second solder resist layer 12 is formed in the space between the pair of chip component connecting lands 3 and 4, but the second solder resist layer 12 is not limited to this. It may also be formed in a space between a plurality of chip component connecting lands.

H. Effects of the invention As described above, according to the invention, even if a through hole is provided between the chip component connection lands to which the electrodes of the chip component are to be soldered, to connect the front and back surfaces of the insulating substrate, the solder cannot be used. By being able to effectively prevent bridging, it is possible to easily realize a wiring board on which a wiring pattern with higher density than in the conventional case can be formed.

[Brief explanation of the drawing]

Fig. 1 is a plan view showing the main parts of an embodiment of the wiring board according to the present invention, Fig. 2 is an enlarged sectional view taken along the - line, and Fig. 3 shows the main parts of a conventional wiring board. The plan view and FIG. 4 are cross-sectional views taken along the -line. 1... Insulating board, 2... Chip parts, 3, 4...
...Land for chip component connection, 6...Through hole, 8,10...Land for through hole, 9...
Plated parts, 11, 12...first and second solder resist layers, 13A, 13B...cream solder.

Claims (1)

[Claims for Utility Model Registration] A plurality of connection lands for connecting predetermined chip components are provided on the first surface of an insulating substrate, and a space between the plurality of connection lands and directly below the chip component. A connection pattern connected to one of the plurality of connection lands, and a land connected to the connection pattern and provided on the second surface passing through the thickness of the insulating substrate are provided with electricity. a first solder resist layer on at least a portion of the first surface of the insulating substrate excluding the plurality of connection lands and the through holes corresponding to the predetermined chip components; At the same time, a second solder is formed in the space between the plurality of connection lands and directly under the chip component so as to surround the through hole and overlap the first solder resist layer. A resist layer is formed, and the solder melted during the reflow process to connect the predetermined chip components to the plurality of connection lands is between the connection lands other than the connection lands connected to the connection pattern and the through holes. 1. A wiring board, characterized in that bridging is prevented by an overlapping portion of the first and second solder resist layers.