JPH0446486B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to a semiconductor device in which a bipolar power transistor and a field effect power transistor are configured in parallel and perform a switching operation.

[Prior art and its problems]

In the following description of each figure, the same reference numerals indicate the same or corresponding parts.

Conventionally, it is known to use a bipolar type power transistor (hereinafter referred to as a bipolar transistor) or a field effect type power transistor (hereinafter referred to as an FET) as this type of device that performs a switching operation. However, although bipolar transistors have a low ON voltage, their turn-on time (hereinafter referred to as ton) and fall time (hereinafter referred to as TF) are slow, and the reverse voltage applied to the transistor at turn-off is within the so-called safe operating area. There are also issues such as the need for
It was difficult to use. On the other hand, although FETs do not have the above-mentioned switching problems, they are also difficult to use because of their high ON voltages.

Therefore, in order to solve the above problem, conventionally, as shown in Fig. 5, a bipolar transistor Q1 and
FETQ2 in parallel, i.e. the emitter E of the former Q1
It is known that the sources S of the former Q1 and the latter Q2 are connected to form a common emitter E, and the collector C1 of the former Q1 and the drain D of the latter Q2 are connected to form a common collector C, which is used in a switching circuit.

This semiconductor device consists of the transistor Q1 in FIG.
Driving signals (base current IB, gate voltage
By inserting transistor Q2
Q1 is turned on earlier and turned off later than Q1.

That is, FIGS. 1 to 4 show the waveforms of the base current IB of the bipolar transistor Q1, the gate voltage VG of the FETQ2, the collector current IC of the bipolar transistor Q1, and the drain current ID of the FETQ2, respectively. As shown in Figure 2, FETQ2 at time t0
When a gate voltage VG higher than the threshold voltage is applied to the gate G of FETQ2, FETQ2 is immediately turned on, and the load current I of the switching circuit begins to flow as drain current ID as shown in FIG.

Next, at time t1 after period T1, a base current IB is applied to the base B of bipolar transistor Q1 as shown in FIG.
The emitter-collector voltage of FETQ1 gradually decreases to the ON voltage, and along with this, the load current I gradually increases to the bipolar transistor whose ON voltage is lower than that of FETQ2, as shown in the collector current IC and drain current ID in Figures 3 and 4. Shifts to the Q1 side, and soon most of the load current I begins to flow through the bipolar transistor Q1 as the collector current IC.

Next, as shown in Figure 1, the base current IB changes during period T2.
When the bipolar transistor Q1 is turned off at time t2, the bipolar transistor Q1 gradually shifts to the OFF state again, and as shown in Figures 3 and 4, the load current I flows from the bipolar transistor Q1 side to the FET Q2 side as a drain current ID. Transition.

Next, when the gate voltage VG is cut off at time t3 after a period T3 has passed from time t2, FETQ2 immediately turns off as shown in the drain current ID in FIG. 4, the load current I is cut off, and switching operation 1 The cycle (1 open/close) is completed.

In this way, in the semiconductor device shown in FIG.
Since FETQ2 is turned on, the turn-on loss is
This occurs only in FETQ2, but since the turn-on time ton of FETQ2 is short, the turn-off loss is much smaller than when the bipolar transistor Q1 is turned on.

On the other hand, during the T2 period, the bipolar transistor Q
1 is also turned on, but both transistors Q1,
The ON voltage characteristics of Q2 (i.e., Figure 7 shows the magnitude of the collector current IC or drain current ID of bipolar transistor Q1 or FETQ2, respectively, and the ON voltage characteristics
Voltage or saturated collector-emitter voltage VCE
(sat) or drain-source ON voltage VDSON. ), since the ON voltage of bipolar transistor Q1 is lower, current flows to this transistor Q1 side. Also, at turn-off, tof is turned off later because FETQ2 is turned off.
Turnoff loss occurs in FETQ2, but it is small.

This makes ton and tof small and ON.
The effect was that the voltage was low, but
This device has the following drawbacks:

Since there are four terminals, if two transistors Q1 and Q2 are to be constructed in the same package, one extra terminal must be created compared to the conventional device, resulting in an increase in size.

The input signals (base current IB and gate voltage VG) of transistors Q1 and Q2 have different waveforms, which complicates the circuit for creating the input signal voltage (also called drive signal voltage).

[Purpose of the invention]

Except for the above-mentioned drawbacks, this invention uses a three-terminal device like the conventional switching semiconductor device, and can operate with a simple square wave pulse input signal voltage of ton,
The purpose of the present invention is to provide a switching semiconductor device with a short tof and a low ON voltage.

[Key points of the invention]

The main point of the present invention is to connect the emitter and collector of the bipolar transistor to the source and drain of the field effect transistor, respectively, to form a parallel connection between the bipolar transistor and the field effect transistor, and connect the commonly connected emitter and source to the common emitter, as well. In a semiconductor device in which a collector and a drain are used as a common collector and a load current is switched between the common emitter and the common collector, one end of the conduction blocking means is connected to the base of a bipolar transistor, and the other end of the conduction blocking means is connected to the field effect The gates of the transistors are connected, and a connection point between the other end and the gate is used as a common drive terminal, and the current conduction blocking means is arranged such that the applied voltage applied from the common drive terminal is a threshold voltage (threshold voltage) of the gate of the field effect transistor. between the common drive terminal and the common emitter;
A trapezoidal drive signal voltage having a peak value at least equal to or higher than the predetermined voltage, and which causes a time lag between reaching the voltage corresponding to the threshold voltage and the voltage corresponding to the predetermined voltage at the rise and fall of the voltage. and the bipolar transistor and the field effect transistor are opened and closed at different times, or the element of the current blocking means is composed of a Zener diode or a series circuit of the Zener diode and a resistor. or further characterized in that the drive signal voltage is formed (from a square wave signal voltage) via a capacitor (and other means as required) connected between the common drive terminal and the common emitter. , which allows bipolar transistors to turn on later than field-effect transistors using a common square-wave drive signal voltage.
The main point is that it can be turned off quickly.

[Embodiments of the invention]

Embodiments of the present invention will be described below based on FIGS. 1 to 4. Figures 1 and 2 are circuit diagrams showing the configurations of different embodiments of the present invention, Figure 3 is a circuit diagram showing the principle configuration of the present invention, and Figure 4 is the waveform of the input signal voltage in Figure 3. It is a figure which shows an example.

First, FIGS. 3 and 4 will be explained. In Figure 3, ZD is a Zener diode, R1 is a resistor, and the input voltage Vi in Figure 4 is the terminal A in Figure 3.
and the common emitter E, that is, directly to the gate G of FET Q2, and to the base B of bipolar transistor Q1 via a series circuit of resistor R1 and Zener diode ZD.

In addition, in Fig. 4, VP is the highest value of the input signal voltage Vi, VZ is the Zener voltage of the Zener diode ZD,
V0 indicates the threshold voltage of the gate G of FETQ2.

Now, when inputting a trapezoidal input signal voltage Vi as shown in FIG. 4 to the terminal A in FIG. 3, FETQ2 turns ON at a point P1 where Vi≧V0 begins. Furthermore, after the point P2 where Vi≧VZ starts to meet, the base current IB flows to the bipolar transistor Q1 and the transistor Q1
turns on. Resistor R1 is the base current IB at this time
The resistor R1 is set so that a predetermined base current IB flows when the input signal voltage Vi is at the maximum value VP, that is, R1=(VP-VZ)/IB. Moreover, after point P3 where Vi<Vz, bipolar transistor Q1 is first turned off, and then
After point P4 where Vi<V0, FETQ2 turns off, so transistor Q2 always turns on earlier than Q1.
However, since it turns off later, the desired effect can be obtained.

Next, the embodiments shown in FIGS. 1 and 2 will be explained. In both figures, K1 is a capacitor R that smooths the rise and fall changes of the input signal voltage Vi.
2 is the discharge resistance of the capacitor K1. Capacitor 1 is connected between the common emitter E of transistors Q1 and Q2 and terminal A in FIG.
In FIG. 2, the connection point of the capacitor K1 to the terminal A side is replaced by the connection point A1 between the resistor R1 and the Zener diode ZD.

By adding capacitor K1, the input signal voltage Vi
Even if the voltage rises and falls in a square waveform, the voltage across the capacitor K1 changes in a trapezoidal waveform as shown in FIG. In other words, in the case of Fig. 1, when the input signal voltage Vi rises, the capacitor K1 is charged by the current limited by the internal resistance of the input signal source (not shown) and rises slowly; It is discharged slowly via the internal resistance and the resistance R2. Further, FIG. 2 shows an example of the circuit configuration when the internal resistance is small, and the resistor R1 can also be used in place of the internal resistance. In this way, by applying the input signal voltage Vi having a simple waveform of a square wave to the terminal A, the transistors Q1 and Q similar to those described in FIG.
2 switching operations can be performed.

Note that the combination of transistors Q1 and Q2 in the present invention is not limited to the combination of an NPN transistor and an N-channel FET as in the above-mentioned embodiments.
A combination of a PNP transistor and a P channel FET is also effective. However, in the latter case, Figures 1 and 2
The direction of the Zener diode ZD in the figure needs to be reversed. Further, the bipolar transistor Q1 may be a Darlington-connected transistor.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, in a semiconductor device in which the emitter and source and the collector and drain of a bipolar transistor and an FET are respectively connected, a series circuit of a Zener diode and a resistor is connected to the base terminal of the bipolar transistor. One end of the capacitor is connected so that the Zener diode is on the base terminal side, one end of the capacitor is connected to a common emitter, and the other end of the capacitor is connected to the other end of the series circuit or the connection point between the resistor and the Zener diode. By connecting the gate of the FET to the other end and using it as a common base terminal, it is a three-terminal element that can be controlled by a simple square wave input signal voltage, and it is possible to construct a semiconductor device with fast ton and tof and low ON voltage. You can get the desired effect.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing the configuration of one embodiment of the present invention, FIG. 2 is a circuit diagram showing the configuration of another embodiment, FIG. 3 is a circuit diagram explaining the principle of the invention, and FIG. 4 is a diagram showing an example of the waveform of the input signal voltage in FIG. 3, FIG. 5 is a circuit diagram showing the configuration of a conventional device, FIG. 6 is a waveform diagram of each part explaining the operation of FIG.
The figure is a diagram showing a comparison of the ON voltage characteristics of a bipolar transistor and a FET. Q1... Bipolar transistor, Q2... Field effect transistor (FET), ZD... Zener diode, K1... Capacitor, R1, R2... Resistor, Vi
...Input signal voltage.

Claims (1)

[Claims] 1. The emitter and collector of a bipolar transistor are connected to the source and drain of a field effect transistor, respectively, so that the bipolar transistor and the field effect transistor are connected in parallel, and the commonly connected emitter and source are connected to the common emitter. Similarly, in a semiconductor device in which a collector and a drain are used as a common collector and a load current is switched between the common emitter and the common collector, one end of the conduction blocking means is connected to the base of a bipolar transistor, and the other end of the conduction blocking means is connected to the base of the bipolar transistor. The gates of the field effect transistors are connected, and the connection point between the other end and the gate is used as a common drive terminal, and the current conduction blocking means is arranged so that the applied voltage applied from the common drive terminal is the threshold voltage of the gate of the field effect transistor. between the common drive terminal and the common emitter, the element has a peak value of at least the predetermined voltage or more, and corresponds to the threshold voltage at the rise and fall of the element. applying a trapezoidal drive signal voltage that causes a time lag in reaching a voltage corresponding to the voltage corresponding to the predetermined voltage;
A semiconductor device for switching, characterized in that the bipolar transistor and the field effect transistor open and close at different times. 2. A switching semiconductor device according to claim 1, wherein the element of the current blocking means comprises a Zener diode or a series circuit of the Zener diode and a resistor. 3. The device according to claim 1 or 2, wherein the drive signal voltage is formed via a capacitor connected between the common drive terminal and the common emitter. Semiconductor device for switching.