JPH0446770U

JPH0446770U -

Info

Publication number: JPH0446770U
Application number: JP8936690U
Authority: JP
Priority date: 1990-08-27
Filing date: 1990-08-27
Publication date: 1992-04-21

Description

[Brief explanation of the drawing]

第１図は本考案の第１の実施例を示す画像２値
化装置の構成ブロツク図、第２図は従来の画像２
値化装置の構成ブロツク図、第３図は第２図の論
理回路のフローチヤート、第４図ａ，ｂは従来技
術の問題点を説明する図、第５図は第１図の論理
回路のフローチヤート、第６図ａ，ｂは第１図の
効果を説明する図、第７図は本考案の第２の実施
例を示す画像２値化装置の構成ブロツク図である
。１１……前画素記憶回路、１２……前々画素記
憶回路、１３……真上画素記憶回路、１４−１〜
１４−３……決定回路、１５……疑似中間調２値
化回路、１５ａ……平滑化回路、１５ｂ……比較
器、１６，２６……論理回路、２６−１６……ス
イツチ、Ｍ……モード切換信号。 FIG. 1 is a block diagram of the configuration of an image binarization device showing a first embodiment of the present invention, and FIG. 2 is a conventional image binarization device.
3 is a flowchart of the logic circuit of FIG. 2, FIGS. 4a and 4b are diagrams explaining the problems of the prior art, and FIG. Flowchart, FIGS. 6a and 6b are diagrams explaining the effect of FIG. 1, and FIG. 7 is a block diagram of the configuration of an image binarization apparatus showing a second embodiment of the present invention. 11...Previous pixel storage circuit, 12...Pixel storage circuit before previous, 13...Pixel storage circuit directly above, 14-1~
14-3...Decision circuit, 15...Pseudo halftone binarization circuit, 15a...Smoothing circuit, 15b...Comparator, 16, 26...Logic circuit, 26-16...Switch, M... Mode switching signal.

Claims

[Claims for Utility Model Registration] 1. According to the difference value between the density of a pixel of interest in an image including pixels of halftone density and the density of its surrounding pixels, the pixel of interest is made to correspond to the surrounding pixels to produce white or black. and a determination circuit that classifies and determines the pixel of interest, a pseudo halftone binarization circuit that smoothes the density of the pixel of interest and the density of its surrounding pixels, and then dithers it, and the decision circuit and the pseudo halftone binarization circuit. and a logic circuit that calculates the logic of each output of the target pixel and outputs a binary output of the pixel of interest, wherein the logic circuit outputs white when the output of the determination circuit is white. and when there is no white and black in the output of the decision circuit, black is output, and when all the outputs of the decision circuit are unknown, the output of the pseudo halftone binarization circuit is output. An image binarization device characterized by: 2. The image binarization device according to claim 1, wherein the logic circuit outputs white or black according to a mode switching signal when there is white or black in the output of the decision circuit, and When there is no white or black and there is black or white, black or white is output according to the mode switching signal, and when all the outputs of the decision circuit are unknown, the pseudo halftone 2 is output.
An image binarization device characterized in that it is configured to output the output of a digitization circuit.