JPH0447320B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to an automatic performance device for an electronic musical instrument. (Description of Prior Art) A conventional automatic performance device for an electronic musical instrument is, for example, as disclosed in U.S. Pat. No. 3,890,871.
It is configured so that musical tones played by a performer on a keyboard are encoded and stored as they are, and then reproduced for automatic performance. Therefore, conventional automatic performance devices for electronic musical instruments merely have a function similar to that of a tape recorder, and lack a function that allows the player to freely compose or arrange music. For example, even if a performer wants to arrange part of the song, with conventional automatic performance devices for electronic musical instruments, the performer has to play the electronic instrument again from the beginning of the song and arrange that part. It was empty. Furthermore, a person who cannot play an electronic musical instrument cannot enjoy the automatic performance of an electronic musical instrument at all because he or she cannot store musical tones in the automatic performance device. (Objective and General Description of the Invention) The present invention has been made in view of the drawbacks of the conventional automatic performance devices for electronic musical instruments. An object of the present invention is to provide an automatic performance device for an electronic musical instrument that has a function of freely changing musical tones during the process. The first automatic performance device according to the present invention includes input means [11 in FIG. 1] for inputting at least pitch information, time information, and musical tone control information for automatic performance, and a large number of addresses. , a memory device [9 in FIG. 1] that can read and write for each address, and an address updating means [9 in FIG. 4 in Figure 1]; addressing means [7 in Figure 1] for specifying the address of the storage device in response to the operation of the address updating means; and an address designated by the addressing means in the storage device; a writing means [6, 8 in FIG. 1] for writing pitch information, time information, and musical tone control information based on the operation of the input means; and a writing means [6, 8 in FIG. A readout means [5, 6, 7, 8 in FIG. 1] that reads out the readout sequentially according to time information; and when writing by the writing means, pitch information and pitch information related to the writing. A musical tone signal is generated based on musical tone control information, and when reading by the reading means, a musical tone signal is generated based on pitch information and musical tone control information related to reading, and both writing and reading. In this case, at least one of the tone and volume of the musical tone signal is determined according to the musical tone control information.
1, and musical tone generating means [10 in FIG. 1] for controlling the two. According to such a configuration, when writing, a musical tone signal is generated based on the pitch information and musical tone control information related to writing, and the timbre or volume of this musical tone signal is controlled according to the musical tone control information. So,
By listening to the musical tone signal, the input operator can immediately determine whether or not the pitch information and musical tone control information related to writing are appropriate. Also, when the reading means reads out the stored information and automatically reproduces the stored music, it is possible to judge whether the pitch information and the musical tone control information are appropriate by listening to the musical tone signal. In any case, when correcting inappropriate stored information, address specification can be performed in two directions, so correction operations can be performed efficiently while taking into consideration the context and the like. The second automatic performance device according to the present invention includes input means [11 in FIG. 1] for inputting at least pitch information, time information, and musical tone control information for automatic performance, and a large number of addresses. , a memory device [9 in FIG. 1] that can read and write for each address, and an address updating means [9 in FIG. 4 in Figure 1]; addressing means [7 in Figure 1] for specifying the address of the storage device in response to the operation of the address updating means; and an address designated by the addressing means in the storage device; a writing means [6, 8 in FIG. 1] for writing pitch information, time information, and musical tone control information based on the operation of the input means; and a writing means [6, 8 in FIG. A readout means [5, 6, 5 in FIG. 1,
7, 8, 6 in FIG. The musical tone generating means (10 in FIG. 1, 32 to 37 in FIG. 4) controls at least one of the timbre and volume of the musical tone signal accordingly. According to this configuration, since it is possible to select whether to read out sequentially according to the time information or read out one by one according to the operation of the address updating means, it is possible to automatically play back the stored songs. , you can search for inappropriate parts by manually replaying them in response to address update operations. In any case, when modifying the stored information at an inappropriate location, addressing can be performed in two directions, so that the modification operation can be performed efficiently while taking into consideration the context and the like. (Description of Structure and Operation of the Present Invention) The present invention will be described in detail below with reference to the accompanying drawings. FIG. 1 shows an embodiment of this invention,
The fixed contact of start switch 1 is grounded, and the movable contact is connected to the positive voltage source +V via a resistor on one side.
on the other hand, and the input side of the delay circuit 2 and the reset terminal R of the address generator 7 on the other hand. The address generator 7 is composed of a counting circuit such as a combination of a counter and a decoder or a shift register. or a subtraction operation.
For example, when a logical value "1" is input to the up/down designation input terminal U/D, an addition operation is performed, and when a logical value "0" is input, a subtraction operation is performed. There is. The output side of the delay circuit 2 is connected to the first input terminal of the OR circuit 3. The manually operated address generator control device 4 includes an up/down designation switch S1 for outputting a logical value "1" or "0" to the up/down designation input terminal U/D of the address generator 7, and the address generator 7. Manually operated step switch S for manually stepping the
2. Here, the output of the up/down designation switch S1 is configured to be output from the output terminal A1, and the output terminal A1 is connected to the up/down designation input terminal U/D of the address generator 7. The output of the manually operated step switch S2 is configured to be output from an output terminal A2, and the output terminal A2 is connected to a fixed contact M of the manual/automatic changeover switch 6. Here, the manually operated step switch S2 is configured so that one pulse is output when it is turned on once. The movable contact of the manual/automatic changeover switch 6 is connected to the second input terminal of the OR circuit 3, and the output side of the OR circuit 3 is connected to the counting input terminal C of the address generator 7. The address signal output side of the address generator 7 is a random access memory 9
The write/read designation input terminal W/R of the random access memory 9 is connected to the movable contact of the write/read designation switch 8. A logic value "1" is input to the fixed contact W (write side) of the write/read designation switch 8, and a logic value "0" is input to the fixed contact R (read side). Here, the random access memory 9 is
It is configured such that when a logical value "1" is input to the read designation input terminal W/R, it enters a writable state, and when a logical value "0" is input, it becomes a readable state. The output side of the input device 11 is connected to the write input side of the random access memory 9, and this input device 11 inputs musical tone information to be stored in each address of the random access memory 9 according to the player's intention (player's switching action). It has a function to output according to the following. The musical tone information to be output includes all the information required to determine one generated musical tone. In this embodiment, musical tone information is formed by the following information group and the generated musical tone is determined. There is.

[Table] 〓 Information.
Therefore, the input device 11 is provided with a large number of switches that output these various types of information, and the performer operates these switches according to his/her will to store musical tone information of generated musical tones in the random access memory 9. performs the operation of writing. The readout output of the random access memory 9 is connected on the one hand to a tone generator 10 and on the other hand to the input of the time-detecting automatic address generator control device 5. Here, of the musical tone information, only the time information is inputted from the read output side of the random access memory 9 to the time detection automatic address generator control device 5, and that inputted to the musical tone forming device 10 is the musical tone information. After removing time information, the remaining information is scale information (octave information + note name information), rest information, and envelope control information. Time detection automatic address generator control device 5
receives the time information from the random access memory 9, accurately counts the specified time (musical tone generation time, musical tone generation pause time), and outputs the time signal TS (logical value) from the output terminal B2 only within that time. “1”)
The circuit is configured to output one pulse from the output terminal B1 at the same time as the designated time is counted. Here, the output terminal B1 is connected to the fixed contact A of the manual/automatic changeover switch 6, and the output terminal B2 is connected to the time signal input terminal T of the musical tone forming device 10.
It is connected to the. The musical tone forming device 10 receives the musical tone information, rest information, envelope control information read out from the random access memory 9, and the time signal TS outputted from the output terminal B2 of the time detection automatic address generator control device 5. It has a function of generating musical tones determined by each piece of information and a time signal. The operation of the embodiment of the present invention having the above configuration will be described next. For convenience of explanation, the explanation will be divided into a ``musical tone information writing operation'' for writing musical tone information into the random access memory 9 and a ``musical tone information reading operation'' for reading musical tone information from the random access memory 9 and generating musical tones. Musical tone information writing operation The performer writes musical tone information to the random access memory 9.
When writing, the write/read designation switch 8 is set to the fixed contact W side. As a result, the logical value "1" is inputted to the write/read designation input terminal W/R of the random access memory 9 via the switch 8, so that the random access memory 9 becomes in a writable state. Subsequently, the manual/automatic changeover switch 6 is set to the fixed contact M, and the start switch 1 is also set to the closed position. As a result, the address generator 7 can be operated by the manually operated address generator control device 4. In addition, the address generator 7
Since the positive voltage +V applied to the reset terminal R of is grounded via the start switch 1,
The reset state of the address generator 7 is released. At the time when the reset state of the address generator 7 is released, the positive voltage +V is still applied to the counting input terminal C of the address generator 7 via the delay circuit 2 and the OR circuit 3.
The address generator 7 counts this positive voltage +V as a logical value "1" and outputs it to the address input side of the random access memory 9 as the first address signal AD1. Eventually, delay circuit 2
Since the earth potential (corresponding to the logical value "0") is input to the OR circuit 3 by the action of the start switch 1, the start switch 1 will not be involved in the subsequent operation. As is clear from the above explanation, when the start switch 1 is turned on, the address generator 7 generates the first address signal AD1, and this first address signal AD1 causes the random access memory 9 to be The first address (address 1) becomes writable. In this state, the performer inputs the musical tone information (time information, scale information, etc.) of the first beat of the song to be played automatically to the first address of the random access memory 9 by operating various switches provided on the input device 11. Can be written. Next, the performer confirms that the up/down designating switch S1 of the manually operated address generator control device 4 is placed in the up position (output terminal A1 outputs a logical value "1"). As a result, the logical value "1" is input to the up/down designation input terminal U/D of the address generator 7, and it is confirmed that the address generator 7 is in the state of performing an addition operation. Next, the manually operated step switch S2 of the manually operated address generator control device 4 is set to be turned on once. Thereby, the output terminal A of the manually operated address generator control device 4
One pulse is generated from 2, and this pulse is inputted to the counting input terminal C of the address generator 7 via the manual/automatic changeover switch 6 and the OR circuit 3. The address generator 7 counts these pulses and outputs the second address signal AD2 to the random access memory 9. Therefore, the second address (address 2) of the random access memory 9 becomes writable. Therefore, the performer can access the random access memory 9 by operating various switches on the input device 11 in the same way as in the case described above.
Musical tone information for the second beat of the song to be played can be written to the second address. The subsequent writing operation is performed by repeating the ON setting of the manually operated step switch S2 of the manually operated address generator 4 and the operation of various switches of the input device 11, in exactly the same way as the writing of the musical tone information of the second beat. It will be done. Also, if the performer makes a mistake in operating the input device 11, the wrong tone information may be transferred to the random access memory 9.
, the mistakenly written tone information can be corrected by the following operations. First, the up/down designation switch S1 of the manually operated address generator control device 4 is set to the down side. As a result, output terminal A1
Since the logical value "0" is outputted from the address generator 7, the address generator 7 becomes in a state where subtraction is possible. continue,
The manually operated step switch S2 is operated until the address generator 7 generates the address step ADi corresponding to the address (address) where the incorrect musical tone information was written.
Input and set. By this operation, after specifying the address of the random access memory 9 where the incorrect musical tone information has been written, the correct musical tone information can be written by operating the various switches of the input device 11 again. Musical Sound Information Reading Operation Next, a case will be described in which musical sound information written in the random access memory 9 by the musical sound information writing operation described above is read out and automatic performance is performed. The performer first sets the write/read designation switch 8 to the fixed contact R side. As a result, the logical value "0" is input to the write/read designation input terminal W/R of the random access memory 9, so that the random access memory 9 becomes readable. Next, the manual/automatic changeover switch 6 is set to the fixed contact A. This allows the time-detected automatic address generator control device 5 to control the address generator 7. Next, when start switch 1 is set to turn on,
The reset state of the address generator 7 is released, and the first address signal AD1 is outputted from the address generator 7, just as in the case of the musical tone information writing operation described above. Therefore, the musical tone information of the first beat of the performance piece stored in the first address of the random access memory 9 is read out, and of this read musical tone information, only the time information is controlled by the time detection automatic address generator. The remaining scale information, rest information, and envelope control information are input to the musical tone forming device 10. Time detection automatic address generator control device 5
receives this first beat time information, immediately starts counting the time specified by the time information, and at the same time outputs the time signal TS (logical value "1") from output terminal B2.
Output. The musical tone forming device 10 has a random access memory 9
In response to the scale information, rest information, and envelope control information output from the time detection automatic address generator control device 5, the time signal TS (logical value "1") is output, and the musical tone of the first beat of the performance piece is determined. Start generation according to these information. Eventually, when the time detection automatic address generator control device 5 counts the time defined by the time information read from the first address of the random access memory 9, one pulse is generated from its output terminal B1. At the same time, the output terminal B2 stops outputting the time signal TS (logical value "1"). As a result, the musical tone forming device 10 finishes generating the musical tone of the first beat of the performance piece. The pulses generated from the output terminal B1 are inputted to the counting input terminal C of the address generator 7 via the manual/automatic changeover switch 6 and the OR circuit 3. Address generator 7 receives this pulse and generates the second address signal.
Output AD2. Therefore, the musical tone information stored at the second address of the random access memory 9 is read out. The subsequent sound generation operation is performed in exactly the same manner as the musical tone generation of the first beat, and the musical tone of the second beat is generated from the musical tone forming device 10. In this manner, the address generators 7 are driven one after another by the action of the time detection automatic address generator control device 5, and musical tone information is sequentially read out from the random access memory 9 in accordance with this, and the musical tone forming device 10
Musical tones are generated sequentially from the beginning. In this embodiment, the time signal is output from the output terminal B2 of the time detection automatic address generator control device 5.
Although the explanation has been made assuming that the logical value "1" is output as TS, the present invention is not limited to this. For example, the time detection automatic address generator control device 5 may output the time output from the random access memory 9. When counted, one pulse may be generated from the output terminal B2 as the time signal TS. Further, although this embodiment has been described assuming that the output of the input device 11 is input only to the random access memory 9, the output of the input device 11 is also input to the musical tone forming device 10, and thereby the random access memory 9 When musical tone information is written to the musical tone forming device 10, a musical tone corresponding to the musical tone information may be generated from the musical tone forming device 10. In this way, the characteristics of the generated musical tones, such as pitch, timbre, volume, etc., are controlled according to the written musical tone information, so that by listening to the generated musical tones, it is possible to determine whether the musical tone information related to the writing is appropriate. can be determined immediately. Next, a case where the present invention is applied to a synthesizer type electronic musical instrument will be explained using FIGS. 2 to 7. In the drawings attached to this specification, AND circuits and OR circuits are indicated by the symbols shown in FIG. Indicates that FIG. 3 is a detailed diagram of the input device 11 in FIG. 1, including time information designation switches T1 to T5 corresponding to each note (sixteenth note, eighth note,...) and octave information corresponding to each musical range. Designation switches 01 to 05, note name information designation switches N1 to N12 corresponding to each note name C to B, and rest information designation switches corresponding to each rest (16th rest, 8th rest,...) R1 to R5 (this rest information is also used as time information) and a rest indication information designation switch NR indicating that the next note is a rest are provided. This rest instruction information specification switch NR is used to prevent unnatural musical sounds from disappearing at rests by elongating the musical sound before the rest to some extent when a certain musical note is sounded and the next note is a rest. It is provided in
These switch groups T1~T5, 01~05, N1~
A logic value "1" is input to one end of N12, R1 to R5, and NR, respectively. The other ends of the time information designation switches T1 to T5 are respectively connected to the input side of the OR circuit group 21 as shown in the figure, and similarly, the other ends of the rest information designation switches R1 to R5 are connected to the input side of the OR circuit group 21 on the one hand. It is connected to the. Here, time information designation switches T1 to T5, rest information designation switches R1 to R4 and OR circuit group 21
By turning on each of these switches T1 to T5 and R1 to R5, each output line TC1 to TC5 of the OR circuit group 21 is coded as shown in the following table (1). It is wired so that time information is output.

[Table] As is clear from this table (1), each note and each corresponding rest are indicated by the same code. The other ends of the octave information designation switches 01 to 05 are respectively connected to the input side of the OR circuit group 22 as shown, and the pitch name information designation switches N1 to N12 are respectively connected to the input side of the OR circuit group 22.
The other ends are also connected to the input sides of the OR circuit group 23, respectively, as shown. Furthermore, the other ends of the rest information designation switches R1 to R5 are connected to the OR circuit 25 at the other end.
connected to the input side of the OR circuit group 22, 2
The output sides of 3 are respectively connected to the first input terminal group of the AND circuit group 24 as shown in the figure, and the output sides of the OR circuit 2
The output side of 5 is connected to a second input terminal group of an OR circuit group 24 via an inverter 27, as shown. Here, the other ends of the octave information designation switches 01 to 05 provided corresponding to each range, the OR circuit group 22, and the AND circuit group 24 are set to close each of these contacts 01 to 05. Therefore, the output lines OC1 to OC3 of the AND circuit group 24 are connected so that coded octave information as shown in the following table (2) is output.

[Table] In addition, the other ends of the note name information designation switches N1 to N12 provided corresponding to each note name, the OR circuit group 23, and the AND circuit group 24 are connected to each switch.
By turning on each of N1 to N12, the output lines NC1 to NC4 of the AND circuit group 24 are connected so that coded note name information as shown in the following table (3) is output. There is.

[Table] The other ends of the rest information designation switches R1 to R5 provided for each rest, the OR circuit 25, the inverter 27, and the AND circuit group 24 are as follows:
When any one of the switches R1 to R5 is turned on, the output line of the AND circuit group 24 is
OC1 to OC3 and NC1 to NC4 are all connected to output a logical value of "0".

[Table] Also, the rest indication information designation switch NR, which indicates that the next note is a rest, is connected so that when it is turned on, a logical value of "1" is output from the output line NRC of the OR circuit 26. ing. As is clear from the above explanation, the pronunciation time implied by the note on the musical score is displayed using the time information in Table (1), and the pitch of the generated musical sound implied by the note on the musical score is shown in Table (2). It is displayed using octave information and note name information in Table (3). As described above, the octave information and note name information are collectively referred to as scale information.
In addition, the pause time of musical sound generation, which is meant by a rest on the score, is indicated by the time information in Table (1), and in order to ensure that the musical tone generation is stopped within this pause time, octave information is used as shown in Table (4). All pitch name information is set to logical value "0". In addition to the various information coded as described above, a variable resistor group 28 connected to an appropriate voltage source (not shown) is provided to output envelope control information for controlling the envelope generator. This variable resistance group 28 is connected to the input side of an analog-to-digital converter (hereinafter referred to as A/D converter) group 29, respectively. Each output of the variable resistance group 28 digitally converted by the A/D converter group 29 is output as envelope control information. As is clear from the above explanation, this input device 1
According to 1, various information designation switches T1 to T5,
01-05, N1-N12, R12-R5, NR
By appropriately setting and adjusting the variable resistor group 28, one musical tone (note on musical score)
It is possible to encode and generate all the information related to (time information, scale information, rest information, envelope control information). In this embodiment, the minimum unit of time information is a 16th note, and the time information is further limited to five pieces from a 16th note to a whole note, but the present invention is not limited to this. Minimum unit of information is 64
The input device 11 may be configured to output not only diacritics but also various dotted notes and the like as time information. FIG. 4 is a detailed diagram showing the random access memory 9 and musical tone forming device 10 in FIG. 1. In this embodiment, a synthesizer is used as the musical tone forming device 10. First, the operation of writing musical tone information into the random access memory 9 will be explained. In FIG. 4, when a logical value "1" is input to the write/read designation input terminal W/R of the random access memory 9, the random access memory 9 is in a writable state as described above. In this situation,
Each address specified by the address signal ADi (i=1...n) output from the address generator 7 (in this embodiment, one address is a plurality of addresses in one row shown in the random access memory 9 in FIG. 4). Coded musical tone information (time information, musical scale information, etc.) output from the input device 11 is written into the bits (equivalent to bits). In particular, the last bit* at each address in the random access memory 9 contains rest instruction information (inputted by the rest instruction information designation switch NR in Figure 3) indicating whether or not the tone information written to the next address is a rest. Output line of device 11
information output from NRC) is written. That is, if the next musical tone to be generated is a rest, a logical value "1" is written to this final bit, and if the next musical tone is not a rest, a logical value "0" is written to this final bit. As described above, when writing to the random access memory 9, the manually operated address generator control device 4 is activated (the manual/automatic changeover switch 6 in FIG. 1 is set to the fixed contact M), and the manually operated step forward switch S2 is activated. The generation of the address signal ADi of the address generator 7 is controlled by turning on the address signal ADi. Therefore, the performer turns on the manually operated step switch S2, and also switches T1 to T5, 01 to 05, N1 to N12, and R of the input device 11.
12 to R122 and NR as appropriate to adjust the variable resistor group 28, musical tone information can be written into the random access memory 9 one after another. A case will be described in which musical tone information for one song is written into the random access memory 9 by the operations described above, and the musical tone information is further automatically played. In FIG. 4, writing and writing of the random access memory 9
When the logical value "0" is input to the read designation input terminal W/R, the random access memory 9 is in a readable state as described above. Further, as described above, the address generator 7 is automatically controlled by the time detection automatic address generator control device 5 during reading (in FIG. 1, the manual/automatic changeover switch 6 is set to the fixed contact A). Further, in this embodiment, as described above, a synthesizer is used in the musical tone forming device 10, and this synthesizer mainly consists of a voltage-controlled oscillator 35, a voltage-controlled filter 36, and a voltage-controlled amplifier 37.
and a sound system 38. Further, the voltage controlled oscillator 35 is provided with an oscillator envelope waveform generator 32, the voltage controlled filter 36 is similarly provided with a filter envelope waveform generator 33, and the voltage controlled amplifier 37 is similarly provided with an amplifier waveform generator 32. An envelope waveform generator 34 is provided. Now, suppose that a certain address in the random access memory 9 is specified by the address signal ADi output from the address generator 7. At this time, since the random access memory 9 is in a readable state, the musical tone information stored at the designated address is read out. Of the musical tone information read out, only the time information is input to the time detection automatic address generator 5 as shown in FIGS. 1 and 4, and the remaining scale information (octave information + note name information) and rest information are input. , envelope control information are input to a group of digital-to-analog converters (hereinafter referred to as D/A converters) 31 via latch circuits 30, respectively. The musical tone information converted into an analog signal by the D/A converter group 31 is sent to envelope generators 32, 33, 34 and voltage controlled oscillator 3 as appropriate.
5. Input to voltage controlled filter 36. Further, the time detection automatic address generator control device 5 receives the above-mentioned time information and outputs a time signal TS from its output terminal B2 as shown in FIG. This time signal TS is generated by an envelope waveform generator 32,
It is input to time signal input terminals T 33 and 34. Envelope waveform generators 32, 33, 34, voltage controlled oscillator 35, and voltage controlled filter 3
6, a voltage-controlled amplifier 37, and a sound system 38, the synthesizer includes musical tone information converted into an analog signal by a D/A converter group 31 and a time-detecting automatic address generator control device 5.
The music tone stored in the random access memory 9 is accurately generated by receiving the time signal TS outputted by the . When the sound is generated for a certain period of time determined by the time information stored in the random access memory 9, one pulse is generated from the output terminal B1 (see Fig. 1) of the time detection automatic address generator control device 5, as described above. Address generator 7
address generator 7 outputs the next address signal ADi. Therefore, the next address of the random access memory 9 is specified,
Thereafter, similar tone information reading operations are repeated. Here, the latch circuit 30 is activated when a logical value "1" (rest instruction information) is stored in the last bit* of each address in the random access memory 9 (that is, the tone information stored in the next address is In order to prevent the generated musical note from suddenly disappearing due to the presence of a rest, it temporarily latches the musical note information and causes the generated musical note to occur gradually and naturally. It has the function of extinguishing musical tones. FIG. 5(A) shows the manually operated address generator control device 4, the time detection automatic address generator control device 5, and the address generator 7 in FIG.
FIG. The manually operated address generator control device 4 is composed of an up/down designation switch S1 and a manually operated step switch S2. One end of the up/down designation switch S1 is grounded, the other end is connected to a positive voltage source +V via a resistor, and the other end is connected to the up/down designation input terminal U/D of the counter 71 of the address generator 7. ing. Also, manually operated step switch S2
is connected on one side to a positive voltage source +V, and on the other side to a fixed contact M of the manual/automatic changeover switch 6 via a differentiating circuit consisting of a capacitor 41 and a resistor 42. One end of the start switch 1 is grounded, and the other end is connected to a positive voltage source +V via a resistor, and the other end is connected to the input side of the differential circuit 61 and the reset terminal R of the counter 71 of the address generator 7. . The output side of the differentiating circuit 61 is connected to the first input terminal of the OR circuit 3 via a delay circuit 62 and an inverter 63. The output side of the inverter 63 is connected via a switch 65 to the reset terminal R of the oscillator 50 of the time detection automatic address generator control device 5. A movable contact of a manual/automatic changeover switch 6 is connected to a second input terminal of the OR circuit 3, and an output side of the OR circuit 3 is connected to a counting input terminal C of a counter 71. The address generator 7 is composed of a counter 71 and a decoder 72, and the output side of the counter 71 is connected to the input side of the decoder 72. The output side of the decoder 72 is connected to the address input side of the random access memory 9, as shown in FIG. Time detection automatic address generator control device 5
is structured as follows. clock pulse CP
The output side of an oscillator 50, which generates an oscillation frequency whose oscillation frequency can be adjusted by a variable resistor 51, is connected on the one hand to the input side of a frequency divider 52 and on the other hand to the reset terminal R of a D-type flip-flop 58. ing. The output side of the frequency divider 52 is a counting circuit 53 consisting of a combination of a counter and a decoder.
is connected to the counting input terminal C of. Here, the counting circuit 53 sequentially counts the pulses CP' input to its counting input terminal C, and outputs a logical value of "1" to one output line Ci (i=1, 2...n) corresponding to the counted value. ”
It is configured to output. In this embodiment, the frequency divider 52 is formed so that the clock pulse CP' is output at a period corresponding to a sixteenth note. Each output line C1 to Cn of the counting circuit 53 is connected to the address input side of the read-only memory 54, and each output line R1 of the read-only memory 54 is connected to the address input side of the read-only memory 54.
2, R2 to Rn are connected to the input sides of corresponding AND circuits AN1 to ANn, respectively, as shown. Here, the read-only memory 54 is shown in FIG.
It has a function equivalent to the OR circuit group shown in (B),
Corresponding to the logic value "1" output to each output line Ci of the counting circuit 53, the output lines R12 to Rn are respectively displayed.
(5) and is configured to output logical values as shown in FIG. 6(A).

【table】

Claims (1)

[Scope of Claims] 1 (a) an input means for inputting at least pitch information, time information, and musical tone control information for automatic performance; (b) having a large number of addresses, each of which has a (c) an address updating means capable of performing an address updating operation on this storage device in either an address value increasing direction or an address value decreasing direction; and (d) operation of this address updating means. (e) Addressing means for specifying an address of the storage device according to the address specified by the addressing means in the storage device, based on the operation of the input means, pitch information, time information, and musical tone control information. (f) reading means for reading the pitch information and musical tone control information written in the storage device, and reading the information sequentially according to time information; (g) When writing by the writing means, a musical tone signal is generated based on pitch information and musical tone control information related to writing, and when reading by the reading means, a musical tone signal is generated based on pitch information and musical tone control information related to reading. an electronic musical instrument that generates a musical tone signal based on the musical tone signal, and includes musical tone generating means that controls at least one of the timbre and volume of the musical tone signal according to the musical tone control information during both writing and reading. automatic performance device. 2 (a) an input means for inputting at least pitch information, time information, and musical tone control information for automatic performance; (b) a storage device having a large number of addresses and capable of reading and writing for each address; , (c) an address updating means capable of performing an address updating operation on this storage device in either the address value increasing direction or the address value decreasing direction; and (d) the storage device according to the operation of this address updating means. (e) writing means for writing pitch information, time information, and tone control information based on the operation of the input means to the address specified by the address designation means in the storage device; and (f) reading pitch information and musical tone control information written in the storage device, the reading being performed sequentially according to time information or step by step according to the operation of the address updating means. (g) a reading means having a selection means for selecting a musical tone control; An automatic performance device for an electronic musical instrument, comprising a musical tone generating means for controlling at least one of the tone color and the volume of the musical tone signal according to information.