JPH0447764A - Picture information coder - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention inputs information detected from image information into a memory as an address, and generates a predetermined code based on name data read word by word from the memory. The present invention relates to an image information encoding device.

[Prior Art] In facsimile machines, image electronic filing devices, and the like, image information read from a document is often encoded for data compression.

Generally, in such encoding, a code table is formed in the ROM, and predetermined memorias 1 to 2 are accessed based on image information to read out the corresponding codes.

In recent years, single-chip LSIs have been developed that perform this encoding process.
has been developed and is widely used.

By the way, the chip size of ■, Sl increases according to the data amount of the code table. In the case of LSI, the cost 1~ increases significantly as the chip size increases. In particular, when forming a matrix-structured memory using the Go1-array method, a very large chip area is required for the memory-only IC, so the amount of data in the table has a large effect on the cost1-. Furthermore, LSI integration may become difficult due to chip space limitations.

In order to improve such inconvenience, for example,
-149268, MH (M.

In the case of a divided Hoffman) code,
It has been proposed that the amount of data in the code table is reduced by using different ROMs for each code type, terminating code and make-up code.

[Problem to be solved by the invention] However, even in this proposal, the amount of data in the code table is 31 when the total of the above two types of codes is used.
There was a problem in that it became large, 87 bits 1-.

SUMMARY OF THE INVENTION An object of the present invention is to provide an image information encoding device that improves the above problems and reduces the amount of data in a code table.

[Means for Solving the Problems] For this purpose, the present invention provides a method to solve the problem in the case where the generated code has an undefined bit length and exceeds a certain number of bits, and all digits in the excess are the same data. , each word in the memory is comprised of a data pattern of a certain number of bits l- or less and control data set based on the bit length of the generated code.

[Operation] Since it is no longer necessary to store the same data in excess of the predetermined number of bits, the amount of data in the code table in the memory can be reduced.

[Embodiments] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 shows a block diagram of an image information encoding device according to an embodiment of the present invention. In the figure, a run length detection section 1 detects the run length of binary image information that is sequentially input pixel by pixel, and outputs the distinction between white/black and the run length.

The code table 2 is composed of a ROM, for example, and stores data for each word for generating the MH code, as shown in FIG. Each word data is composed of code data of 8 bits or less and control data of 4 hits. These are classified into three types: one for terminating codes, one for standard makeup codes, and one for extended makeup codes.

Two-to-one data for the terminating code is stored separately for black and white run lengths from 0 to 63. For standard makeup codes, run lengths from 64 to 1728 in 64 steps are similarly stored separately for white and black. Further, for the extended makeup code, common data for white and black is stored from run length 1792 to 12560 in 64 steps.

The standard makeup code is a code that supports images up to A4 width, and the extended makeup coat is a code that supports images up to A4 width.
This means a code that supports images that exceed the width.

The code selection unit 3 selects one of the three types of word data when reading data from the code table 2.

The shift 1 register 4 is set with a code output as a parallel signal from the code table 2, and is output as a serial signal. The counter 5 is set to the control data output from the counter 1 (table 2) as an initial value, and performs a counting operation from the initial value until it overflows.

Ant circuit 6 outputs a predetermined MH using a serial signal through a logical operation of each output data of shift I-register 4 and counter 5.
It outputs a code. The control section 7 controls each of the above sections.

With the above configuration, this image information encoding device converts image information into MH
This operation is explained next.

Binary image information read line by line is sequentially input pixel by pixel into this image information encoding device from an image reading device (not shown).

FIG. 3 shows the encoding operation for line 1. When image information is input, the run length detection section 1 reads the image information pixel by pixel (process 101.).

If white or black does not change continuously (N in process 102), the reading is repeated (proceed to process 101). Then, when a change in black and white is detected (Y in process 102)
), identifies whether consecutive pixels are white or black, and calculates the run length, which is the number of consecutive pixels (process 103).

Next, the run length is checked (process 104).

If the run length is, for example, 63 or less (processing 104
(Y), word data for the terminating code of TWO 1 to TABLE 2 is selected (process 105).

Next, code data and data, which are word data corresponding to the run length of 1, are read from code table 2 (process 106).

After that, the control unit 7 controls shift 1 to register 4 and counter 5.
Load (i"'y'l) and set the code read above to the shift register 4 and the control data to the counter 5. Also, set the clock to the shift register 4 and the counter 5. Supply signal GK.

As a result, the H1 number operation of the counter 5 starts.

By the way, as is clear from the code table of the CCITT recommendation, the MH code is composed of various bit patterns having a bit length of 2 to 13 bits.

Then, from bin 1 to each code whose length exceeds 8 bits, counting from the right side, 9 bits l-1; bits from 4 onwards are all focused L.
r 011.

Each code in the code table 2 shown in FIG.
I (sign is shown as is, if it is 9 bits or more,
It shows a pitch pattern of 8 pitches on the right side of the MH code. Further, the control data indicates the complement of the bit length of the M I-I code.

Now, taking as an example an MH code with a pitch length of 4 bits 1~, the word data in the coat table z in this case is the code 'of 4 bits 1~, as shown in FIG. 4(a). dld
2d3d4J, and control data r1.2d3d4J indicating the complement of four. ]O
This is O.J.

Now, if this control data r ], 1.00 J is set to the counter 5, the counter 5 counts up each time the clock signal CK inputs one pulse with that value as the initial value. As shown in b), the H'' value 01 to Q4 increases.

The fourth bit Q4 of the counter 5 is initially It I II, and this signal is input as the shift l-enable signal SE of the shift register 4. This allows Schiff 1
~Register 4 sequentially outputs '2+;rd1~+L+J in synchronization with clock signal CK. This code 1
-d1 to d are output from the AND circuit 6 as encoded data CD in the form of serial signals. In this way, a predetermined terminating code is generated (hereinafter, process 107).

Meanwhile, in parallel with this data output operation, the same process as described above is executed for the next image information (proceed to process 101).

In the case of ``1'', the counter 5 receives the tarok signal CK.
When 4 pulses are input, it overflows and turns on the carry signal C. When the carry signal C is turned on, the control section 7 sets the next code and control data in the shift register 4 and the counter 5, respectively, and similarly repeats the next code generation operation.

Next, FIG. 4(c) shows word data in the case of an MH code with a bit length of 11 bits. In this case, the 8-bit data pattern of the code data is "d.

dz ”' d, lJ, control data is 11's complement r
0101. Become J.

Therefore, "1 r010]j is set in the counter 5, and a counting operation is performed as shown in FIG. 2(d). counter 5
The fourth bit output Q4 is "011" until three pulses of the clock signal CK are input. During that time, the operation of the shift register 4 is stopped and the output of the AND circuit 6 is suppressed.
II OII is output as encoded data CD.

The output Q4 is rr after the third pulse of the clock signal CK.
], becomes ++. As a result, the codes "d1 to d8J" set from the shift register 4 are then outputted as encoded data CD.

In this way, 11-bit predetermined encoded data is generated.

On the other hand, if the run length counted by the run length detection unit 1 is 64 or more but less than 1792 (from N in process 104 to process 108 and Y in process 108), word data for the standard makeup board is selected ( Process 109), if the run length is 1792 or more (N in Process 108), word data for extended makeup code is selected (Process 1
10).

Then, according to the known procedure, one word of data that is less than or equal to the counted run length and close to that value is read out, and the code data and control data are sent to the shift register 4 and counter 5, respectively, in the same manner as described above. - do (process 11
1). As a result, a predetermined makeup code is generated and outputted from the AND circuit 6 as an encoded code CD (processing 112).

Next, a terminating code indicating the difference between the counted run length and the currently encoded run length is generated and output in the same manner as described above (proceeding to process 105).

The above encoding process is repeatedly executed for one line of image information that is sequentially input. And, although not shown, ■
When the image information for a line has been processed to the rear end, a predetermined code indicating the end of the line is added, and then the processing for the next line is repeated in the same way.

As described above, in this embodiment, one MH code is generated based on a code of 8 bits or less and control data indicating the complement of the bit length of the MH code.

By the way, in the code table 2 shown in Figure 2, there are 128 words for the terminating code including white and black, 54 words for the standard make-up code including 54 words for white and black, and 13 words for the extended make-up code. , total 195
Stores words.

In this case, since one word is 12 bits, the total amount of data is 1i2340 bits, which is 31 bits in the conventional example mentioned above.
The amount of data is reduced by about 30% compared to 87 bits 1-.

This reduces the space required for the LSI chip for encoding processing, lowers the cost of the LSI, and facilitates the creation of an LSI with even higher processing capabilities.

In the above embodiment, the control data is set to the complement of the bit length of the MH code, but it may be set to the bit length itself and converted to the complement when setting it in the counter. Furthermore, an EOL code indicating the end of one line may be stored in the code table.

Furthermore, ■ An example of the MH code, which is a one-dimensional encoding method that encodes run lengths within a line, was explained, but in two-dimensional encoding methods such as MR codes and MMR codes, run lengths that span multiple lines are encoded. The present invention can be applied in the same manner since the difference is only a simple one.

[Effects of the Invention] As described above, according to the present invention, one word of the code table in the memory includes a data pattern of a certain number of bits or less,
Since it is configured with control data set based on the bit length of the corresponding code, there is no need to store the same data when the number of bits exceeds a certain value, so the amount of data to be stored can be reduced.

[Brief explanation of drawings]

FIG. 1 is a block configuration diagram of an image information encoding device according to an embodiment of the present invention, FIG. 2 is an explanatory diagram of data stored in a code table, FIG. 3 is an operation flowchart of encoding processing, and FIG.
Figure (a) is a configuration diagram of word data for generating a 4-bit MH code, figure (b) is an explanatory diagram showing the operation of generating an MH code using the word data, and figure (c) is a diagram showing the structure of word data for generating a 4-bit MH code.
1-bit M
FIG. 3 is an explanatory diagram showing the operation of generating a code. ■...Run length detection section, 2...Code table,
3...Code selection section, 4...Shift register, 5...
- Counter, 6...AND circuit, 7...control unit.

Claims (1)

[Claims] The information detected from the image information is input into the memory as an address, and based on each data read word by word from the memory, if the bit length is indefinite and exceeds a certain number of bits, all digits of the excess are In the image information encoding device that generates each code that is the same data, each word in the memory is composed of the data pattern of the certain number of bits or less and control data set based on the bit length of the code to be generated. An image information encoding device characterized by: