JPH0447838A - Carrier reproducing circuit - Google Patents

Abstract

PURPOSE:To easily select and switch the various parameters of a sweep signal by composing a sweeping circuit for promoting synchronization of a ROM storing a sweep waveform data, D/A converter to make an analog waveform, and integration circuit to smooth the waveform. CONSTITUTION:An intermediate frequency signal 51 to be inputted is branched into intermediate frequency signals 52 and 53 by a branching circuit 101. The intermediate frequency signals 52 and 53 are respectively mixed with carrier frequency regenerative signals 54 and 55 of a VCO 109 at mixers 102 and 103, and main data signals 60 and 61 are obtained. One part of the main data signals 60 and 61 and error signals 62 and 63 are inputted to an APC signal preparing circuit 111, and an APC signal 64 is inputted to a mixer 112. A sweeping circuit 4 successively outputs the data of sweep waveforms written to a ROM 1 in advance to a D/A converter 2 according to the trigger of an external clock 6. For an analog signal 5 to be taken out, the step-shaped amplitude is smoothed by an integration circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a carrier regeneration circuit used in a receiving side demodulator in a multilevel digital wireless communication system.

[Conventional technology]

Conventionally, in a multilevel digital wireless communication system such as 4PSK, 8PSK, 16QAM, 64QAM, and 256QAM, a carrier wave regeneration circuit provided in a receiving side demodulator includes a branch circuit 101 and a branch circuit 1, as shown in the block diagram of FIG.
02 and 103 are mixers, 104 is a 90° phase shifter, 105
, 1.06 is a low-pass filter, 107 and 108 are A/D converters, 109 is a voltage controlled oscillator (VCO), 11
0 is a loop filter, 111 is a phase control (APC) signal generation circuit, 112 is a mixer, and 113 is a low frequency oscillator.

Next, the basic operation of the conventional example will be explained.

The input intermediate frequency signal 51 is branched into two intermediate frequency signals 52 and 53 by the branch circuit 101. The intermediate frequency signal 52.53 is passed to the mixer 1°2.103,
The carrier wave recovery signal 54 from the vCo 109 is mixed with the other carrier wave recovery signal 55 whose phase has been shifted by 90 inches by the 90 degree phase shifter 104, to obtain the baseband signal 56.57. Area filter 105
．． The signal 58.59 that has been band limited at 106 is
D converters 107 and 108 convert the analog signals into digital signals to obtain main data signals 60 and 61.

Part of main data signal 60.61 and error signal 62.6
3 is input to a phase control (APC) signal generation circuit 111, which generates an APC signal 64.

This APC signal 64 is input to the VCO 109 via the mixer 112 and the loop filter 110, and controls the carrier wave reproduction signal 54.55.

Further, a low frequency oscillator 113 for sweeping the oscillation frequency of the VCO receives an asynchronous alarm signal 66 and outputs a sweep signal 67 when the carrier regeneration circuit is in an asynchronous state, which is added to the APC signal 64 by a mixer 112. Furthermore, the sweep signal 67 is stopped in the synchronized state.

The algorithm for creating the APC signal from the main data signal and the error signal is described in, for example, Japanese Patent Laid-Open No. 57-1999.
It is described in No. 131151.

[Problem to be solved by the invention]

In the conventional carrier wave regeneration circuit described above, when the input intermediate frequency signal and the carrier wave regeneration signal are in an asynchronous state, a sweep signal for promoting synchronization is created by a sweep circuit composed of a low frequency oscillator. When trying to optimize the synchronization pull-in time and pull-in range by changing the characteristics/parameters such as the sweep waveform, frequency, and amplitude of the sweep signal, there is a drawback that the changes are not easy. Another drawback is that the low frequency oscillator itself is susceptible to temperature fluctuations, power supply voltage fluctuations, and the like.

[Means to solve the problem]

The carrier wave regeneration circuit of the present invention is a carrier wave regeneration circuit including a voltage controlled oscillator that generates a regenerated carrier wave signal for mixing with an externally input intermediate frequency signal and extracting a demodulated signal. a ROM that stores arbitrary sweep waveform data for sweeping the frequency of the reproduced carrier signal when the signal is asynchronous;
The sweep circuit includes a D/A converter for extracting an analog signal from the sweep waveform data read from the ROM, and an integrating circuit for smoothing the waveform of the analog signal output from the D/A converter.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention. In the embodiment shown in FIG. 1, circuits with the same reference numerals as those in FIG. 3 have the same configuration and operation as in the conventional example. That is, in this embodiment, instead of the low frequency oscillator 113 of the conventional example, ROMI, D/A near 7 inverter 2. A sweep circuit 4 having an integrating circuit 3 constitutes a circuit.

Next, the operation of this embodiment will be explained.

First, an intermediate frequency signal 51 input as in the conventional example is divided into two intermediate frequency signals 52 and 53 in a branch circuit 101.
It is branched into. This intermediate frequency signal 52.53 is mixed with the carrier frequency reproduction signal 54.55 of ■C○ 109 in mixers 102 and 103, respectively, to obtain a baseband signal 56.57. After that, low-pass filters 105 and 106
The signals 58 and 59 subjected to band limitation are converted from analog signals to digital signals by A/D converters 107 and 108, and main data signals 60 and 61 are obtained.

Part of main data signal 60.61 and error signal 62.63
is input to the phase control (APC) signal generation circuit 111,
A phase control (APC) signal 64 is generated. This APC signal 64 is input to the VCO 109 via the mixer 112 and the loop filter 110, and the carrier wave regenerated signal 54 is input to the VCO 109.
．． 55. Next, the sweep circuit 4 of this embodiment outputs a sweep signal 67A in response to an asynchronous alarm signal 66 indicating that the input intermediate frequency signal 51 and the carrier wave reproduction signal 54 are asynchronous, and the mixer 12 outputs the APC signal 67A. The operation of the sweep circuit 4 is shown in FIGS. 2(a) and 2(b) in the case of a sine wave and a triangular wave, which are examples of sweep characteristics.
) and the explanatory diagram of FIG. The asynchronous alarm signal 66 input to ROM1 corresponds to a start signal to start reading the contents of ROM1, and
Sweep waveform data that has not been written to OM1 is sequentially output to D/A converter 2 by triggering from external clock 6. Here, taking a triangular wave as an example, the contents stored in ROM1 are as shown in Fig. 3. 5-bit digital codes D1 to D5 are used to control the amplitude steps O to +10 on the positive side of the triangular wave and the amplitude steps on the negative side. Amplitude step 0 to -1
It is stored in correspondence with 0. Therefore, the digital codes D1 to D5 sequentially read from ROM1 are D/
In the A converter 2, it is extracted as an analog signal 5 with step-like discrete levels as shown in FIG. 2(b). The step amplitude of this analog signal 5 is smoothed in the integrating circuit 5, and converted into a triangular wave having a period T=1/f and an amplitude V as shown in the waveform of the sweep signal 67A in FIG. 2(b). In the case of a sine wave, the digital code is read out from ROM1 using the same procedure as shown in Figure 2 (
As shown in a), an analog signal 5 having a stepped amplitude is taken out from the D/A converter 2, smoothed by an integrating circuit 3, and a sine wave like a sweep signal 67A is taken out.

In addition, in Figure 2 (a>, (b), two waves of sine wave and triangular wave are shown.
Although this is just one example, it is also possible to create any waveform by changing the contents of the table in ROM1. Further, although the digital codes D1 to D5 have 5 bits in this embodiment, any number of bits can be used depending on the density of the amplitude steps. Furthermore, the sweep frequency and amplitude can be arbitrarily set by changing the external clock and the gain of the integrating circuit.

〔Effect of the invention〕

As explained above, the present invention replaces the sweep circuit for promoting synchronization, which conventionally consisted of a low-frequency oscillator, with a ROM that stores sweep waveform data in advance, a D/A converter that creates an analog waveform, and a D/A converter that smooths the waveform. By configuring it with an integrating circuit, it is possible to arbitrarily set the selection and switching of various parameters of the sweep signal that optimize the synchronization pull-in time and synchronization pull-in range of the carrier wave regeneration circuit. or,
This has the effect of providing a stable sweep signal against temperature fluctuations, power supply voltage fluctuations, etc.

[Brief explanation of drawings]

Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2(a)
, (b) are explanatory diagrams of the sweep signal waveform of this embodiment, FIG. 3 is an explanatory diagram of the storage contents of the ROM of this embodiment, and FIG. 4 is a block diagram of a conventional carrier wave regeneration circuit. 1...ROM, 2...D/A converter, 3...
Integrating circuit, 4... sweep circuit, 101... branch circuit,
102゜103.412--Mixer, 104-90
"Phase shifter, 105.106...low-pass filter, 107,
108... A/D converter, 109... Voltage controlled oscillator (VCO), 110... Loop filter, 1
11... Phase control (APC) signal generation circuit.

Claims (1)

[Claims] 1. In a carrier regeneration circuit including a voltage-controlled oscillator that generates a regenerated carrier signal for mixing with an externally input intermediate frequency signal and extracting a demodulated signal, the intermediate frequency signal and the regenerated carrier wave a ROM that stores arbitrary sweep waveform data for sweeping the frequency of the reproduced carrier signal when the signals are asynchronous; and a D/A that extracts an analog signal from the sweep waveform data read from the ROM.
1. A carrier wave regeneration circuit comprising a sweep circuit having a converter and an integrating circuit for smoothing the waveform of an analog signal output from the D/A converter. 2. The sweep waveform data stored in the ROM is stored as an N (N is an integer) bit digital code corresponding to the amplitude step of an arbitrary waveform, and the ROM is used for reading out to determine the frequency of the sweep waveform. 2. The carrier wave regeneration circuit according to claim 1, wherein the clock and an asynchronous alarm signal for determining the start of reading are supplied from outside.